Datasheet AS1324 1.5MHz, 600mA, DC/DC Step-Down Regulator 1 General Description 2 Key Features ! High Efficiency: Up to 96% ! Output Current: 600mA ! Input Voltage Range: 2.7V to 5.5V Typical supply current with no load is 30A and decreases to 1A in shutdown mode. ! Constant Frequency Operation: 1.5MHz The AS1324 is available as the standard versions listed in Table 1. ! Variable- and Fixed-Output Voltages Table 1. Standard Versions ! No Schottky Diode Required ! Automatic Powersave Operation ! Low Quiescent Current: 30A The AS1324 is a high-efficiency, constant-frequency synchronous buck converter available in adjustable- and fixed-voltage versions. The wide input voltage range (2.7V to 5.5V), automatic powersave mode and minimal external component requirements make the AS1324 perfect for any single Li-Ion battery-powered application. Model Output Voltage AS1324-AD Adjustable via External Resistors AS1324-12 Fixed: 1.2V AS1324-15 Fixed: 1.5V ! Internal Reference: 0.6V AS1324-18 Fixed: 1.8V ! Shutdown Mode Supply Current: 1A ! Thermal Protection ! 5-pin TSOT-23 Package An internal synchronous switch increases efficiency and eliminates the need for an external Schottky diode. The internally fixed switching frequency (1.5MHz) allows for the use of small surface mount external components. Very low output voltages can be delivered with the internal 0.6V feedback reference voltage. 3 Applications The AS1324 is available in a 5-pin TSOT-23 package. The device is ideal for mobile communication devices, laptops and PDAs, ultra-low-power systems, threshold detectors/discriminators, telemetry and remote systems, medical instruments, or any other space-limited application with low power-consumption requirements. Figure 1. Typical Application Diagram - High Efficiency Step Down Converter VIN = 2.7V to 5.5V CIN 4 3 SW VIN AS1324-18 10F 4.7H VOUT = 1.8V, 600mA EN 1 COUT 5 VOUT AS1324-18 10F GND 2 5 1 EN SW 3 VOUT 4 VIN 2 GND www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 1 - 20 AS1324 Datasheet - P i n A s s i g n m e n t s 4 Pin Assignments Figure 2. Pin Assignments (Top View) EN 1 GND 2 SW 3 5 AS1324 4 EN VFB 1 GND 2 SW 3 VIN 5 VOUT 4 VIN AS1324-12/ AS1324-15/ AS1324-18 4.1 Pin Descriptions Table 2. Pin Descriptions Pin Number Pin Name Description Enable Input. Driving this pin above 1.5V enables the device. Driving this pin below 0.3V puts the device in shutdown mode. In shutdown mode all functions are disabled while SW goes high impedance, drawing <1A supply current. Note: This pin should not be left floating. 1 EN 2 GND Ground. 3 SW Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. 4 VIN Input Supply Voltage. This pin must be closely decoupled to GND with a 4.7F ceramic capacitor. Connect to any supply voltage between 2.7 to 5.5V. VFB Feedback Pin. This pin receives the feedback voltage from the external resistor divider across the output. (Adjustable voltage variant only.) 5 VOUT Output Voltage Feedback Pin. An internal resistor divider steps the output voltage down for comparison to the internal reference voltage. (Fixed voltage variants only.) www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 2 - 20 AS1324 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 3 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Section 6 Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Absolute Maximum Ratings Parameter Min Max Units VIN to GND -0.3 6 V SW, EN, FB to GND -0.3 VIN + 0.3 V 207.4 C/W on PCB kV HBM MIL-Std. 883E 3015.7 methods JEDEC 78 Thermal Resistance JA ESD 2 Latch-Up -100 +100 mA Operating Temperature Range -40 +85 C Storage Temperature Range -65 +125 C Package Body Temperature Junction Temperature +260 125 C C Comments The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/ JEDEC J-STD-020 "Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices". The lead finish for Pb-free leaded packages is matte tin (100% Sn). Junction temperature (TJ) is calculated from the ambient temperature (TAMB) and power dissipation (PD) as: TJ = TAMB + (PD)(207.4C/W) www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 (EQ 1) 3 - 20 AS1324 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics VIN = EN = 3.6V, VOUT < VIN - 0.5V, TAMB = -40 to +85C, typ. values @ TAMB = +25C (unless otherwise specified). Table 4. Electrical Characteristics Symbol Parameter Conditions Min Typ VIN Input Voltage Range IQ Quiescent Current Powersave Mode; VFB = 0.62V or VOUT = 103%, IOUT = 0mA, TAMB = +25C 30 35 ISHDN Shutdown Current Shutdown Mode; VEN = 0V, TAMB = +25C 0.1 1 0.6 0.615 V 0.1 1 %/V 30 nA 2.7 Max Units 5.5 V A Regulation 1 VFB Regulated Feedback Voltage VFB Reference Voltage Line Regulation VIN = 2.7V to 5.5V IVFB Feedback Current TAMB = +25C AS1324, IOUT = 100mA 0.585 -30 2 VOUT Regulated Output Voltage AS1324-AD, IOUT = 100mA VFB AS1324-12, IOUT = 100mA 1.164 1.20 1.236 AS1324-15, IOUT = 100mA 1.455 1.50 1.545 AS1324-18, IOUT = 100mA 1.746 1.80 1.854 1 V VOUT Output Voltage Line Regulation VIN = 2.7 to 5.5V 0.1 VLOADREG Output Voltage Load Regulation IOUT = 0 to 100mA 0.02 IPK Peak Inductor Current VIN = 3V, VFB = 0.5V or VOUT = 90%, TAMB = 25C RPFET P-Channel FET RDS(ON) ILSW = 100mA 0.4 RNFET N-Channel FET RDS(ON) ILSW = -100mA 0.35 ILSW SW Leakage VEN = 0V, VSW = 0V or 5V 0.01 1 A 1 1.5 V 0.01 1 A 1.5 1.8 MHz %/V %/mA DC-DC Switches 0.5 0.75 1 A Control Inputs VEN EN Threshold IEN EN Leakage Current 0.3 Oscillator fOSC Oscillator Frequency VFB = 0.6V or VOUT = 100% 1.2 VFB = 0V or VOUT = 0V, TAMB = 25C 115 kHz 1. The device is tested in a proprietary test mode where VFB is connected to the output of the error amplifier. 2. Please see Feedback Resistor Selection on page 13 for resistor values. Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 4 - 20 AS1324 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics Parts used for measurement: 4.7H (MOS6020-472) Inductor, 10F (GRM188R60J106ME47) CIN and COUT. Figure 4. Efficiency vs. Output Current; VOUT = 1.2V 95 100 90 95 85 90 Efficiency (%) . Efficiency (%) . Figure 3. Efficiency vs. Input Voltage; VOUT = 1.8V 80 75 70 65 IOUT = 600mA 60 80 75 70 65 VIN = 2.5V VIN = 2.7V VIN = 3.7V VIN = 4.2V VIN = 5.5V 60 IOUT = 100mA 55 85 IOUT = 10mA IOUT = 1mA 55 50 50 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 1 Input Voltage (V) 100 1000 Figure 6. Efficiency vs. Output Current; VOUT = 1.8V 100 100 95 95 90 90 85 Efficiency (%) . Efficiency (%) . Figure 5. Efficiency vs. Output Current; VOUT = 1.5V 80 75 70 65 VIN = 2.5V VIN = 2.7V VIN = 3.7V VIN = 4.2V VIN = 5.5V 60 55 85 80 75 70 65 VIN = 2.5V VIN = 2.7V VIN = 3.7V VIN = 4.2V VIN = 5.5V 60 55 50 50 1 10 100 1000 1 Output Current (mA) 100 1000 Figure 8. Efficiency vs. Output Current; VOUT = 3.3V 100 95 95 90 90 85 85 Efficiency (%) . 100 80 75 70 65 VIN = 3.7V 60 10 Output Current (mA) Figure 7. Efficiency vs. Output Current; VOUT = 2.5V Efficiency (%) . 10 Output Current (mA) 80 75 70 65 60 VIN = 4.2V 55 VIN = 5.5V 50 55 VIN = 4.2V VIN = 5.5V 50 1 10 100 1000 1 Output Current (mA) www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 10 100 1000 Output Current (mA) Revision 1.05 5 - 20 AS1324 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 9. Switching Frequency vs. Supply Voltage Figure 10. Switching Frequency vs. Temperature 1.6 Switching Frequency (MHz) Switching Frequency (MHz) . . 1.6 1.55 1.5 1.45 1.4 2.7 3.1 3.5 3.9 4.3 4.7 5.1 1.55 1.5 1.45 1.4 -45 -30 -15 5.5 Input Voltage (V) 0 15 30 45 60 75 90 Temperature (C) Figure 11. Feedback Voltage vs. Temperature Figure 12. Output Voltage vs. Input Voltage 2 0.61 Output Voltage (V) . Feedback Voltage (V) . 1.95 0.605 0.6 0.595 1.9 1.85 1.8 1.75 1.7 IOUT = 600mA IOUT = 100mA IOUT = 10mA IOUT = 1mA IOUT = 100A 1.65 0.59 -45 -30 -15 1.6 0 15 30 45 60 75 2.7 90 3.1 Temperature (C) 3.9 4.3 4.7 5.1 5.5 Input Voltage (V) Figure 13. VOUT vs. IOUT; VOUTNOM = 1.2V Figure 14. VOUT vs. IOUT; VOUTNOM = 1.5V 1.6 1.3 Vin=2.5V Vin=2.5V Vin=2.7V Vin=2.7V Vin=5.5V 1.25 Output Voltage (V) . Output Voltage (V) . 3.5 Vin=5.5V 1.55 1.2 1.5 1.45 1.15 1.4 1.1 0 100 200 300 400 500 0 600 www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 100 200 300 400 500 600 Output Current (mA) Output Current (mA) Revision 1.05 6 - 20 AS1324 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 16. Quiescent Current vs. Temperature 50 50 45 45 Quiescent Current (A) . 40 35 30 25 20 15 10 5 40 35 30 25 20 15 10 5 0 4.7 5.1 0 -45 -30 -15 5.5 Input Voltage (V) 15 30 45 60 75 90 VOUT ISW IOUT 200mV/DIV 500mA/DIV Figure 18. Load Step 10mA to 200mA 600mA/DIV ISW VOUT Figure 17. Load Step 0mA to 600mA IOUT 0 Temperature (C) 200mV/DIV 4.3 500mA/DIV 3.9 200mA/DIV 3.5 500s/DIV 500s/DIV Figure 20. Powersave Mode VOUT ISW VSW 1V/DIV 560mA/DIV ISW VOUT EN 5V/DIV Figure 19. Startup 1ms/DIV www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 5V/DIV 3.1 100mV/DIV 2.7 200mA/DIV Quiescent Current (A) . Figure 15. Quiescent Current vs. Input Voltage 5s/DIV Revision 1.05 7 - 20 AS1324 Datasheet - D e t a i l e d D e s c r i p t i o n 8 Detailed Description The AS1324 is a high-efficiency buck converter that uses a constant-frequency current-mode architecture. The device contains two internal MOSFET switches and is available in adjustable- and fixed-output voltage versions. Figure 21. AS1324 - Block Diagram Ramp Compensator - VIN + OSCN VIN 4 ICOMP OSC CIN 10F Frequency Shift 5 VOUT/VFB FB R2 AS1324 + Error Amp - 0.6V R1 - 0.6V + VOVL OVDET + Digital Logic AntiShoot Through PMOS 3 - 1 EN 0.6V Reference 0.6V VOVL SW + Shutdown - VOUT COUT 10F NMOS + IRCMP 4.7H 2 GND Not applicable to AS1324 AS1324-12: R1 + R2 = 600k AS1324-15: R1 + R2 = 750k AS1324-18: R1 + R2 = 900k www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 8 - 20 AS1324 Datasheet - D e t a i l e d D e s c r i p t i o n 8.1 Main Control Loop During PWM operation the converters use a 1.5MHz fixed-frequency, current-mode control scheme. Basis of the current-mode PWM controller is an open-loop, multiple input comparator that compares the error-amp voltage feedback signal against the sum of the amplified current-sense signal and the slope-compensation ramp. At the beginning of each clock cycle, the internal high-side PMOS turns on until the PWM comparator trips. During this time the current in the inductor ramps up, sourcing current to the output and storing energy in the inductor's magnetic field. When the PMOS turns off, the internal low-side NMOS turns on. Now the inductor releases the stored energy while the current ramps down, still providing current to the output. The output capacitor stores charge when the inductor current exceeds the load and discharges when the inductor current is lower than the load. Under overload conditions, when the inductor current exceeds the current limit, the high-side PMOS is turned off and the low-side NMOS remains on until the next clock cycle. When the PMOS is off, the NMOS is turned on until the inductor current starts to reverse (as indicated by the current reversal comparator (IRCMP)), or the next clock cycle begins. The IRCMP detects the zero crossing. The peak inductor current (IPK) is controlled by the error amplifier. When IOUT increases, VFB decreases slightly relative to the internal 0.6V reference, causing the error amplifier's output voltage to increase until the average inductor current matches the new load current. The over-voltage detection comparator (OVDET) guards against transient overshoots by turning the main switch off and keeping it off until the transient is removed. 8.2 Powersave Operation The AS1324 uses an automatic powersave mode where the peak inductor current (IPK) is set to approximately 200mA while independent of the output load. In powersave mode, load current is supplied solely from the output capacitor. As the output voltage drops, the error amplifier output rises above the powersave threshold signaling to switch into PWM fixed frequency mode and turn the PMOS on. This process repeats at a rate determined by the load demand. Each burst event can last from a few cycles at light loads to almost continuous cycling (with short sleep intervals) at moderate loads. In between bursts, the power MOSFETs are turned off, as is any unneeded circuitry, reducing quiescent current to 30A. 8.3 Short-Circuit Protection In cases where the AS1324 output is shorted to ground, the oscillator frequency (fOSC) is reduced to 1/13 the nominal frequency ( 115kHz). This frequency reduction ensures that the inductor current has more time to decay, thus preventing runaway conditions. fOSC will progressively increase to 1.5MHz when VFB/VOUT > 0V. 8.4 Shutdown Connecting EN to GND or logic low places the AS1324 in shutdown mode and reduces the supply current to 0.1A. In shutdown the control circuitry and the internal NMOS and PMOS turn off and SW becomes high impedance disconnecting the input from the output. The output capacitance and load current determine the voltage decay rate. For normal operation connect EN to VIN or logic high. Note: Pin EN should not be left floating. www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 9 - 20 AS1324 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9 Application Information The AS1324 is perfect for mobile communications equipment like cell phones and smart phones, digital cameras and camcorders, portable MP3 and DVD players, PDA's and palmtop computers and any other handheld instruments. Figure 22. Single Li-Ion 1.2V/600mA Regulator for High-Efficiency VIN 2.7 to 4.2V 4 CIN 2.2F 4.7H 3 VIN SW COUT 10F AS1324 22pF 301k 5 1 VFB EN VOUT 1.2V 600mA R2 R1 2 GND 301k Figure 23. 5V Input to 3.3V/600mA Buck Regulator VIN 5V 4 CIN 4.7F 4.7H 3 VIN COUT 10F SW AS1324 22pF 301k 5 1 VFB EN VOUT 3.3V 600mA R2 R1 2 GND 66.5k Figure 24. Single Li-Ion 1.5V/600mA Regulator for High-Efficiency VIN 2.7 to 4.2V 4 CIN 4.7F 3 VIN SW AS1324-15 4.7H COUT 10F VOUT 1.5V 600mA 5 1 VOUT EN 2 GND www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 10 - 20 AS1324 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Figure 25. Single Li-Ion 1.8V/600mA Regulator for Low Output Ripple VIN 2.7 to 4.2V 4 CIN 10F 3 VIN 4.7H SW AS1324-18 COUT 22F VOUT 1.8V 600mA 5 1 VOUT EN 2 GND 9.1 External Component Selection 9.2 Inductor Selection For most applications the value of the external inductor should be in the range of 2.2 to 6.8H as the inductor value has a direct effect on the ripple current. The selected inductor must be rated for its DC resistance and saturation current. The inductor ripple current (IL) decreases with higher inductance and increases with higher VIN or VOUT. In Equation (EQ 2) the maximum inductor current in PWM mode under static load conditions is calculated. The saturation current of the inductor should be rated higher than the maximum inductor current as calculated with Equation (EQ 3). This is recommended because the inductor current will rise above the calculated value during heavy load transients. V OUT 1 - -------------V IN I L = V OUT x -----------------------Lxf (EQ 2) I L I LMAX = I OUTMAX + -------2 (EQ 3) Where: f = Switching Frequency (1.5 MHz typical) L = Inductor Value ILmax = Maximum Inductor current IL = Peak to Peak inductor ripple current The recommended starting point for setting ripple current is IL = 240mA (40% of 600mA). The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 720mA rated inductor should be sufficient for most applications (600mA + 120mA). A easy and fast approach is to select the inductor current rating fitting to the maximum switch current limit of the converter. Note: For highest efficiency, a low DC-resistance inductor is recommended. Accepting larger values of ripple current allows the use of low inductance values, but results in higher output voltage ripple, greater core losses, and lower output current capability. The total losses of the coil have a strong impact on the efficiency of the dc/dc conversion and consist of both the losses in the dc resistance and the following frequency-dependent components: 1. 2. 3. 4. The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies) Additional losses in the conductor from the skin effect (current displacement at high frequencies) Magnetic field losses of the neighboring windings (proximity effect) Radiation losses www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 11 - 20 AS1324 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 5. Recommended Inductors Part Number L DCR Current Rating Dimensions (L/W/T) LQH32CN2R2M33 2.2H 97m 790mA 3.2x2.5x2.0mm LQH32CN4R7M33 4.7H 150m 650mA 3.2x2.5x2.0mm LPS3008-222MLC 2.2H 175m 1100mA 3.1x3.1x0.8mm LPS3015-222MLC 2.2H 110m 2000mA 3.1x3.1x1.5mm MOS6020-222MLC 2.2H 35m 3260mA 6.0x6.8x2.4mm MOS6020-472MLC 4.7H 50m 1820mA 6.0x6.8x2.4mm CDRH3D16NP-2R2N 2.2H 72m 1200mA 4.0x4.0x1.8mm CDRH3D16ND-4R7N 4.7H 105m 900mA 4.0x4.0x1.8mm Manufacturer Murata www.murata.com Coilcraft www.coilcraft.com Sumida www.sumida.com Figure 26. Efficiency Comparison of Different Inductors, VIN = 2.7V, VOUT = 1.8V and 1.2V 95 95 VOUT = 1.8V 90 Efficiency (%) . 90 Efficiency (%) . VOUT = 1.2V 85 80 85 80 75 75 LQH32CN2R2 LPS3015-222 LQH32CN4R7 LQH32CN2R2 LPS3015-222 LQH32CN4R7 LPS3008-222 M OS6020-222 M OS6020-472 70 70 1 10 100 LPS3008-222 M OS6020-222 M OS6020-472 1000 1 10 100 1000 Output Current (mA) Output Current (mA) 9.3 Output Capacitor Selection The advanced fast-response voltage mode control scheme of the AS1324 allows the use of tiny ceramic capacitors. Because of their lowest output voltage ripple low ESR ceramic capacitors are recommended. X7R or X5R dielectric output capacitor are recommended. At high load currents, the device operates in PWM mode and the RMS ripple current is calculated as: V OUT 1 - -------------V IN 1 = V OUT x ------------------------ x ----------------I RMSC OUT Lxf 2x 3 (EQ 4) While operating in PWM mode the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the output capacitor: V OUT 1 - -------------(EQ 5) V IN 1 V OUT = V OUT x ------------------------ x -------------------------------- + ESR 8 x C OUT x f Lxf Higher value, low cost ceramic capacitors are available in very small case sizes, and their high ripple current, high voltage rating, and low ESR make them ideal for switching regulator applications. Because the AS1324 control loop is not dependant on the output capacitor ESR for stable operation, ceramic capacitors can be used to achieve very low output ripple and accommodate small circuit size. At light loads, the converter operates in powersave mode and the output voltage ripple is in direct relation to the output capacitor and inductor value used. Larger output capacitor and inductor values minimize the voltage ripple in powersave mode and tighten DC output accuracy in powersave mode. www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 12 - 20 AS1324 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.4 Input Capacitor Selection In continuous mode, the source current of the PMOS is a square wave of the duty cycle VOUT/VIN. To prevent large voltage transients while minimizing the interference with other circuits caused by high input voltage spikes, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given as: (EQ 6) V OUT x ( V IN - V OUT ) I RMS = I MAX x -----------------------------------------------------------V IN where the maximum average output current IMAX equals the peak current minus half the peak-to-peak ripple current, IMAX = ILIM - IL/2 This formula has a maximum at VIN = 2VOUT where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations only provide negligible affects. The input capacitor can be increased without any limit for better input voltage filtering. Take care when using small ceramic input capacitors. When a small ceramic capacitor is used at the input, and the power is being supplied through long wires, such as from a wall adapter, a load step at the output, or VIN step on the input, can induce ringing at the VIN pin. This ringing can then couple to the output and be mistaken as loop instability, or could even damage the part by exceeding the maximum ratings. 9.4.1 Ceramic Input and Output Capacitors When choosing ceramic capacitors for CIN and COUT, the X5R or X7R dielectric formulations are recommended. These dielectrics have the best temperature and voltage characteristics for a given value and size. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies and therefore should not be used. Table 6. Recommended Input and Output Capacitor Part Number C TC Code Rated Voltage Dimensions (L/W/T) JMK212BJ226MG-T 22F X5R 6.3V 0805 GRM188R60J106ME47 10F X5R 6.3V 0603 GRM21BR71A475KA73 4.7F X7R 10V 0805 Manufacturer Taiyo Yuden www.t-yuden.com Murata www.murata.com Because ceramic capacitors lose a lot of their initial capacitance at their maximum rated voltage, it is recommended that either a higher input capacity or a capacitance with a higher rated voltage is used. 9.5 Feedback Resistor Selection In the AS1324-AD, the output voltage is set by an external resistor divider connected to VFB (see Figure 27). This circuitry allows for remote voltage sensing and adjustment. Figure 27. Setting the AS1324 Output Voltage 0.6V VOUT 5.5V R2 5 AS1324 R1<<R2 VFB R1 2 GND Resistor values for the circuit shown in Figure 27 can be calculated as: R2 V OUT = 0,6 x 1 + ------R1 (EQ 7) The output voltage can be adjusted by selecting different values for R1 and R2. For R1 a value between 10k and 500k is recommended. A higher resistance of R1 and R2 will result in a lower leakage current at the output. It is recommended to keep VIN 500mV higher than VOUT. www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 13 - 20 AS1324 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.6 Efficiency The efficiency of a switching regulator is equivalent to: Efficiency = (POUT/PIN)100% (EQ 8) For optimum design, an analysis of the AS1324 is needed to determine efficiency limitations and to determine design changes for improved efficiency. Efficiency can be expressed as: Efficiency = 100% - (L1 + L2 + L3 + ...) (EQ 9) Where: L1, L2, L3, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, those four main sources should be considered for efficiency calculation: 9.6.1 Input Voltage Quiescent Current Losses The VIN current is the DC supply current given in the electrical characteristics which excludes MOSFET driver and control currents. VIN current results in a small (<0.1%) loss that increases with VIN, even at no load. The VIN quiescent current loss dominates the efficiency loss at very low load currents. 9.6.2 IR Losses Most of the efficiency loss at medium to high load currents are attributed to IR loss, and are calculated from the resistances of the internal switches (RSW) and the external inductor (RL). In continuous mode, the average output current flowing through inductor L is split between the internal switches. Therefore, the series resistance looking into the SW pin is a function of both NMOS & PMOS RDS(ON) as well as the duty cycle (DC) and can be calculated as follows: RSW = (RDS(ON)PMOS)(DC) + (RDS(ON)NMOS)(1 - DC) (EQ 10) The RDS(ON) for both MOSFETs can be obtained from the Electrical Characteristics on page 4. Thus, to obtain IR losses calculate as follows: IR losses = IOUT(RSW + RL) 9.6.3 (EQ 11) Switching Losses The switching current is the sum of the control currents and the MOSFET driver. The MOSFET driver current results from switching the gate capacitance of the power MOSFETs. If a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the DC bias current. In continuous mode: IGC = f(QPMOS + QNMOS) (EQ 12) Where: QPMOS and QNMOS are the gate charges of the internal MOSFET switches. The losses of the gate charges are proportional to VIN and thus their effects will be more visible at higher supply voltages. 9.6.4 Other Losses Basic losses in the design of a system should also be considered. Internal battery resistances and copper trace can account for additional efficiency degradations in battery operated systems. By making sure that CIN has adequate charge storage and very low ESR at the given switching frequency, the internal battery and fuse resistance losses can be minimized. CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% total additional loss. 9.7 Thermal Shutdown Due to its high-efficiency design, the AS1324 will not dissipate much heat in most applications. However, in applications where the AS1324 is running at high ambient temperature, uses a low supply voltage, and runs with high duty cycles (such as in dropout) the heat dissipated may exceed the maximum junction temperature of the device. As soon as the junction temperature reaches approximately 150C the AS1324 goes in thermal shutdown. In this mode the internal PMOS & NMOS switch are turned off. The device will power up again, as soon as the temperature falls below +145C again. 9.8 Checking Transient Response The main loop response can be evaluated by examining the load transient response. Switching regulators normally take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equivalent to: VDROP = IOUT x ESR (EQ 13) Where: ESR is the effective series resistance of COUT. IOUT also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady-state value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 14 - 20 AS1324 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.9 Design Example Figure 28 shows the AS1324 used in a single lithium-ion (3.7V typ) battery-powered mobile phone application. The load current requirement is 600mA (max) but most of the time the device will require only 2mA (standby mode current). Figure 28. Design Example VIN 3.7V 4 CIN 4.7F CER 2.2H 3 VIN SW AS1324 22pF 1M 5 1 VFB EN 2 GND COUT 10F CER VOUT 2.2V R1 R2 375k For the circuit shown in Figure 28, efficiency at low- and high-load currents is an important consideration when selecting the value for the external inductor, which is calculated as: V OUT V OUT (EQ 14) L = -------------- x 1 - -------------- fI L V IN From (EQ 14), substituting VOUT = 2.2V, VIN = 3.7V, IL = 240mA and f = 1.5MHz gives: 2,2V 2,2V L = ---------------------------------------------------- x 1 - ------------ = 2,48H ( 1,5MHz x 240mA ) 3 ,7V (EQ 15) Therefore, a standard 2.2H inductor should be used for this design. For best overall efficiency use an inductor with a rating of 720mA or greater and less than 0.2 series resistance. CIN will require an RMS current rating of at least 0.3A ILOAD(MAX)/2, whereas COUT will require an ESR of less than 0.25. In most cases, a ceramic capacitor will satisfy this requirement. For the feedback resistors, select the value for R1 = 375k. R2 can then be calculated from (EQ 7) to be: R2 = (VOUT/0.6 - 1)375k = 1000k www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 15 - 20 AS1324 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.10 Layout Considerations The AS1324 requires proper layout and design techniques for optimum performance. ! The power traces (GND, SW, and VIN) should be kept as short, direct, and wide as is practical. ! Pin VFB (AS1324 only) should be connected directly to the feedback resistors (R1 and R2). A potentiometer as replacement for R1 and R2 should be avoided to minimize the output voltage ripple and to maintain the stability of the regulator. ! The resistive divider (R1/R2) must be connected between the positive plate of COUT and ground. ! The positive plate of CIN should be connected as close to VIN as is practical since CIN provides the AC current to the internal power MOSFETs. ! Switching node SW should be kept far away from the sensitive VFB node. ! The negative plates of CIN and COUT should be kept as close to each other as is practical. A starpoint to Ground is recommended. Figure 29. AS1324 Basic PCB Layout Via to VIN 1 VOUT 2 L1 SW R1 VIN R2 Via to GND CFWD Via to VOUT 5 AS1324 3 4 CIN COUT GND Figure 30. AS1324 Basic Diagram High Current Path 1 EN 2 GND 5 VFB AS1324 R2 COUT VOUT L1 3 SW 4 VIN CIN www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 R1 CFWD VIN 16 - 20 AS1324 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Figure 31. AS1324-18 Basic PCB Layout Via to VIN VIN Via to VOUT 1 VOUT 2 L1 SW 5 AS1324-18 3 4 CIN COUT GND Figure 32. AS1324-18 Basic Diagram High Current Path 5 VOUT 1 EN 2 GND VOUT AS1324-18 COUT L1 4 VIN 3 SW CIN www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 VIN 17 - 20 AS1324 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 10 Package Drawings and Markings The device is available in an 5-pin TSOT-23 package. Figure 33. 5-pin TSOT-23 Package Symbol A A1 A2 b b1 c Min Typ 0.01 0.84 0.30 0.31 0.12 0.05 0.87 c1 0.08 D E E1 e e1 0.35 0.15 Max 1.00 0.10 0.90 0.45 0.39 0.20 0.13 0.16 Notes 2.90BSC 2.80BSC 1.60BSC 0.95BSC 1.90BSC 3,4 3,4 3,4 Symbol L L1 L2 N R R1 1 aaa bbb ccc ddd Min 0.30 Typ 0.40 0.60REF 0.25BSC 5 0.10 0.10 0 Max 0.50 Notes 0.25 4 8 4 10 12 Tolerances of Form and Position 0.15 0.25 0.10 0.20 Notes: 1. Dimensioning and tolerancing conform to ASME Y14.5M - 1994. 2. Dimensions are in millimeters. 3. Dimension D does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, and gate burrs shall not exceed 0.15mm per end. Dimension E1 does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.15mm per side. Dimensions D and E1 are determined at datum H. 4. The package top can be smaller than the package bottom. Dimensions D and E1 are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but include any mismatches between the top of the package body and the bottom. D and E1 are determined at datum H. www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 18 - 20 AS1324 Datasheet - O r d e r i n g I n f o r m a t i o n 11 Ordering Information The device is available as the following standard versions. Table 7. Ordering Information Ordering Code Marking Output Description Delivery Form Package AS1324-BTTT-AD ASKR adjustable 1.5MHz, 600mA Synchronous DC/DC Converter Tape and Reel 5-pin TSOT-23 AS1324-BTTT-12 ASKT 1.2V 1.5MHz, 600mA Synchronous DC/DC Converter Tape and Reel 5-pin TSOT-23 AS1324-BTTT-15 ASKU 1.5V 1.5MHz, 600mA Synchronous DC/DC Converter Tape and Reel 5-pin TSOT-23 AS1324-BTTT-18 ASKS 1.8V 1.5MHz, 600mA Synchronous DC/DC Converter Tape and Reel 5-pin TSOT-23 Note: All products are RoHS compliant. Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect Technical Support is found at http://www.austriamicrosystems.com/Technical-Support For further information and requests, please contact us mailto:sales@austriamicrosystems.com or find your local distributor at http://www.austriamicrosystems.com/distributor Design the AS1324 online at http://www.austriamicrosystems.com/analogbench analogbench is a powerful design and simulation support tool that operates in on-line and off-line mode to evaluate performance and generate application-specific bill-of-materials for austriamicrosystems' power management devices. www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 19 - 20 AS1324 Datasheet Copyrights Copyright (c) 1997-2010, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered (R). All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG Tobelbaderstrasse 30 A-8141 Unterpremstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact www.austriamicrosystems.com/DC-DC_Step-Down/AS1324 Revision 1.05 20 - 20