AS1362-BTTT-27 - austriamicrosystems AG

AS1361/AS1362

150mA/300mA, Ultra-Low-Noise, High-PSRR

Low Dropout Regulators, with POK

www.austriamicrosystems.com Revision 1.03 1 - 15

Datasheet

1 General Description

The AS1361/AS1362 are ultr a-low-noise, low-dropout

linear regulators specifically designed to deliver up to

150/300mA continuous output current, an d can achieve

a low 140mV dropout for 300mA load current. The LDOs

are designed and optimized to work with low-cost, small-

capacitance ceramic capacitors.

The devices are available as the standard prod ucts

listed in Table 1.

An integrated P-channel MOSFET pass transistor allows

the devices to maintain extremely low quiescent current

(40µA).

The AS1361/AS1362 uses an advanced architectu re to

achieve ultra-low output voltage noise of 9µVRMS and a

power-supply rejecti on-ratio of better than 80dB (up to

10kHz).

An active-Low, open-drain power-ok output indicates if

the output voltage is within regulation.

The AS1361/AS1362 requires only 1µF output capacitor

for stability at any load. When the LDO is disabled, cur-

rent consumption drops below 500nA.

The devices are available in a TSOT23 6-pin package.

Figure 1. Typical Application Circuit

2 Key Features

! Preset Output Voltages: 1.5 to 4.5V (in 50mV steps)

! Output Noise: 9µVRMS @ 100Hz to 100kHz

! Power-Supply Rejection Ratio: 92dB @ 1kHz

! Low Dropout: 140mV @ 300 mA Load

! Power-OK Output

! Stable with 1µF Ceramic Capacitor for any Load

! Guaranteed 150/300mA Output

! 1.25V Internal Reference

! Extremely-Low Quiescent Current: 40µA

! Excellent Load/Line Transient

! Overcurrent and Thermal Protection

! TSOT23 6-pin Package

3 Applications

The devices are ideal for mobile phones, wireless

phones, PDAs, handheld computers, mobile ph one

base stations, Bluetooth portable radios and accesso-

ries, wireless LANs, digital cameras, personal audio

devices, and any other portable, battery-powered ap pli-

cation.

Table 1. Standard Products

Model Load Current Output Voltage

AS1361 150mA Preset – 1.5 to 4.5V

AS1362 300mA Preset – 1.5 to 4.5V

AS1361/

AS1362

BYPASS

GND

OUT

SHDNN

CIN

1µF

Off

Input

2 to 5.5V

COUT

1µF

Output

1.5 to 4.5V

CBYPASS

10nF

POK

100kΩ

3SHDNN

GND

1IN

4POK

6OUT

AS1361/

AS1362 5BYPASS

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AS1361/AS1362

Datasheet - Pin o u t

4 Pinout

Pin Assignments

Figure 2. Pin Assignments (Top View)

Pin Descriptions

Table 2. Pin Descriptions

Pin Number Pin Name Description

1IN

Unregulated Inpu t Supp ly.

2GND

Ground

3 SHDNN Shutdown. Pull this pin low to disable the LDO.

4POK

Power-OK Output . Active-Low, open-drain output indicates if the output

voltage is within regulation.

0 = VOUT <94% VOUTNOM

1 = VOUT >94% VOUTNOM

5 BYPASS Noise Bypass for Low-Noise Operation. Connect a 10nF capacitor from

this pin to OUT.

Note: This pin is shorted to GND in shutdown mode.

6OUT

Regulate d Output Voltage. Byp ass th i s pi n wi t h a capacitor to GND. See

Capacitor Selection and Regulator Stability on page 12 for more details.

3SHDNN

GND

1IN

4POK

6OUT

TSOT23 6-pin

AS1361/

AS1362 5BYPASS

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AS1361/AS1362

Datasheet - Ab so lu te Ma xi mu m Rat in gs

5 Absolute Maximum Ratings

Stress es be yo n d th o s e li st ed in Table 3 may cause permanent damage to the device. These are stress ratings only,

and functional operation of the device at these or any othe r conditions beyond those indicated in Electrical Character-

istics on page 4 is not implied. Exposure to absolute maximum rating conditions for extend ed periods may affect

device reliability.

Table 3. Absolute Maximum Ratings

Parameter Min Max Units Comments

IN to GND -0.3 +7 V

OUT, SHDNN, POK to GND -0.3 IN +

0.3 V

BYPASS to GND -0.3 OUT +

0.3 V

Output Short-Circuit Dura tion Infinite

Thermal Resistance ΘJA 201.7 ºC/W on PCB

Operating Temperature Range -40 +85 ºC

Junction Temperature +150 ºC

Storage Temperatu re Range -65 +150 ºC

Package Body Temperature +260 ºC

The reflow peak soldering temperature (body

temperature) specified is in accordance with

IPC/JEDEC J-STD-020D “Moisture/Reflow

Sensitivity Classification for Non-Hermetic Solid

State Surface Mount Device s”.

The lead finish for Pb-free leaded packages is

matte tin (100% Sn).

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AS1361/AS1362

Datasheet - Ele c t r i c a l C h a r a c t e r i s t i c s

6 Electrical Characteristics

VIN = VOUT +0.5V, CIN = 1µF, COUT = 1µF, CBYPASS = 10nF, TAMB = -40 to +85ºC (unless otherwise specified). Typ val-

ues are at TAMB = +25ºC. Limits 100% tested at +25ºC. Limits over operating temperature range guaranteed by design.

Table 4. Electrical Characteristics

Symbol Parameter Condition Min Typ Max Unit

VIN Input Voltage Range 2 5.5 V

Output Voltage Accuracy

IOUT = 1mA, TAMB = +25ºC -0.5 +0.5

IOUT = 100µA to 150mA, TAMB = +25ºC

(AS1361) -0.75 +0.75

IOUT = 100µA to 300mA, TAMB = +25ºC

(AS1362) -1.0 +1.0

IOUT = 100µA to 150mA, (AS1361) -1.5 +1.5

IOUT = 100µA to 300mA, (AS1362) -2.0 +2.0

IOUT Maximum Output Current AS1361 150 mA

AS1362 300

ILIMIT Current Limit AS1361, OUT = 90% of nom., TAMB = +25º C 270 mA

AS1362, OUT = 90% of nom., TAMB = +25º C 510

Dropout Voltage 1

VOUT ≥ 3V, IOUT = 150mA 70 95

VOUT ≥ 3V, IOUT = 300mA, AS1362 140 200

2.5V ≤ VOUT < 3V, IOUT = 150mA 90 120

2.5V ≤ VOUT < 3V, IOUT = 300mA, AS1362 170 230

2.0V ≤ VOUT < 2.5V, IOUT = 150mA 140 190

2.0V ≤ VOUT < 2.5V, IOUT = 300mA, AS1362 270 350

IQQuiescent Current IOUT = 0.05mA 40 90 µA

VIN = VOUTNOM - 0.1V, IOUT = 0mA 150 250

VLNR Line Regulation VIN = (VOUT +0.5V) to 5.5V, IOUT = 0.1mA 0.02 %/V

VLDR Load Regulation IOUT = 1 to 150/300mA 0.0005 %/mA

ISHDNN Shutdown Supply Current SHDNN = 0V 9 500 nA

PSRR Ripple Rejection f = 1k Hz, IOUT = 10mA 92 dBf = 10kHz, IOUT = 10mA 80

f = 100kHz, IOUT = 10mA 62

Output Noise Voltage (RMS) f = 100Hz to 100kHz,

ILOAD = 0 to 150/300mA 9µV

Shutdown

Shutdown Exit Delay 2RLOAD = 50Ω300 µs

SHDNN Logic Low Level VIN = 2 to 5.5V 0.4 V

SHDNN Logic High Level VIN = 2 to 5.5V 1.5 V

Power-OK Output

VPOK Power-OK Voltage Threshold IOUT = 0, VOUTRISING 90 94 98 %

VOUT

Hysteresis, IOUT = 0 1.5

VOL POK Output Voltage Low ISINK = 1mA 0.3 V

POK Output Leakage Current VOUT in regulation 1 µA

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AS1361/AS1362

Datasheet - Ele c t r i c a l C h a r a c t e r i s t i c s

Thermal Protection

TSHDNM Thermal Shutdown

Temperature 160 ºC

ΔTSHDN

MThermal Shutdown

Hysteresis 15 ºC

1. Dropout is defined as VIN - VOUT when VOUT is 100mV below the value of VOUT for VIN = V OUT + 0.5V.

2. Time needed for VOUT to reach 90% of final value.

Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or

SQC (Statistical Quality Control) methods.

Table 4. Electrical Characteristics (Con tinued)

Symbol Parameter Condition Min Typ Max Unit

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AS1361/AS1362

Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s

7 Typical Operating Characteristics

VIN = VOUT + 0.5V, CIN = COUT = 1µF, CBYPASS = 10nF, TAMB = 25°C (unless otherwise specified).

Figure 3. Output Voltage vs. Input Voltage Figure 4. Output Voltage Accuracy vs. Load Current

0.5

1.5

2.5

3.5

0123456

I nput Voltage ( V)

Output V oltage ( V ) .

IOUT = 300mA

IOUT = 150mA

-0.5

-0.4

-0.3

-0.2

-0.1

0.1

0.2

0.3

0.4

0.5

0 50 100 150 200 250 300

Load Curr ent (mA)

O utput V olt age Dev iation (%) .

Temp = 85°C

Temp = 25°C

Temp = -45°C

Figure 5. Output Voltage Accuracy vs. Temperature Figure 6. Dropout Voltage vs. Load Current

-1

-0.8

-0.6

-0.4

-0.2

0.2

0.4

0.6

0.8

-40 -15 10 35 60 85

T emperature (° C)

O utput V olt age Dev iation (%) .

100

120

140

0 50 100 150 200 250 300

Load Curr ent (mA)

Dr opout V oltage (m V ) .

Temp = 85°C

Temp = 25°C

Temp = -45°C

Figure 7. Dropout Voltage vs. Output Voltage

2 2.2 2.4 2.6 2.8 3 3.2

Output V oltage (V )

Dr opout V oltage (m V ) .

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AS1361/AS1362

Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s

Figure 8. Ground Pin Current vs. Input Voltage Figure 9. Ground Pin Current vs. Load Current

100

125

150

0123456

Input Volt age (V)

Gr ound P in Cur r ent (µ A ) .

IOUT = 0mA

IOUT= 300mA

IOUT = 150mA

0 50 100 150 200 250 300

Load Curr ent (mA)

Gr ound P in Cur r ent (µ A ) .

Figure 10. Ground Pin Current vs. Temperature Figure 11. PSRR vs. Frequency; IOUT = 10mA

-40 -15 10 35 60 85

T emperature (° C)

Gr ound P in Cur r ent (µ A ) .

100

0.01 1 100 10000

F r equency (k Hz)

PSRR (dB)

Figure 12. Output Noise Spectral Density vs. Freq. Figure 13. Output Noise vs. Bypass Capacitance

100

1000

10000

0.01 0.1 1 10 100

F r equenc y (k Hz)

O utput Noise Dens ity ( nV / Hz ) .

110100

Capacitance ( nF )

Noise (µVrms) .

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AS1361/AS1362

Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s

Figure 14. Load Transient Response,

VIN = 3.8V, VOUT = 3.3V Figure 15. Load Transient Response near Dropout,

VIN = 3.4V, VOUT = 3.3V

200µs/Div

VOUT IOUT

20mV/DIV 20mA/Div

200µs/Div

VOUT IOUT

20mV/DIV 20mA/Div

Figure 16. Line Transient Response Figure 17. Enter & Exit Shutdown Delay

200µs/Div

VOUT

20mV/DIV 500mV/Div

VIN

200µs/Div

POK

2V/DIV 2V/Div

VOUT SHDNN

2V/Div

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AS1361/AS1362

Datasheet - D et a i l e d De s c r i p t i o n

8 Detailed Description

The AS1361/AS1362 are ultra-low-noise, low-dropout, low-quiescent current linear-regulators specifically designed for

space-limited applications. The devices are available with preset output voltages from 1.5 to 4.5V in 50mV increments.

These devices can supply loads up to 150/300mA. As shown in Figure 18, the AS1361/AS1362 consist of an inte-

grated bandgap core and noise bypass circuitry, error amplifier, P-channel MOSFET pass transistor, and internal feed-

back voltage-divider.

The output voltage is fed back through an internal resistor voltage-divider conn ected to pin OUT. An external bypass

capacitor connected to pin BYPASS reduces noise at the output. Additional blocks include a current limiter, thermal

sensor, and shutdown logic.

Internal Voltage Reference

The 1.25V bandgap reference is connected to the error amplifier’s inverting input. The error amplifier compares this

reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference

voltage, the pass-transistor gate is pulled low. This allows more current to pass to the output and increases the output

voltage. If the feedback voltage is too high, the pass transistor gate is pulled high, allowing less current to pass to the

output.

Internal P-Channel Pass Transistor

The AS1361/AS1362 feature a 0.5Ω (typ) P-chan nel MOSFET pass transistor, which provides several advantages

over similar designs using a PNP pass transistor, includ ing prolonged battery life. The P-channel MOSFET does not

require a base driver, thus quiescent current is dramatically reduce d. T he AS1361/AS1362 LDOs do not exhibit prob-

lems associated with typical PNP-based LDOs, and consume only 40µA of quiescent current in light load and 220µA in

dropout (see Typical Operating Char acteristics on page 6).

Output Voltage

The AS1361/AS1362 deliver preset output voltages from 1.5 to 4.5V, in 50mV increments (see Ordering Information on

page 14).

Shutdown

The AS1361/AS1362 feature a low-power shutdown mode that reduces quiescent current to <200nA. Driving SHDNN

low disables the internal voltage reference, error amplifier , gate-drive circuitry , and P-channel MOSFET pass transistor

(see Figure 18), and the device output enters a high-impedance state.

Note: For normal operation connect pin SHDNN to pin IN.

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AS1361/AS1362

Datasheet - D et a i l e d De s c r i p t i o n

Figure 18. AS1361/AS1362 - Block Diagram

Power-OK

The power-ok circuitry is built around an N-channe l MOSFET. The circuitry monitors the output voltage and if the volt-

age goes out of regulation (e.g. during dropout, current limit, or thermal shutdown) pin POK goes low.

The power-OK feature is not active during shutdown and provides a power-on-reset (POR) function that can operate

down to VIN = 1V. A capacitor to GND may be added to generate a POR delay.

To obtain a logic-level ou tput, connect a pull-up resistor from pin POK to pin OUT. Larger values for this resistor will

help minimize current consumption; a 100kΩ resistor is perfect for most applications (see Figure 1 on page 1).

Current Limit

The AS1361/AS1362 include a current limiting circuitry to monitor and control the P-channel MOSFET pass transis-

tor’s gate voltage, thus limiting the device output current to 270mA (AS1361) and 510mA (AS1362).

Note: See Table 4 on page 4 for the recommended min and max current limits. The output can be shorted to ground

indefinitely without causing damage to the device.

Thermal Protection

Integrated thermal protection circuitry limits total power dissipation in the AS1361/AS1362. When the junction temper-

ature (TJ) exceeds +160ºC, the thermal sensor signals the shutdown logic, turning off the P-channel MOSFET pass

transistor and allowing the device to cool down. The thermal sensor turns the pass transistor on again after the

device’s junction temperature drops by 10ºC, resulting in a pulsed output during continuous thermal-overload condi-

tions.

Note: Thermal pr otection i s designed to protect th e devices in the event of fault conditions. For continuous operation,

do not exceed the absolute maximum junction temperature rating of +150ºC.

Operating Region and Power Dissipation

The AS1361/AS1362 maximum power dissipation is dependant on the thermal resistance of the case and PCB, the

temperature difference between the die junction and TAMB, and airflow rate.

Power dissip a tion acro ss th e device is calculated as:

PD = IOUT (VIN - VOUT)(EQ 1)

AS1361/AS1362

Shutdown and

Power-Down

Control

Thermal

Sensor OUT

SHDNN

GND

BYPASS

MOS

Driver w/

ILIMIT

Error

Amp

POK

–

95%

1.25 Reference

and Noise Bypass

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AS1361/AS1362

Datasheet - D et a i l e d De s c r i p t i o n

The maximum power dissipation is calculated:

PDMAX = (TJ - TAMB)/(

JC +

CA)(EQ 2)

Where:

TJ - TAMB is the temperature difference between the AS1361/AS1362 die junction and the surrounding air;

θJC is the thermal resistance of the package;

θCA is the thermal resistance through the PC board/copper traces/other materials to the surrounding air.

Note: Pin GND of the AS1361/AS1362 provides the electrical connection to system ground and also serves as a heat

sink. Connect pin GND to the system ground using a large pad or ground plane.

Noise Reduction

The AS1361/AS1362 noise bypass circuitry dramatically reduces output noise, exhibiting 9µVRMS of output voltage

noise with CBYPASS = 0.01µF and COUT = 1µF. Use an external 0.01µF bypass cap acitor between pin BYPASS and pin

OUT (see Figure 1 on page 1).

Note: Startup time is minimized by internal power-on circuitry which pre-charges CBYPASS.

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AS1361/AS1362

Datasheet - App l i c a t i o n I n f o r m a t i o n

9 Application Information

Capacitor Selection and Regulator Stability

For normal operation, use a 1µF capacitor at pin IN and a 1µF capacitor at pin OUT. Larger input capacitor values and

lower ESR provide better noise rejection and line-transient response. Reduce output noise and improve load-transient

response, stability, and power-supply reje ction by using large output capacitors.

Note: Some ceramic dielectrics exhibit large capacitance and ESR variation with temperature. With dielectrics such

as Z5U and Y5V, it may be necessary to use a 2.2µF or larger output capacitor to ensure stability at tempera-

tures below -10°C. With X7R or X5R dielectrics, 1µF is sufficient at all operating temperatures.

Bypass Capacitor

Use a 0.01µF bypass capacitor at pin BYPASS for low-output voltage noise reduction. The leakage curren t going into

pin BYPASS should be less than 10nA. Increasing the capacitance slightly decreases the output noise. Values above

0.1µF and below 0.001µF are not recommended.

Noise, PSRR, and Transient Response

The AS1361/AS1362 are designed to deliver ultra-low noise and high PSRR, as well as low dropout and low quiescent

currents in battery-powered systems. The power-supply rejection is 92dB at 1kHz and 62dB at 100kHz. (see PSRR vs.

Frequency; IOUT = 10mA on page 7).

When operating from sources other than batteries, improved supply-noise rejection and transient response ca n be

achieved by increasing the values of the input and output capacitors, and through passive filtering techniques.

The Figure 16 and Figure 14 on page 8 show the AS1361/AS1362 line- and load-transient responses.

Dropout Voltage

The AS1361/AS1362 minimum dropout voltage determines the lowest usable supply voltage. In battery-powered sys-

tems, this determines the useful end-of-life battery voltage.

Since the AS1361/AS1362 use a P-channel MOSFET pass transistor, the dropout voltage is a function of drain-to-

source on-resistance (RDS(ON)) multiplied by ILOAD (see Figure 6 on page 6).

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AS1361/AS1362

Datasheet - Pa ck ag e D ra wing s a nd Ma rk in gs

10 Package Drawings and Markings

The devices are available in a TSOT23 6-pin package.

Figure 19. TSOT23 6-pin Package

Notes:

1. Dimensioning and tolerancing conform to ASME Y14.5M - 1994.

2. Dimensions are in millimeters.

3. Dimension D does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, and gate burrs shall

not exceed 0.15mm per end. Dimension E1 does not include interlead flash or protrusion. Interlead flash or pro-

trusion shall not exceed 0.15mm per side. Dimen sions D and E1 are determined at datum H.

4. The package top can be smaller than the package bottom. Dimensions D and E1 are determined at the outer-

most extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but

include any mistmatches between the top of the package body and the bottom. D and E1 are determined at

datum H.

Symbol Min Typ Max Notes Symbol Min Typ Max Notes

A 1.00 L 0.30 0.40 0.50

A1 0.01 0.05 0.10 L1 0.60REF

A2 0.84 0.87 0.90 L2 0.25BSC

b 0.30 0.45 N 6

b1 0.31 0.35 0.39 R 0.10

c 0.12 0.15 0.20 R1 0.10 0.25

c1 0.08 0.13 0.16 θ0º 4º 8º

D 2.90BSC 3,4 θ14º 10º 12º

E 2.80BSC 3,4 Tolerances of Form and Position

E1 1.60BSC 3,4 aaa 0.15

e 0.95BSC bbb 0.25

e1 1.90BSC ccc 0.10

ddd 0.20

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AS1361/AS1362

Datasheet - O r d e r i n g I n f o r m a t i o n

11 Ordering Information

The devices are available as the standard products shown in Table 5.

Non-standard devices from 1.5V to 4.5V are available in 50mV steps. For more informati on and inquiries contact

http://www.austriamicrosystems.com/contact

Note: All products are RoHS compliant and Pb-free.

Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect

For further information and requests, please contact us mailto:sales@austriamicrosystems.com

or find your local distributor at http://www.austriamicrosystems.com/distributor

Table 5. Ordering Information

Ordering Code Marking Output Current Output Voltage Delivery Form Package

AS1361-BTTT-15 ASL2 150mA 1.5V Tape and Reel TSOT23 6-pin

AS1361-BTTT-18 ASL3 150mA 1.8V Tape and Reel TSOT23 6-pin

AS1361-BTTT-25 ASL4 150mA 2.5V Tape and Reel TSOT23 6-pin

AS1361-BTTT-26 ASL5 150mA 2.6V Tape and Reel TSOT23 6-pin

AS1361-BTTT-27 ASL6 150mA 2.7V Tape and Reel TSOT23 6-pin

AS1361-BTTT-28 ASL7 150mA 2.8V Tape and Reel TSOT23 6-pin

AS1361-BTTT-285 ASL8 150mA 2.85V Tape and Reel TS OT23 6-pin

AS1361-BTTT-30 ASL9 150mA 3.0V Tape and Reel TSOT23 6-pin

AS1361-BTTT-33 ASMA 150mA 3.3V Tape and Reel TSOT23 6-pin

AS1361-BTTT-45 ASMB 150mA 4.5V Tape and Reel TSOT23 6-pin

AS1362-BTTT-15 ASMC 300mA 1.5V Tape and Ree l TS OT23 6-pin

AS1362-BTTT-18 ASMD 300mA 1.8V Tape and Ree l TS OT23 6-pin

AS1362-BTTT-25 ASME 300mA 2.5V Tape and Reel TSOT23 6-pin

AS1362-BTTT-26 ASMF 300mA 2.6V Tape and Reel TSOT23 6-pin

AS1362-BTTT-27 ASMG 300mA 2.7V Tape and Reel TSOT23 6-pin

AS1362-BTTT-28 ASMH 300mA 2.8V Tape and Ree l TS OT23 6-pin

AS1362-BTTT-285 ASMI 300mA 2.85V Tape and Reel TSOT 23 6-pin

AS1362-BTTT-30 ASMJ 300mA 3.0V Tape and Reel TSOT23 6-pin

AS1362-BTTT-33 ASMK 300mA 3.3V Tape and Reel TSOT23 6-pin

AS1362-BTTT-45 ASML 300mA 4.5V Tape and Reel TSOT23 6-pin

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AS1361/AS1362

Datasheet

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