ee =a ie -_ -_- _ - Features High speed 20 ns tay CMOS for optimum speed/power Transparent write (7C161A) Low active power 550 mW Low standby power 220 mW TTL-compatible inputs and outputs Automatic power-down when dese- lected CYPRESS CY7CI61A CY7C162A Functional Description The CY7C161A and CY7C162A are high- performance CMOS static RAMs orga- nizes as 16,384 by 4 bits with separate [/O. Easy memory expansion is provided by ac- tive LOW chip enables (CE;, CE2) and three-state drivers. They have an automat- ic power-down feature, reducing the power consumption by 60% when deselected. Writing to the device isaccomplished when the chip enable (CE), CE) and write en- able (WE) inputs are both LOW. Data on the four input pins (Ig through I3) is written 16K x 4 Static RAM with Separate I/O into the memory location specified on the address pins (Ag through Aj3). Reading the device is accomplished by tak- ing the chip enables (CE,, CE,) LOW while write enable (WE) remains HIGH. Under these conditions the contents of the memory location specified on the address pins will appear on the four data output pins. The output pins stay in high-impedance state when write enable (WE) is LOW (7C162A only), or one of the chip enables (CE,, CE2) are HIGH. A die coat is used to ensure alpha immunity. Logic Block Diagram INPUT BUFFER 256 x 256 ARRAY ROW DECODER SENSE AMPS Pin Configurations DIP Top View CIGIA-Y COLUMN DECODER cE, C1BIA2 cE, eo or N im =St*<i~*ts*SY Sn ze tw ON added WE 0E tT! Cte1A1 Selection Guidel'! 7C161A~15 7C161A-20 7C161A25 TCI6LA35 7C162A-15 7162A20 7C162A25 7C162A~35 Maximum Access Time (ns} 15 20 25 35 Maximum Operating Military 160 100 100 100 Current (mA) Maximum Standby Military 40/20 40/20 40/20 30/20 Current (mA) Shaded area contains preliminary information. Note: 1. For commercial specifications, see the CY7C 161/CY7C 162 datasheet.CY7C161A CYPRESS Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ...............0. Ambient Temperature with Power Applied .......... 00 cece eee ees Supply Voltage to Ground Potential (Pin 24 to Pin 12} oo... eee DC Voltage Applied to Outputs in High Z Statel?! DC Input Voltage!?) .. 0.00.00... ee. Output Current into Outputs (LOW) ... OSV to +7.0V --. 0.5V to +7.0V 2. Minimum voltage is equal to ~ 3.0V for pulse durations less than 30 ns. Ta is the instant on case temperature. Let ae ee eee 20 mA 3. CY7C162A Static Discharge Voltage ......0.... 00.00 case eee >2001V (per MIL-STD-883, Method 3015) 65C to + 150C Latch-Up Current 1.0.0.0... 0... eee eee eee >200 mA 55C to + 125C Operating Range Ambient ... <0.5V to +7.0V Range Temperature Vee Militaryl3] 55C to +125C 5V + 10% Notes: Electrical Characteristics Over the Operating Rangel! TCI61A15 7C161A20 7IC162A15 7C162A20 Parameter Description Test Conditions Min. Max. Min. Max. Unit Vou Output HIGH Voltage Vec = Min. low = -4.0mA 2.4 2.4 Vv VoL Output LOW Voltage Voc = Min. Io, = 8.0 mA 0.4 0.4 Vv Vin Input HIGH Voltage 2.2 Vec 2.2 Vec Vv Vit Input LOW Valtagel?] ~05 | 08 0.5 08 Vv hx Input Load Current GND < V| Vcc ~5 +5 5 +5 pA Ioz Output Leakage GND < V; < Voc, -5 +5 -S +5 uA Current Output Disabled los Output Short Voc = Max., Vour = GND 350 350 mA Circuit Currentl5| lec Vcc Operating Vec = Max. Military 160 100 mA Supply Current Iour = OmA Ispi Automatic CE Max. Vcc, CE > Vin, Military 40 40 mA Power-Down Current Min. Duty Cycle = 100% Isp2 Automatic CE Max. Vcc, Military 20 20 mA Power-Down Current CE; > Voc 0.3V, Vin = Voc - 03V or Vin < 0.3V Shaded area contains preliminary information.CY7CIGIA CYPRESS CY7C162A4 Electrical Characteristics Over the Operating Rangel4! (continued) TCIG1A25 7C161A-35 TCW2A25 7C162A-35 Parameter Description Test Conditions Min. | Max. | Min. Max. Unit Vou Output HIGH Voltage Voc = Min. lon = 4.0 mA 2.4 2.4 Vv VoL Output LOW Voltage Vcc = Min. lo = 8.0mA 0.4 0.4 Vv Vin Input HIGH Voltage 2.2 Voc 2.2 Vee Vv Vit Input LOW Voltagel2) -0.5 | 08 -0.5 0.8 Vv lx Input Load Current GND < Vi < Vcc 5 +5 -5 +5 pA loz Output Leakage Current GND < V; < Vcc, Output Disabled -5 +5 - +5 HbA los Output Short Vec = Max., Vour = GND 350 ~350 mA Circuit Currentl*! fae Voc Operating Vec = Max., our = OMA | Military {00 100 mA Supply Current spi Automatic CE Max. Voc, CE > Vin, Military 40 30 | mA Power-Down Current Min. Duty Cycie = 100% Ispo Automatic CE Max. Voc, Military 20 20 mA Power-Down Current CE, > Vcc 0.3V, Vin > Vec 0.3V or Vin < 0.3V Capacitance! Parameter Description Test Conditions Max. Unit Cin Input Capacitance Ta = 25C, f = | MHz, 10 pF Cout Output Capacitance Veo = 5.0V 10 pF Notes: 4. See the last page of this specification for Group A subgroup testing in- forma tion. 6. 5. Not more than t output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds. AC Test Loads and Waveforms Ri 4812 5Y OUTPUT 30 pF Ra 255Q INCLUDING LL. JIG AND = = Equivaler SCOPE (a) Normal Load nt to: sv Ri 4812 OUTPUT 5 pF Re 255Q INCLUDING LL JIG AND = = THEVENIN EQUIVALENT 1672 OUTPUT o__w4,__-9 1.73V SCOPE (b) High-Z Load Tested initially and after any design or process changes that may affect these parameters, ALL INPUT PULSES 3.0V GND <5ns <5ns ClBIA-S C161A-4CY7C161A erence levels of .5V, input pulse levels of 0 to 3.0V, and output loading of the specified Igi/IoH and 30-pF load capacitance. Both CE, and CE; are represented by CE in the Switching Character- istics and Waveforms sections. At any given temperature and voltage condition, tyz is less than tz for any given device. CYPRESS CY7C162A Switching Characteristics Over the Operating Rangel*. 7. 81 7C161A-15 7TC161A~20 TCI6IA25 FC16IA35 7C162A15 7C162A-~20 7C162A25 7C162A35 Parameter Description Min. | Max. [| Min. | Max. | Min. {| Max. | Min. | Max. | Unit READ CYCLE tre Read Cycle Time 15 20 25 35 ns taa Address to Data Valid 15 20 25 35 ns toHa Output Hold from 3 5 5 5 ns Address Change tack CE LOW to Data Valid 15 20 25 35 ns tpoE OE LOW to Data Valid 7 10 12 15 ns tLZ0F OE LOW to LOW Z 0 3 3 3 ns tHZOE OE HIGH to HIGH Z 8 8 10 12 ns tLzcE CE LOW to Low ZI 3 5 5 5 ns tuzce CE HIGH to High Z/. 10) 8 8 10 15 ns teu CE LOW to Power-Up 0 0 0 0 ns tpp CE HIGH to Power-Down 15 20 20 20 ns WRITE CYCLE!) twe Write Cycle Time 15 20 20 25 ns Isce CE LOW to Write End 10 15 20 25 ns taw Address Set-Up to Write End 10 15 20 25 ns CHA Address Hold from Write End 0 0 0 0 ns tsa Address Set-Up to Write Start 0 0 0 ns tpwe WE Pulse Width 10 15 15 20 ns tsp Data Set-Up to Write End 10 10 15 ns typ Data Hold from Write End 0 0 0 ns tLZWE WE HIGH to 3 5 5 5 ns Low Z1] (7C162A) tHZWE WE LOW to 7 7 7 10 ns High ZI? !0] (7C162A) towE WE LOW to 15 20 25 30 ns Data Valid (7C161A) tapv Data Valid 1o Output Valid 1. 20 20 30 ns (7CI6BLA) tDcE CE LOW to Data Valid 15 20 25 35 ns (7C161A) Shaded area contains preliminary information. Notes: 7. Test conditions assume signal transition time of Snsorless, timing ref- 10. tyizce and tyyzwe are specified with CL = 5 pF asin part (b) of AC Test Loads and Waveforms. Transition is measured +5(%) mV from steady- state voltage. . The internal write time of the memory is defined by the overlap of CE, LOW, CE2 LOW, and WE LOW. Both signals must be LOW to initiate awrite and either signal can terminate a write by going HIGH. The data input set-up and hald timing should be referenced to the rising edge of the signal that terminates the write.CY7C161A ; CYPRESS CY7C162A Switching Waveforms!*| Read Cycle No. 1112, 131 tac 1 ADDRESS B 4 }a___ ta foHA DATA QUT PREVIOUS DATA VALID 5 DATA VALID CIBIA-G Read Cycle No. 2{!2. 14] tro ce x tace OE tooe >| lr tHzoe tizoe >4 [* tHzce HIGH HIGH IMPEDANCE FF IMPEDANCE DATA OUT eee DATA VALID tice : ht tap Voc Pu \cc SUPPLY 50% 50% CURRENT 1SB CIBIA-7 Write Cycle No. t (WE Controlled)!!! \ two ADDRESS Sv SK 7 FSSA LLL LLL taw 1a > WE DATA IN DATA OUT (7C162A} DATA OUT (7C161A) Notes: 12. WE is HIGH for read cycle. 13. Device is continuously selected, CE,, CE2 = Viz. DATA UNDEFINED DATA UNDEFINED {owe tapv tuzwe tpwe tsp DATAy VALID tuo tzwe HIGH IMPEDANCE DATA VALID Ci61A-8 14, Address valid prior to or coincident with CE), CE) transition LOW.CY7C161A CY7C162A 3 J CYPRESS Switching Waveforms (continued) Write Cycle No. 2 (CE Controtled)!!!. 15] ADDRESS cE taw tpwe isp DATA VALID DATA IN HIGH IMPEDANCE DATA OUT (7C162A) tHzceE DATA OUT (7C161A) DATA VALID CIBIA-D tanv Note: 15. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state (7C162A only). Typical DC and AC Characteristics NORMALIZED SUPPLY CURRENT NORMALIZED SUPPLY CURRENT OUTPUT SOURCE CURRENT vs. SUPPLY VOLTAGE vs. AMBIENT TEMPERATURE > Ys. OUTPUT VOLTAGE 4 1.2 120 3 12 8 1.0 5 100 3 3 loc w 51,0 YL o a a 0.8 => 80 UW o8 W oO a 5 06 we 60 z Q =z < 2 0.6 = D9 o4 g 04 9 40 z 0. z 2 0.2 Isp 0.2; Ise E 20 0.0 0.0 a 0 4.0 45 5.0 55 6.0 55 25 125 0.0 1.0 2.0 3.0 4.0 SUPPLY VOLTAGE (V) AMBIENT TEMPERATURE (C) OUTPUT VOLTAGE (V)CY7C161A CYPRESS ATCA Typical DC and AC Characteristics (continued) NORMALIZED ACCESS TIME NORMALIZED ACCESS TIME OUTPUT SINK CURRENT ys. SUPPLY VOLTAGE ys, AMBIENT TEMPERATURE vs. OUTPUT VOLTAGE 1.6 140 = 120 $ g 14 5 3 a Ww 100 WwW ce N N12 | 5 Mw a =< < x = #10 Zz 60 ac o- nO g S | Vec = 5.0V 5 40 0.8 p& 2 3B 20 0.8 06 0 4.0 45 5.0 5.5 6.0 ~55 25 125 0.0 1.0 2.0 3.0 4.0 SUPPLY VOLTAGE (V) AMBIENT TEMPERATURE (C) OUTPUT VOLTAGE (Vv) TYPICAL POWER-ON CURRENT TYPICAL ACCESS TIME CHANGE vs. SUPPLY VOLTAGE ys. OUTPUT LOADING NORMALIZED I vs. CYCLE TIME 3.0 30.0 1.25 7 Veco = 5.0V Ta = 25C 2 25 _ 25.0 8 Veg = OBV 2 20 200 2 1.00 N N z 4 3 18 z La Z 15 = 16.0 3 5 id 5 S 1.0 & 10.0 Veo = 4.5V S 075 ra 0.5 5.0 Ta = 28C 0 0.0 0.50 00 10 20 30 40 50 0 200 400 600 800 1000 10 20 30 40 SUPPLY VOLTAGE (V) CAPACITANCE (pF) CYCLE FREQUENCY (MHz) Address Designators Address Address Pin Name Function Number AS X3 1 A6 x4 Al x5 3 A8 X6 4 AY X7 5 AlO YO 6 All Yi 7 Al2 Y5 8 Al3 Y4 9 AO Y3 23 Al Y2 24 A2 XO} 25 A3 x1 26 Ad x2 27CY7C161A i CYPRESS CY7C162A Ordering Information Speed Package Operating (ns) Ordering Code Name Package Type Range -15-+ | CY7C161A~1SDMB D22 28-Lead (300-Mil) CerDIP Military 20 CY7C161A20DMB D22 28-Lead (300-Mil) CerDIP Military 25 CY7C161A25DMB D22 28-Lead (300-Mil) CerDIP Military 35 CY7C161A35DMB D22 28-Lead (300-Mil) CerDIP Military Speed Package Operating (ns) Ordering Code Name Package Type Range 18 CY7C162A~1SDMB D22 28-Lead (300-Mil) CerDIP Military oS MGPICIEIA~SLMB L54 28-Pin Rectangular Leadless Chip Carrier 20 CY7C162A20DMB D22 28-Lead (300-Mil) CerDIP Military CY7C162A -20LMB L54 28-Pin Rectangular Leadless Chip Carrier 25 CY7C162A~25DMB D22 28-Lead (300-Mil) CerDIP Military CY7C162425LMB L54 28-Pin Rectangular Leadless Chip Carrier 35 CY7C162A35DMB D22 28-Lead (300)-Mil} CerDIP Military CY7C162A35LMB L54 28-Pin Rectangular Leadless Chip Carrier Shaded areas contain preliminary information. MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter Subgroups Vou 1,2,3 VoL 1, 2,3 Vin 1,23 Vi Max. 1,2,3 lix 1, 2,3 loz 1, 2,3 los 1,2,3 Icc 1,2,3 Isp 1, 2,3 Isp 1, 2,3 Document #: 38-00116C Switching Characteristics Parameter | Subgroups READ CYCLE tre 7, 8,9, 10, 11 taa 7, 8,9, 10, 11 lOHA 7, 8, 9, 10, 11 tacE 7, 8,9, 10, 11 tpoE 7, 8,9, 10, 1 WRITE CYCLE twe 7, 8, 9, 10, 11 tscE 7, 8,9, 10, 11 law 7, 8, 9, 10, 11 THA 7, 8,9, 10, 11 tsa 7, 8,9, 10, 11 tpwe 7, 8, 9, 10, 11 tsp 7,8,9,10, 11 typ 7, 8,9, 10, 11 towel! 7,8, 9, 10, 11 tapy 7, 8,9, 10, 11 Notes: 16. 7CIGIA only.