General Description
The MAX5068 is a high-frequency, current-mode,
pulse-width modulation (PWM) controller that integrates
all the building blocks necessary for implementing AC-
DC or DC-DC fixed-frequency power supplies. Isolated
or nonisolated power supplies are easily constructed
using either primary- or secondary-side regulation.
Current-mode control with leading-edge blanking sim-
plifies control-loop design, and a programmable inter-
nal slope-compensation circuit stabilizes the current
loop when operating at duty cycles above 50%. The
MAX5068A/B limit the maximum duty cycle to 50% for
use in single-ended forward converters. The
MAX5068C/D/E/F allow duty cycles up to 75%. The
MAX5068 features an accurate externally programma-
ble oscillator that simplifies system design.
An input undervoltage lockout (UVLO) programs the
input-supply startup voltage and ensures proper opera-
tion during brownout conditions.
A single external resistor programs the output switching
frequency from 12.5kHz to 1.25MHz. The MAX5068A/
B/C/E provide a SYNC input for synchronization to an
external clock. The maximum FET-driver duty cycle is
50% for the MAX5068A/B and 75% for the MAX5068C/
D/E/F. Programmable hiccup current limit provides
additional protection under severe faults.
The MAX5068 is specified over the -40°C to +125°C
automotive temperature range and is available in a
16-pin thermally enhanced TSSOP-EP package. Refer to
the MAX5069 data sheet for dual FET-driver applications.
Warning: The MAX5068 is designed to work with high
voltages. Exercise caution.
Applications
Universal-Input AC Power Supplies
Isolated Telecom Power Supplies
Networking System Power Supplies
Server Power Supplies
Industrial Power Conversion
Features
♦Current-Mode Control with 47µA (typ) Startup
Current
♦Resistor-Programmable ±4.5% Accurate
Switching Frequency:
25kHz to 1.25MHz (MAX5068A/B)
12.5kHz to 625kHz (MAX5068C/D/E/F)
♦Rectified 85VAC to 265VAC or 36VDC to 72VDC
Input (MAX5068A/C/D)
♦Input Directly Driven from 10.8V to 24V
(MAX5068B/E/F)
♦Frequency Synchronization Input
(MAX5068A/B/C/E)
♦Programmable Dead Time and Slope
Compensation
♦Programmable Startup Voltage (UVLO)
♦Programmable UVLO Hysteresis
(MAX5068A/B/D/F)
♦Integrating Fault Protection (Hiccup)
♦-40°C to +125°C Automotive Temperature Range
♦16-Pin Thermally Enhanced TSSOP-EP Package
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
________________________________________________________________ Maxim Integrated Products 1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RT REG5
IN
VCC
NDRV
AGND
PGND
AGND
CS
TOP VIEW
MAX5068A/B
TSSOP-EP
SYNC
HYST
FB
DT
UVLO/EN
COMP
FLTINT
Pin Configurations
Ordering Information
19-3176; Rev 1; 7/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
*EP = Exposed pad.
PART TEMP RANGE PIN-PACKAGE
MAX5068AAUE -40°C to +125°C 16 TSSOP-EP*
MAX5068BAUE -40°C to +125°C 16 TSSOP-EP*
MAX5068CAUE -40°C to +125°C 16 TSSOP-EP*
MAX5068DAUE -40°C to +125°C 16 TSSOP-EP*
MAX5068EAUE -40°C to +125°C 16 TSSOP-EP*
MAX5068FAUE -40°C to +125°C 16 TSSOP-EP*
Pin Configurations continued at end of data sheet.
Selector Guide appears at end of data sheet.
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VIN = +12V for the MAX5068B/E/F; VIN = +23.6V for the MAX5068A/C/D at startup, then reduces to +12V; CIN = CREG5 = 0.1µF;
CVCC = 1µF; RRT = 100kΩ; NDRV = floating; TA= TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN to PGND ............................................................-0.3V to +30V
IN to AGND.............................................................-0.3V to +30V
VCC to PGND..........................................................-0.3V to +13V
VCC to AGND..........................................................-0.3V to +13V
FB, COMP, CS, HYST, SYNC, REG5 to AGND ........-0.3V to +6V
UVLO/EN, RT, DT, SCOMP, FLTINT to AGND .........-0.3V to +6V
NDRV to PGND...........................................-0.3V to (VCC + 0.3V)
AGND to PGND .....................................................-0.3V to +0.3V
Continuous Power Dissipation
16-Pin TSSOP-EP (derate 21.3mW/°C above +70°C) ...1702mW
Operating Temperature Range..........................-40°C to +125°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
UNDERVOLTAGE LOCKOUT/STARTUP
Bootstrap UVLO Wake-Up Level VSUVR VIN rising, MAX5068A/C/D only 19.68 21.6 23.60 V
Bootstrap UVLO Shutdown Level VSUVF VIN falling, MAX5068A/C/D only 9.05 9.74 10.43 V
UVLO/EN Wake-Up Threshold VULR2 VUVLO/EN rising 1.205 1.230 1.255 V
UVLO/EN Shutdown Threshold VULF2 VUVLO/EN falling 1.18 V
HYST FET On-Resistance RD S
(
ON
)
_H MAX5068A/B/D/F only, sinking 50mA,
VUVLO/EN = 0V 10 Ω
HYST FET Leakage Current ILEAK_H VUVLO/EN = 2V, VHYST = 5V 3 nA
IN Supply Current In
Undervoltage Lockout ISTART VIN = +19V, VUVLO/EN < VULF2 47 90 µA
IN Range VIN 10.8 24.0 V
INTERNAL SUPPLIES (VCC and REG5)
VCC Regulator Set Point VCCSP V
IN = + 10.8V to + 24V , V
C C
sour ci ng 1µA to 25m A 7.0 10.5 V
REG5 Output Voltage VREG5 IREG5 = 0 to 1mA 4.85 5.00 5.15 V
REG5 Short-Circuit Current Limit IREG5_SC 18 mA
fSW = 1.25MHz 5
IN Supply Current After Startup IIN VIN = +24V fSW = 100kHz 2.5 mA
Shutdown Supply Current IIN_SD 90 µA
GATE DRIVER (NDRV)
ZOUT
(
LOW
)
NDRV sinking 100mA 2 4
Driver Output Impedance ZOUT
(
HIGH
)
NDRV sourcing 25mA 3 6 Ω
Sinking 1000
Driver Peak Output Current INDRV Sourcing 650 mA
PWM COMPARATOR
Comparator Offset Voltage VOS_PWM VCOMP - VCS 1.30 1.60 2.00 V
Comparator Propagation Delay tPD_PWM VCS = 0.1V 40 ns
Minimum On-Time tON
(
MIN
)
Includes tCS_BLANK 110 ns
CURRENT-LIMIT COMPARATOR
Current-Limit Trip Threshold VCS 298 314 330 mV
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
_______________________________________________________________________________________ 3
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CS Input Bias Current IB_CS VCS = 0V 0 +2 µA
CS Blanking Time tCS_BLANK 70 ns
Propagation Delay from
Comparator Input to NDRV 50mV overdrive 40 ns
IN CLAMP VOLTAGE
IN Clamp Voltage VIN_CLAMP VIN sinking 2mA (Note 2) 24.0 26.0 29.0 V
ERROR AMPLIFIER (FB, COMP)
Voltage Gain AVRCOMP = 100kΩ to AGND 80 dB
Unity-Gain Bandwidth BW RCOMP = 100kΩ to AGND,
CLOAD = 100pF to AGND 5 MHz
Phase Margin PM RCOMP = 100kΩ to AGND,
CLOAD = 100pF to AGND 65 degrees
FB Input Offset Voltage VOS_FB 3mV
High 2.6 3.8
COMP Clamp Voltage VCOMP Low 0.4 1.1 V
Error-Amplifier Output Current ICOMP Sinking or sourcing 0.5 mA
+25°C ≤ TA ≤ +125°C (Note 3) 1.215 1.230 1.245
Reference Voltage VREF -40°C ≤ TA ≤ +125°C 1.205 1.230 1.242 V
Input Bias Current IB_EA 100 300 nA
COMP Short-Circuit Current ICOMP_SC 12 mA
THERMAL SHUTDOWN
Thermal-Shutdown Temperature TSD +170 °C
Thermal Hysteresis THYST +25 °C
OSCILLATOR SYNC INPUT (MAX5068A/B/C/E Only)
SYNC High-Level Voltage VIH_SYNC 2.4 V
SYNC Low-Level Voltage VIL_SYNC 0.4 V
SYNC Input Bias Current IB_SYNC 10 nA
Maximum SYNC Frequency fSYNC fOSC = 2.5MHz (Note 4) 3.125 MHz
SYNC High-Level Pulse Width tSYNC_HI 30 ns
SYNC Low-Level Pulse Width tSYNC_LO 30 ns
DIGITAL SOFT-START
Soft-Start Duration tSS (Note 5) 2047 cycles
Reference-Voltage Step VSTEP 9.7 mV
Reference-Voltage Steps During
Soft-Start 127 steps
OSCILLATOR
Internal Oscillator Frequency
Range fOSC fOSC = (1011 / RRT) 50 2500 kHz
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +12V for the MAX5068B/E/F; VIN = +23.6V for the MAX5068A/C/D at startup, then reduces to +12V; CIN = CREG5 = 0.1µF;
CVCC = 1µF; RRT = 100kΩ; NDRV = floating; TA= TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
4 _______________________________________________________________________________________
Note 1: The MAX5068 is 100% tested at TA= +25°C. All limits over temperature are guaranteed by design.
Note 2: The MAX5068A/B are intended for use in universal-input power supplies. The internal clamp circuit is used to prevent the
bootstrap capacitor (C1 in Figure 1) from charging to a voltage beyond the absolute maximum rating of the device when
UVLO/EN is low. The maximum current to VIN (hence to clamp) when UVLO is low (device is in shutdown) must be external-
ly limited to 2mA. Clamp currents higher than 2mA may result in clamp voltages higher than 30V, thus exceeding the
absolute maximum rating for VIN. For the MAX5068C/D, do not exceed the 24V maximum operating voltage of the device.
Note 3: Reference voltage (VREF) is measured with FB connected to COMP (see the Functional Diagram).
Note 4: The SYNC frequency must be at least 25% higher than the programmed oscillator frequency.
Note 5: The internal oscillator clock cycle.
Note 6: The MAX5068A/B driver switching frequency is one-half of the oscillator frequency. The MAX5068C/D/E/F driver switching
frequency is one-quarter of the oscillator frequency.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
fSW = 1011/(2 x RRT),
MAX5068A/B 25 1250 kHz
NDRV Switching Frequency fSW (Note 6)
fSW = 1011/(4 x RRT),
MAX5068C/D/E/F 12.5 625 kHz
RT Voltage VRT 40kΩ < RRT < 500kΩ2.0 V
fOSC ≤ 500kHz -2.5 +2.5
TA = +25°C fOSC > 500kHz -4 +4
fOSC ≤ 500kHz -4.5 +4.5
Oscillator Accuracy
TA
= - 40° C to + 125° C fOSC > 500kHz -6 +6
%
MAX5068A/B 50
Maximum Duty Cycle DMAX DT connected to
REG5 MAX5068C/D/E/F 75 %
DEAD-TIME CONTROL (DT)
Dead Time tDT RDT = 24.9kΩ60 ns
Dead-Time Disable Voltage V
D T_D IS ABLE VREG5
- 0.5V V
Dead-Time Regulation Voltage VDT 1.23 V
INTEGRATING FAULT PROTECTION (FLTINT)
FLTINT Source Current IFLTINT VFLTINT = 0 60 µA
FLTINT Shutdown Threshold VFLTINT_SD VFLTINT rising 2.8 V
FLTINT Restart Threshold VFLTINT_RS VFLTINT falling 1.6 V
SLOPE COMPENSATION (SCOMP) MAX5068C/D/E/F Only
Slope Compensation VSLOPE CSLOPE = 100pF, RRT = 110kΩ15 mV/µs
Slope-Compensation Range VSLOPER 0 90 mV/µs
Slope-Compensation Voltage
Range VSCOMP 0 2.7 V
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +12V for the MAX5068B/E/F; VIN = +23.6V for the MAX5068A/C/D at startup, then reduces to +12V; CIN = CREG5 = 0.1µF;
CVCC = 1µF; RRT = 100kΩ; NDRV = floating; TA= TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
_______________________________________________________________________________________ 5
BOOTSTRAP UVLO WAKE-UP LEVEL
vs. TEMPERATURE
MAX5068 toc01
TEMPERATURE (°C)
VIN (V)
85603510-15
21.1
21.2
21.3
21.4
21.5
21.6
21.0
-40 110
MAX5068A/C/D
BOOTSTRAP UVLO SHUTDOWN LEVEL
vs. TEMPERATURE
MAX5068 toc02
TEMPERATURE (°C)
VIN (V)
85603510-15
9.6
9.7
9.8
9.9
10.0
9.5
-40 110
VIN FALLING
MAX5068A/C/D
UVLO/EN WAKE-UP THRESHOLD
vs. TEMPERATURE
MAX5068 toc03
TEMPERATURE (°C)
UVLO/EN (V)
85603510-15
1.225
1.230
1.235
1.240
1.245
1.220
-40 110
UVLO/EN RISING
UVLO/EN SHUTDOWN THRESHOLD
vs. TEMPERATURE
MAX5068 toc04
TEMPERATURE (°C)
UVLO/EN (V)
85603510-15
1.12
1.11
1.14
1.13
1.16
1.15
1.18
1.17
1.19
1.20
1.10
-40 110
UVLO/EN FALLING
VIN SUPPLY CURRENT IN
UNDERVOLTAGE LOCKOUT vs. TEMPERATURE
MAX5068 toc05
TEMPERATURE (°C)
ISTART (µA)
85603510-15
44
48
52
56
60
40
-40 110
VIN = 19V
WHEN IN BOOTSTRAP UVLO (MAX5068A/C/D)
UVLO/EN (MAX5068B/E/F) IS LOW
VIN SUPPLY CURRENT AFTER STARTUP
vs. TEMPERATURE
MAX5068 toc06
TEMPERATURE (°C)
IIN (mA)
85603510-15
2
3
4
5
6
1
-40 110
VIN = 24V
fSW = 1.25MHz
fSW = 500kHz
fSW = 250kHz
fSW = 100kHz
fSW = 50kHz
VCC vs. TEMPERATURE
MAX5068 toc07
TEMPERATURE (°C)
VCC (V)
85603510-15
7.6
7.3
8.2
7.9
8.8
8.5
9.4
9.1
9.7
10.0
7.0
-40 110
VIN = 19V, IIN = 25mA
VIN = 19V, IIN = 10mA
VIN = 10.8V, IIN = 10mA
VIN = 10.8V, IIN = 25mA
REG5 OUTPUT VOLTAGE
vs. OUTPUT CURRENT
MAX5068 toc08
OUTPUT CURRENT (mA)
REG5 (V)
1.81.61.41.21.00.80.60.40.2
4.955
4.960
4.965
4.970
4.975
4.980
4.950
0 2.0
RRT = 100kΩ
REG5 vs. TEMPERATURE
MAX5068 toc09
TEMPERATURE (°C)
REG5 (V)
85603510-15
4.92
4.91
4.94
4.93
4.96
4.95
4.98
4.97
4.99
5.00
4.90
-40 110
VIN = 10.8V
100µA LOAD
1mA LOAD
Typical Operating Characteristics
(VIN = +12V for the MAX5068B/E/F; VIN = +23.6V for MAX5068A/C/D at startup, then reduces to +12V; CIN = CREG5 = 0.1µF;
CVCC = 1µF; RRT = 100kΩ; NDRV = floating; VFB = 0; VCOMP = floating; VCS = 0; TA= +25°C, unless otherwise noted.)
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VIN = +12V for the MAX5068B/E/F; VIN = +23.6V for MAX5068A/C/D at startup, then reduces to +12V; CIN = CREG5 = 0.1µF;
CVCC = 1µF; RRT = 100kΩ; NDRV = floating; VFB = 0; VCOMP = floating; VCS = 0; TA= +25°C, unless otherwise noted.)
REG5 OUTPUT VOLTAGE vs. VIN
MAX5068 toc10
VIN (V)
REG5 (V)
222016 18141210 24
4.976
4.977
4.978
4.979
4.980
4.981
4.982
4.983
4.984
4.985
4.975
IREG5 = 100µA
CS TRIP THRESHOLD
vs. TEMPERATURE
MAX5068 toc11
TEMPERATURE (°C)
CS TRIP THRESHOLD (mV)
110
85603510-15
306
303
309
315
312
321
318
327
324
330
300
-40
SWITCHING FREQUENCY
vs. TEMPERATURE
MAX5068 toc12
TEMPERATURE (°C)
SWITCHING FREQUENCY (kHz)
110
856035-15 10
480
475
485
495
490
505
500
515
510
520
470
-40
fSW = 500kHz TOTAL NUMBER OF
DEVICES = 200
MEAN
-3σ
+3σ
PROPAGATION DELAY FROM CS COMPARATOR
INPUT TO NDRV vs. TEMPERATURE
MAX5068 toc13
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
1108535 6010-15
32
34
36
38
40
42
44
46
48
50
30
-40
INPUT CURRENT
vs. INPUT CLAMP VOLTAGE
MAX5068 toc14
INPUT CLAMP VOLTAGE (V)
INPUT CURRENT (mA)
27.525.022.520.017.515.012.5
2
4
6
8
10
12
14
0
10.0 30.0
INPUT CLAMP VOLTAGE
vs. TEMPERATURE
MAX5068 toc15
TEMPERATURE (°C)
INPUT CLAMP VOLTAGE (V)
1108535 6010-15
25.2
25.4
25.6
25.8
26.0
26.2
26.4
26.6
26.8
27.0
25.0
-40
ISINK = 2mA
NDRV OUTPUT IMPEDANCE
vs. TEMPERATURE
MAX5068 toc16
TEMPERATURE (°C)
RON (Ω)
85603510-15
1.4
1.2
1.8
1.6
2.2
2.0
2.6
2.4
2.8
3.0
1.0
-40 110
VIN = 24V
SINKING 100mA
NDRV OUTPUT IMPEDANCE
vs. TEMPERATURE
MAX5068 toc17
TEMPERATURE (°C)
RON (Ω)
85603510-15
2.4
2.2
2.8
2.6
3.2
3.0
3.6
3.4
3.8
4.0
2.0
-40 110
VIN = 24V
SOURCING 25mA
ERROR AMPLIFIER OPEN-LOOP GAIN
AND PHASE vs. FREQUENCY
MAX5068 toc18
FREQUENCY (Hz)
GAIN (dB)
PHASE (DEGREES)
10M10 100k1k
-20
0
20
40
60
80
100
120
-40
-180
-150
-120
-90
-60
-30
0
30
-210
0.1
GAIN
PHASE
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
_______________________________________________________________________________________ 7
FLTINT CURRENT vs. TEMPERATURE
MAX5068 toc19
TEMPERATURE (°C)
FLTINT CURRENT (µA)
85603510-15
62.2
62.1
62.4
62.3
62.6
62.5
62.8
62.7
62.9
63.0
62.0
-40 110
HYST RON vs. TEMPERATURE
MAX5068 toc20
TEMPERATURE (°C)
RON (Ω)
85603510-15
9.0
8.5
10.0
9.5
11.0
10.5
12.0
11.5
12.5
13.0
8.0
-40 110
VIN = 24V
SINKING 50mA
NDRV SWITCHING FREQUENCY (fSW)
vs. RRT
MAX5068 toc21
RRT (MΩ)
fSW (MHz)
0.1 1
0.1
1
2
0.01
0.03 2
MAX5068A/B
MAX5068C/D/E/F
NDRV SWITCHING FREQUENCY
vs. TEMPERATURE
MAX5068 toc22
TEMPERATURE (°C)
NDRV SWITCHING FREQUENCY (kHz)
1108535 6010-15
48.4
48.8
49.2
49.6
50.0
50.4
50.8
51.2
51.6
52.0
48.0
-40
fSW = 50kHz
NDRV SWITCHING FREQUENCY
vs. TEMPERATURE
MAX5068 toc23
TEMPERATURE (°C)
NDRV SWITCHING FREQUENCY (kHz)
100 125
75
50
250-25
497
496
498
500
499
502
501
504
503
505
495
-50
fSW = 500kHz
NDRV SWITCHING FREQUENCY
vs. TEMPERATURE
MAX5068 toc24
TEMPERATURE (°C)
NDRV SWITCHING FREQUENCY (kHz)
110
85
60
3510-15
1.15
1.20
1.25
1.30
1.35
1.40
1.10
-40
MAX5068A/B
fSW = 1.25MHz
DEAD TIME vs. TEMPERATURE
MAX5068 toc25
TEMPERATURE (°C)
TIME (ns)
11085603510-15
45
50
55
60
65
70
40
-40
VIN = 24V
RDT = 24.9kΩ
RRT = 100kΩ
DEAD TIME vs. RDT
MAX5068 toc26
RDT (kΩ)
TIME (ns)
10
20
40
60
80
100
120
140
160
180
200
0
1100
Typical Operating Characteristics (continued)
(VIN = +12V for the MAX5068B/E/F; VIN = +23.6V for MAX5068A/C/D at startup, then reduces to +12V; CIN = CREG5 = 0.1µF;
CVCC = 1µF; RRT = 100kΩ; NDRV = floating; VFB = 0; VCOMP = floating; VCS = 0; TA= +25°C, unless otherwise noted.)
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
8 _______________________________________________________________________________________
Pin Description
PIN
MAX5068A
MAX5068B
MAX5068C
MAX5068E
MAX5068D
MAX5068F
NAME FUNCTION
111RT
Oscillator-Timing Resistor Connection. Connect a resistor from RT to AGND
to set the internal oscillator frequency.
2 2 — SYNC External-Clock Sync Input. Connect SYNC to AGND when not using an
external clock.
3 — 2 HYST Programmable Hysteresis Input
—3 3
SCOMP
Slope-Compensation Capacitor Input. Connect a capacitor to AGND to set
the slope compensation.
444DT
Dead-Time Adjustment. Connect a resistor from DT to AGND to adjust NDRV
dead time. Connect to REG5 for maximum duty cycle.
555
UVLO/EN
Externally Programmable Undervoltage Lockout. UVLO/EN programs the
input start voltage. Drive UVLO/EN to AGND to disable the output.
6 6 6 FB Error-Amplifier Inverting Input
7 7 7 COMP Error-Amplifier Compensation Output
888
FLTINT
Fault-Integration Input. A capacitor connected to FLTINT charges with an
internal 60µA current source during repeated current-limit events. Switching
terminates when VFLTINT reaches 2.9V. An external resistor connected in
parallel discharges the capacitor. Switching resumes when VFLTINT drops to
1.6V.
9 9 9 CS Current-Sense Resistor Connection
10, 12 10, 12 10, 12 AGND Analog Ground. Connect to PGND through a ground plane.
11 11 11 PGND Power Ground. Connect to AGND through a ground plane.
13 13 13 NDRV G ate- D r i ver O utp ut. C onnect the N D RV outp ut to the g ate of the exter nal
N - channel FE T.
14 14 14 VCC 9V Linear-Regulator Output. Decouple VCC with a minimum 1µF ceramic
capacitor to the AGND plane; also internally connected to the FET driver.
15 15 15 IN
Power-Supply Input. IN provides power for all internal circuitry. Decouple IN
with a minimum 0.1µF ceramic capacitor to AGND (see the Typical
Operating Circuit).
16 16 16 REG5 5V Linear-Regulator Output. Decouple to AGND with a 0.1µF ceramic
capacitor.
EP EP EP PAD Exposed Pad. Connect to GND.
Detailed Description
The MAX5068 is a current-mode PWM controller for use
in isolated and nonisolated power-supply applications.
A bootstrap UVLO with a programmable hysteresis,
very low startup, and low operating current result in
high-efficiency universal-input power supplies. In addi-
tion to the internal bootstrap UVLO, the device also
offers programmable input startup and turn-off volt-
ages, programmed through the UVLO/EN input. When
using the MAX5068 in the bootstrapped mode, if the
power-supply output is shorted, the tertiary winding
voltage drops below the 10V threshold, causing the
bootstrap UVLO to turn off the gate drive to the external
power MOSFET, reinitiating a startup sequence with
soft-start.
The MAX5068 includes a cycle-by-cycle current limit
that turns off the gate drive to the external MOSFET
during an overcurrent condition. The MAX5068 integrat-
ing fault protection reduces average power dissipation
during persistent fault conditions (see the Integrating
Fault Protection section).
The MAX5068 features a very accurate, wide-range,
programmable oscillator that simplifies and optimizes
the design of the magnetics. The MAX5068A/C/D are
well suited for universal-input (rectified 85VAC to
265VAC) or telecom (-36VDC to -72VDC) power sup-
plies. The MAX5068B/E/F are well suited for low-input
voltage (10.8VDC to 24VDC) power supplies.
The MAX5068 high-frequency, universal input, offline/
telecom, current-mode PWM controller integrates all the
building blocks necessary for implementing AC-DC and
DC-DC fixed-frequency power supplies. Isolated or non-
isolated power supplies are easily constructed using
either primary- or secondary-side regulation. Current-
mode control with leading-edge blanking simplifies con-
trol-loop design, and an external slope-compensation
control stabilizes the current loop when operating at
duty cycles above 50% (MAX5068C/D/E/F). The
MAX5068A/B limit the maximum duty cycle to 50% for
use in single-ended forward converters. The
MAX5068C/D/E/F allow duty cycles up to 75% for use in
flyback converters.
An input undervoltage lockout (UVLO) programs the
input-supply startup voltage and ensures proper opera-
tion during brownout conditions. An external voltage-
divider programs the supply startup voltage. The
MAX5068A/B/D/F feature a programmable UVLO hys-
teresis. The MAX5068A/C/D feature an additional internal
bootstrap UVLO with large hysteresis that requires a min-
imum startup voltage of 23.6V. The MAX5068B/E/F start
up from a minimum voltage of 10.8V. Internal digital soft-
start reduces output-voltage overshoot at startup.
A single external resistor programs the switching fre-
quency from 12.5kHz to 1.25MHz. The MAX5068A/B/C/E
provide a SYNC input for synchronization to an external
clock. The maximum FET driver duty cycle is 50% for the
MAX5068A/B, and 75% for the MAX5068C/D/E/F.
Integrating fault protection ignores transient overcurrent
conditions for a set length of time. The length of time is
programmed by an external capacitor. The internal ther-
mal-shutdown circuit protects the device if the junction
temperature should exceed +170°C.
Power supplies designed with the MAX5068 use a
high-value startup resistor, R1, which charges a reser-
voir capacitor, C1 (Figure 1). During this initial period,
while the voltage is less than the internal bootstrap
UVLO threshold, the device typically consumes only
47µA of quiescent current. This low startup current and
the large bootstrap UVLO hysteresis help to minimize
the power dissipation across R1, even at the high end
of the universal AC input voltage (265VAC).
The MAX5068 includes a cycle-by-cycle current limit
that turns off the gate to the external MOSFET during an
overcurrent condition. When using the MAX5068A/C/D
in the bootstrap mode (if the power-supply output is
shorted), the tertiary winding voltage drops below the
9.74V bootstrap UVLO to turn off the gate to the exter-
nal power MOSFET. This reinitiates a startup sequence
with soft-start.
Current-Mode Control
The MAX5068 offers a current-mode control operation
feature, such as leading-edge blanking with a dual
internal path that only blanks the sensed current signal
applied to the input of the PWM controller. The current-
limit comparator monitors CS at all times and provides
cycle-by-cycle current limit without being blanked. The
leading-edge blanking of the CS signal prevents the
PWM comparator from prematurely terminating the on
cycle. The CS signal contains a leading-edge spike
that results from the MOSFET gate charge current, and
the capacitive and diode reverse-recovery current of
the power circuit. Since this leading-edge spike is nor-
mally lower than the current-limit comparator threshold,
current limiting is provided under all conditions.
Use the MAX5068C/D/E/F in flyback applications where
wide line voltage and load-current variations are
expected. Use the MAX5068A/B for forward/flyback
converters where the maximum duty must be limited to
less than 50%.
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
_______________________________________________________________________________________ 9
MAX5068
Use the MAX5068C/D/E/F in forward converter applica-
tions with greater than 50% duty cycle. The large duty
cycle results in much lower operating primary RMS cur-
rent through the MOSFET switch and, in most cases,
requires a smaller output filter capacitor. The major dis-
advantage to this is that the MOSFET voltage rating
must be higher. The MAX5068C/D/E/F capacitor
adjustable-slope-compensation feature allows for easy
stabilization of the inner current loop.
Undervoltage Lockout
The MAX5068 features an input voltage UVLO/EN func-
tion to enable the PWM controller before any operation
can begin. The MAX5068C/E shut down if the voltage
at UVLO/EN falls below its 1.18V threshold. The
MAX5068A/B/D/F also incorporate an UVLO hysteresis
input to set the desired turn-off voltage.
MAX5068C/E UVLO Adjustment
The MAX5068C/E have an input voltage UVLO/EN with
a 1.231V threshold. Before any operation can com-
mence, the UVLO/EN voltage must exceed the 1.231V
threshold. The UVLO circuit keeps the PWM compara-
tor, ILIM comparator, oscillator, and output driver shut
down to reduce current consumption (see the
Functional Diagram).
Calculate R6 in Figure 2 by using the following formula:
where VULR2 is the UVLO/EN’s 1.231V rising threshold
and VON is the desired startup voltage. Choose an R7
value in the 20kΩrange.
After a successful startup, the MAX5068C/E shut down if
the voltage at UVLO/EN drops below its 1.18V threshold.
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
10 ______________________________________________________________________________________
MAX5068A
IN
NDRV
CS
PGND
FBVCC
AGND
REG5
UVLO/EN
RT
HYST
DT
FLTINT
D2
R1
C1
Q1
COMP
VIN
C2
C3
C4
R3
R4
R6
RHYST
R7
SYNC
R9
R8
R2
R5 C5
RCS
VOUT
D1
C6
Figure 1. Nonisolated Power Supply with Programmable Input Supply Voltage
MAX5068A/B/D/F UVLO with
Programmable Hysteresis
In addition to programmable undervoltage lockout dur-
ing startup, the MAX5068A/B/D/F incorporate a
UVLO/EN hysteresis that allows the user to set a volt-
age (VOFF) to disable the controller (see Figure 3).
At the beginning of the startup sequence, UVLO/EN is
below the 1.23V threshold, Q1 turns on connecting
RHYST to GND (Figure 4). Once the UVLO 1.23V thresh-
old is crossed, Q1 turns off, resulting in the series com-
bination of R6, RHYST, and R7, placing the MAX5068 in
normal operating condition.
Calculate the turn-on voltage (VON) by using the fol-
lowing formula:
where VULR2 is the UVLO/EN’s 1.23V rising threshold.
Choose an RHYST value in the 20kΩrange.
The MAX5068 turns off when the MAX5068 UVLO/EN
falls below the 1.18V falling threshold. The turn-off volt-
age (VOFF) is then defined as:
where VULF2 is the 1.18V UVLO/EN falling threshold.
Bootstrap Undervoltage Lockout
(MAX5068A/C/D Only)
In addition to the externally programmable UVLO func-
tion offered by the MAX5068, the MAX5068A/C/D fea-
ture an additional internal bootstrap UVLO for use in
high-voltage power supplies (see the Functional
Diagram). This allows the device to bootstrap itself dur-
ing initial power-up. The MAX5068A/C/D start when VIN
exceeds the bootstrap UVLO threshold of 23.6V.
RR
V
VR
OFF
ULF HYST
76 1
2
/ =⎛
⎝
⎜⎞
⎠
⎟
−−
RV
VR
ON
ULR HYST
61
2
=⎛
⎝
⎜⎞
⎠
⎟×
−
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
______________________________________________________________________________________ 11
MAX5068C/E
1.23V
1.18V
UVLO/EN
R7
R6
VIN
Figure 2. Setting the MAX5068C/E Undervoltage Lockout
Threshold
VHYST = VON - VOFF
VOFF VON
Figure 3. MAX5068 Hysteresis
MAX5068A/B/D/F
1.23V
1.18V
UVLO/EN
HYST
RHYST
R6
R7
VIN
Q1
Figure 4. Setting the MAX5068A/B/D/F Turn-On/Turn-Off Voltages
MAX5068
During startup, the UVLO circuit keeps the PWM com-
parator, ILIM comparator, oscillator, and output driver
shut down to reduce current consumption. Once VIN
reaches 23.6V, the UVLO circuit turns on both the PWM
and ILIM comparators, as well as the oscillator, and
allows the output driver to switch. When VIN drops
below 9.7V, the UVLO circuit shuts down the PWM
comparator, ILIM comparator, oscillator, and output dri-
ver returning the MAX5068A/C/D to the startup mode.
MAX5068A/C/D Startup Operation
Normally, VIN is derived from the tertiary winding of the
transformer. However, at startup there is no energy
delivered through the transformer, hence, a special
bootstrap sequence is required. Figure 5 shows the
voltages on VIN and VCC during startup. Initially, both
VIN and VCC are zero. After the input voltage is applied,
C1 charges through the startup resistor, R1, to an inter-
mediate voltage (see Figure 1). At this point, the inter-
nal regulator begins charging C3 (see Figure 5). Only
47µA of the current supplied by R1 is used by the
MAX5068A/C/D. The remaining input current charges
C1 and C3. The charging of C3 stops when the VCC
voltage reaches approximately 9.5V. The voltage
across C1 continues rising until it reaches the wake-up
level of 23.6V. Once VIN exceeds the bootstrap UVLO
threshold, NDRV begins switching the MOSFET and
energy is transferred to the secondary and tertiary out-
puts. If the voltage on the tertiary output builds to high-
er than 9.74V (the bootstrap UVLO lower threshold),
startup ends and sustained operation commences.
If VIN drops below 9.74V before startup is complete, the
device goes back to low-current UVLO. If this occurs,
increase the value of C1 to store enough energy to
allow for the voltage at the tertiary winding to build up.
Startup Time Considerations for
Power Supplies Using the MAX5068A/C/D
The VIN bypass capacitor, C1, supplies current imme-
diately after wakeup (see Figure 1). The size of C1 and
the connection configuration of the tertiary winding
determine the number of cycles available for startup.
Large values of C1 increase the startup time and also
supply extra gate charge for more cycles during initial
startup. If the value of C1 is too small, VIN drops below
9.74V because NDRV does not have enough time to
switch and build up sufficient voltage across the tertiary
output that powers the device. The device goes back
into UVLO and does not start. Use low-leakage capaci-
tors for C1 and C3.
Generally, offline power supplies keep typical startup
times to less than 500ms, even in low-line conditions
(85VAC input for universal offline applications or 36VDC
for telecom applications). Size the startup resistor, R1,
to supply both the maximum startup bias of the device
(90µA) and the charging current for C1 and C3. The
bypass capacitor, C3, must charge to 9.5V, and C1
must charge to 24V, within the desired time period of
500ms. Because of the internal soft-start time of the
MAX5068, C1 must store enough charge to deliver cur-
rent to the device for at least 2047 oscillator clock
cycles. To calculate the approximate amount of capaci-
tance required, use the following formula:
where IIN is the MAX5068’s internal supply current after
startup (2.5mA typ), Qgtot is the total gate charge for
Q1, fSW is the MAX5068’s programmed switching fre-
quency, VHYST is the bootstrap UVLO hysteresis (12V),
and tss is the internal soft-start time (2047 x 1 / fOSC).
Example: Ig= (8nC) (250kHz) ≅2.0mA
fOSC = 2 x 250kHz
Soft-start duration = 2047 x (1 / fOSC) = 4.1ms
Use a 2.2µF ceramic capacitor for C1.
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
12 ______________________________________________________________________________________
100ms/div
MAX5068
VIN PIN
VCC
2V/div
0V
5V/div
Figure 5. VIN and VCC During Startup When Using the
MAX5068 in Bootstrapped Mode (Also see Figure 1)
Assuming C1 > C3, calculate the value of R1 as follows:
where VSUVR is the bootstrap UVLO wakeup level
(23.6V max), VIN(MIN) is the minimum input supply volt-
age for the application (36V for telecom), and ISTART is
the VIN supply current at startup (90µA, max).
For example:
To minimize power loss on this resistor, choose a high-
er value for R1 than the one calculated above (if a
longer startup time can be tolerated).
The above startup method is applicable to a circuit sim-
ilar to the one shown in Figure 1. In this circuit, the ter-
tiary winding has the same phase as the output
windings. Thus, the voltage on the tertiary winding at
any given time is proportional to the output voltage and
goes through the same soft-start period as the output
voltage. The minimum discharge time of C1 from 22V to
10V must be greater than the soft-start time (tSS).
Oscillator/Switching Frequency
Use an external resistor at RT to program the MAX5068
internal oscillator frequency from 50kHz to 2.5MHz. The
MAX5068A/B output switching frequency is one-half of
the programmed oscillator frequency with a 50% duty
cycle. The MAX5068C/D/E/F output switching frequen-
cy is one-quarter of the programmed oscillator frequen-
cy with a 75% duty cycle.
IVx F
ms A
RVV
AA k
C1
24 2 2
500 106
136 12
106 90 122 4
.
.
==
≅+=
−
µµ
µµ Ω
IVC
ms
RVxV
II
CSUVR
IN MIN SUVR
C START
1
1
1
500
105
.
()
=×
≅−
+
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
______________________________________________________________________________________ 13
MAX5068A
IN
NDRV
CS
PGND
FBVCC
AGND
REG5
UVLO/EN
RT
HYST
DT
FLTINT
D2
R1
C1
Q1
COMP
VIN
C2
C3
C4
R3
R4
R6
RHYST
R7
SYNC
R2
R5 C5
RCS
VOUT
D1
R11
C6
C10
C7
R12
R13
MAX8515
R9
R10R8
VCC
PS2913
Figure 6. Secondary-Side, Regulated, Isolated Power Supply
MAX5068
Use the following formula to calculate the internal oscil-
lator frequency:
where fOSC is the oscillator frequency and RRT is a
resistor connected from RT to AGND.
Choose the appropriate resistor at RT to calculate the
desired output switching frequency (fSW):
The MAX5068A/B and the MAX5068C/D/E/F have pro-
grammable output switching frequencies from 25kHz to
1.25MHz and 12.5kHz to 625kHz, respectively.
Dead-Time Adjustment
The MAX5068 programmable dead-time function
(Figure 7) allows additional flexibility in optimizing mag-
netics design and overcoming parasitic effects. The
MAX5068A/B and the MAX5068C/D/E/F have a maxi-
mum 50% and 75% duty cycle, respectively. In many
applications, the duty cycle of the external MOSFET
may need to be slightly decreased to prevent satura-
tion in the transformer’s primary. The dead time can be
configured from 30ns to 1 / (0.5 x fSW) when program-
ming the MAX5068. Connect a resistor between DT and
AGND to set the desired dead time using the following
formula:
where RDT is in kΩand the dead time is in ns.
Connect DT to REG5 to remove the delay and achieve
the MAX5068 maximum duty cycles.
External Synchronization
(MAX5068A/B/C/E)
The MAX5068A/B/C/E can be synchronized using an
external clock at the SYNC input. For proper frequency
synchronization, the SYNC’s input frequency must be at
least 25% higher than the MAX5068A/B/C/E pro-
grammed internal oscillator frequency. Connect SYNC
to AGND when not using an external clock.
Integrating Fault Protection
The integrating fault-protection feature allows transient
overcurrent conditions to be ignored for a programma-
ble amount of time, giving the power supply time to
behave like a current source to the load. For example,
this can occur under load current transients when the
control loop requests maximum current to keep the out-
put voltage from going out of regulation. Program the
fault-integration time by connecting an external suitably
sized capacitor to the FLTINT. Under sustained over-
current faults, the voltage across this capacitor ramps
up towards the FLTINT shutdown threshold (typically
2.8V). Once the threshold is reached, the power supply
shuts down. A high-value bleed resistor connected in
parallel with the FLTINT capacitor allows it to discharge
towards the restart threshold (typically 1.6V). Once this
threshold is reached, the supply restarts with a new
soft-start cycle.
Note that cycle-by-cycle current limiting is provided at
all times by CS with a threshold of 314mV (typ). The
fault-integration circuit forces a 60µA current onto
FLTINT each time that the current-limit comparator is
tripped (see the Functional Diagram). Use the following
formula to calculate the value of the capacitor neces-
sary for the desired shutdown time of the circuit:
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
14 ______________________________________________________________________________________
DEAD TIME
NDRV
tDT
< 50% < 50%
Figure 7. MAX5068 NDRV Dead-Time Timing Diagram
MAX5068A/B/C/E
AGND
RT
SYNC
Figure 8. External Synchronization of the MAX5068A/B/C/E
where IFLTINT = 60µA, tSH is the desired fault-integra-
tion time during which current-limit events from the cur-
rent-limit comparator are ignored. For example, a 0.1µF
capacitor gives a fault-integration time of 4.7ms.
This is an approximate formula. Some testing may be
required to fine-tune the actual value of the capacitor. To
calculate the recovery time, use the following formula:
where tRT is the desired recovery time.
Choose tRT = 10 x tSH. Typical values for tSH range from
a few hundred microseconds to a few milliseconds.
Soft-Start
The MAX5068 soft-start feature allows the load voltage
to ramp up in a controlled manner, eliminating output-
voltage overshoot. Soft-start begins after UVLO is
deasserted. The voltage applied to the noninverting
node of the amplifier ramps from 0 to 1.23V in 2047
oscillator clock cycles (soft-start timeout period). Unlike
other devices, the MAX5068 reference voltage to the
internal amplifier is soft-started. This method results in
superior control of the output voltage under heavy- and
light-load conditions.
Internal Regulators
Two internal linear regulators power the MAX5068 inter-
nal and external control circuits. VCC powers the exter-
nal N-channel MOSFET and is internally set to
approximately 9.5V. The REG5 5V regulator has a 1mA
sourcing capability and may be used to provide power
to external circuitry. Bypass VCC and REG5 with 1µF
and 0.1µF high quality capacitors, respectively. Use
lower value ceramics in parallel to bypass other
unwanted noise signals. Bootstrapped operation
requires startup through a bleed resistor. Do not exces-
sively load the regulators while the MAX5068 is in the
power-up mode. Overloading the outputs can cause
the MAX5068 to fail upon startup.
N-Channel MOSFET Switch Driver
NDRV drives an external N-channel MOSFET. The NDRV
output is supplied by the internal regulator (VCC), which
is internally set to approximately 9.5V. For the universal
input-voltage range, the MOSFET used must be able to
withstand the DC level of the high-line input voltage plus
the reflected voltage at the primary of the transformer.
For most applications that use the discontinuous flyback
topology, a MOSFET rated at 600V is required. NDRV
can source/sink in excess of 650mA/1000mA peak cur-
rent. Therefore, select a MOSFET that yields acceptable
conduction and switching losses.
Error Amplifier
The MAX5068 includes an internal error amplifier that
can regulate the output voltage in the case of a noniso-
lated power supply (Figure 1). Calculate the output volt-
age using the following equation:
where VREF = 1.23V. The amplifier’s noninverting input
internally connects to a digital soft-start reference voltage.
This forces the output voltage to come up in an orderly
and well-defined manner under all load conditions.
Slope Compensation (MAX5068C/D/E/F)
The MAX5068C/D/E/F use an internal-ramp generator
for slope compensation. The internal-ramp signal resets
at the beginning of each cycle and slews at the rate
programmed by the external capacitor connected at
SCOMP and the resistor at RT. Adjust the MAX5068
slew rate up to 90mV/µs using the following equation:
where RRT is the external resistor at RT that sets the oscil-
lator frequency and CSCOMP is the capacitor at SCOMP.
PWM Comparator
The PWM comparator uses the instantaneous current,
the error amplifier, and the slope compensation to
determine when to switch NDRV off. In normal opera-
tion, the N-channel MOSFET turns off when:
IPRIMARY x RCS > VEA – VOFFSET - VSCOMP
where IPRIMARY is the current through the N-channel
MOSFET, VEA is the output voltage of the internal
amplifier, VOFFSET is the 1.6V internal DC offset and
VSCOMP is the ramp function starting at zero and slew-
ing at the programmed slew rate (SR). When using the
MAX5068 in a forward-converter configuration, the fol-
lowing conditions must be met to avoid current-loop
subharmonic oscillations:
where K = 0.75 and NSand NPare the number of turns
on the secondary and primary side of the transformer,
respectively. L is the secondary filter inductor. When
S
P
CS OUT
N
N
KRV
LSR ××× =
SR RC mV s
RT SCOMP
(/)=×
×
−
165 10 6µ
VR
RxV
OUT REF
=+
⎛
⎝
⎜⎞
⎠
⎟
18
9
Rt
C
FLTINT RT
FLTINT
.
≅×0 595
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
______________________________________________________________________________________ 15
MAX5068
optimally compensated, the current loop responds to
input-voltage transients within one cycle.
Current Limit
The current-sense resistor (RCS), connected between
the source of the MOSFET and ground, sets the current
limit. The CS input has a voltage trip level (VCS) of
314mV. Use the following equation to calculate the
value of RCS:
where IPRI is the peak current in the primary that flows
through the MOSFET at full load.
When the voltage produced by this current (through the
current-sense resistor) exceeds the current-limit com-
parator threshold, the MOSFET driver (NDRV) quickly
terminates the current on-cycle. In most cases, a small
RC filter is required to filter out the leading-edge spike
on the sense waveform. Set the corner frequency to a
few MHz above the switching frequency.
Applications Information
Layout Recommendations
Keep all PC board traces carrying switching currents
as short as possible, and minimize current loops.
For universal AC input design, follow all applicable safe-
ty regulations. Offline power supplies may require UL,
VDE, and other similar agency approvals. Contact these
agencies for the latest layout and component rules.
Typically, there are two sources of noise emission in a
switching power supply: high di/dt loops and high dv/dt
surfaces. For example, traces that carry the drain cur-
rent often form high di/dt loops. Similarly, the heatsink of
the MOSFET presents a dv/dt source, thus minimize the
surface area of the heatsink as much as possible.
To achieve best performance and to avoid ground
loops, use a solid ground-plane connection.
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
16 ______________________________________________________________________________________
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
______________________________________________________________________________________ 17
MAX5068C
IN
NDRV
CS
PGND
FBVCC
AGND
REG5
UVLO/EN
RT
SCOMP
DT
FLTINT
D2
R1
C1
Q1
COMP
VIN
C2
C3
C4
R3
R4
R6
R7
SYNC
R2
R5 C5
RCS
VOUT
R11
C6
C10 R12
R13
MAX8515
R9
R10R8
VCC
PS2913
C7
D1
Typical Operating Circuit
Selector Guide
PART
NUMBER
MAX DUTY
CYCLE
BOOTSTRAP
UVLO
STARTUP
VOLTAGE (V)
PROGRAMMABLE
UVLO
HYSTERESIS
OSCILLATOR
SYNC
SLOPE
COMPENSATION
MAX5068A 50% Yes 23.6 Yes Yes No
MAX5068B 50% No 10.8 Yes Yes No
MAX5068C 75% Yes 23.6 No Yes Yes
MAX5068D 75% Yes 23.6 Yes No Yes
MAX5068E 75% No 10.8 No Yes Yes
MAX5068F 75% No 10.8 Yes No Yes
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
18 ______________________________________________________________________________________
MAX5068
Σ
NDRV
SQ
R
OSC
DEAD
TIME
THERMAL
SHUTDOWN
PGND
DTRT
ERROR
AMP
PWM
COMPARATOR
CURENT-LIMIT
COMPARATOR
2.8V/
1.6V
5kΩ
70ns
BLANKING
COMP
FB
CS
AGND
R
Q
S
60µA
FLTINT
DIGITAL
SOFT-START
314mV
1.23V
REGULATOR
VCC
IN
REG_OK
IN
VCC
1.23V
REFERENCE
UVLO
1.23V/
1.18V
UVLO/EN
21.6V/
9.74V
VIN
CLAMP
26V
BOOTSTRAP
UVLO
HYST*
REG5
1.6V
5V
OUT
SYNC**
SLOPE
COMPENSATION
***SCOMP
*MAX5068A/B/D AND MAX5068F ONLY.
**MAX5068A/B/C AND MAX5068E ONLY.
***MAX5068C/D/E/F ONLY.
+
+
*
Functional Diagram
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
______________________________________________________________________________________ 19
Chip Information
TRANSISTOR COUNT: 4,266
PROCESS: BiCMOS
TOP VIEW
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RT REG5
IN
VCC
NDRV
AGND
PGND
AGND
CS
MAX5068C/E
TSSOP-EP
SYNC
SCOMP
FB
DT
UVLO/EN
COMP
FLTINT
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RT REG5
IN
VCC
NDRV
AGND
PGND
AGND
CS
MAX5068D/F
TSSOP-EP
HYST
SCOMP
FB
DT
UVLO/EN
COMP
FLTINT
Pin Configurations (continued)
MAX5068
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
TSSOP 4.4mm BODY.EPS
D
1
1
21-0108
PACKAGE OUTLINE, TSSOP, 4.40 MM BODY
EXPOSED PAD