CMX639 COMMUNICATION ICs Consumer / Commercial CVSD Digital Voice CODEC DATA BULLETIN PRELIMINARY INFORMATION Features Applications * * * Single Chip Full Duplex CVSD CODEC Integrated Input and Output Filters Robust Coding for Wireless Links Programmable Sampling Clocks 3 and 4 bit Companding Algorithms Low Power / Small Size for Portable Devices 1.9mA/2.75mA typ. @ 3V/5V 3.0V to 5.5V Operation Powersave Mode * * * Consumer & Business Handheld Devices Digital Voice Appliances Spread Spectrum Wireless Cordless Phones Voice Recording & Storage Delay Lines Time Domain Scramblers Multiplexers and Switches IDLE CHANNEL STABILIZER ENCODE ANALOG IN ENCODE DATA OUT - + COMPAND REGISTER + - PULSE GENERATOR ENCODE TIMING PRINCIPAL INTEGRATOR X SYLLABIC INTEGRATOR COMMON TIMING DECODE DATA IN COMPAND REGISTER PULSE GENERATOR SYLLABIC INTEGRATOR X PRINCIPAL INTEGRATOR DECODE ANALOG OUT DECODE TIMING The CMX639 is a Continuously Variable Slope Delta Modulation (CVSD) full duplex CODEC for use in consumer and commercial digital voice communication systems. With its robust and selectable coding algorithms, low cost, very low power, and small size, the CMX639 is ideal for use in a wide variety of consumer and business digital voice applications. Its completely integrated CODEC simplifies design and eliminates the costs, complexity and risk of external filters and software algorithms. 8kbps to 128kbps data/sampling clock rates are supported both via external clock signals or internally generated, programmable clocks. Internal data/sampling clocks are derived from an on-chip reference oscillator that uses an external clock crystal. An internal data/sampling clock output signal is provided to synchronize external circuits, if desired. Multiplexer applications are also well supported by the encoder output's tri-state enable feature. The CMX639 operates from 3.0V to 5.5V and is available in the following packages: 24-pin TSSOP (CMX639E2), 16-pin SOIC (CMX639D4) and 22-pin PDIP (CMX639P6). 2000 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies. Consumer/Commercial CVSD Digital Voice CODEC 2 CMX639 Preliminary Information CONTENTS Section Page 1 Block Diagram................................................................................................................ 3 2 Signal List....................................................................................................................... 4 3 External Components.................................................................................................... 5 4 Application ..................................................................................................................... 6 4.1 CODEC Integration.............................................................................................................. 6 5 Performance Specification............................................................................................ 6 5.1 5.2 Electrical Performance ........................................................................................................ 6 5.1.1 Absolute Maximum Ratings.................................................................................................... 6 5.1.2 Operating Limits ..................................................................................................................... 6 5.1.3 Operating Characteristics....................................................................................................... 7 5.1.4 Timing..................................................................................................................................... 9 5.1.5 Typical Performance ............................................................................................................ 10 Packaging.......................................................................................................................... 11 MX-COM, Inc. reserves the right to change specifications at any time and without notice. 2000 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies. Consumer/Commercial CVSD Digital Voice CODEC 3 CMX639 Preliminary Information 1 Block Diagram DATA ENABLE ENCODER FORCE IDLE* ENCODER INPUT MOD VDD VSS f1 XTAL/CLOCK ENCODER OUTPUT f2 f0 XTAL CLOCK RATE GENERATORS ENCODER DATA CLOCK DECODER DATA CLOCK VBIAS MODE 1 CLOCK MODE LOGIC MODE 2 ALGORITHM SAMPLING RATE CONTROL 3 or 4 BIT f3 POWERSAVE DECODER INPUT f1 DECODER OUTPUT DEMOD DECODER FORCE IDLE* *Available on E2 & P6 package styles only Figure 1: Block Diagram 2000 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies. Consumer/Commercial CVSD Digital Voice CODEC 4 CMX639 Preliminary Information 2 Signal List P6 22-pin PDIP E2 24-pin TSSOP D4 16-pin SOIC 1 1 1 2 Signal Name Xtal/Clock Type Description input Input to the clock oscillator inverter. A 1.024MHz Xtal input or externally derived clock is injected here. See Table 3 and Figure 3. N/C 2 No Connection output 2 3 3 4 N/C 4 5 3 Encoder Data Clock input/ output 5 6 4 Encoder Output output 6 7 Not present 7 8 5 8 9 9 10 Xtal The 1.024 MHz output of the clock oscillator inverter. No Connection A logic I/O port. External encode clock input or internal data clock output. Clock frequency is dependent upon Clock Mode 1, 2 inputs and Xtal frequency (see Table 3). Note: No internal pull-up is provided. The encoder digital output. This is a three-state output whose condition is set by the Data Enable and Powersave inputs. See Table 2. Encoder Force Idle input When this pin is at a logical '0' the encoder is forced to an idle state and the encoder digital output is 0101..., a perfect idle pattern. When this pin is a logical '1' the encoder encodes as normal. Internal 1M pull-up. Data Enable input Data is made available at the encoder output pin by control of this input. See Encoder Output pin. Internal 1 M pull-up. N/C No Connection Bias capacitor C4. Internally pulled to VSS when Powersave is a logical '0'. Normally at VDD/2 bias, this pin should be externally decoupled by 6 10 11 7 Encoder Input input The analog signal input. Internally biased at VDD/2, this input requires an external coupling capacitor. The source impedance driving the coupling capacitor should be less than 1k. A lower driving source impedance will reduce encoder output channel noise levels. See Figure 2. 11 12 8 VSS power Negative Supply 12 13 13 14 14 15 15 16 N/C 9 Decoder Output No Connection output N/C 10 17 Powersave The recovered analog signal is output at this pin. It is the buffered output of a lowpass filter and requires external components. During 'Powersave' this output is open circuit. No Connection input A logic '0' at this pin puts most parts of the codec into a quiescent non-operational state. When at a logical '1', the codec operates normally. Internal 1 M pull-up. N/C No Connection Decoder Force Idle input A logic '0' at this pin gates a 0101... pattern internally to the decoder so that the Decoder Output goes to VDD/2. When this pin is a logical '1' the decoder operates as normal. Internal 1M pullup. The received digital signal input. Internal 1 M pull-up. 16 18 Not present 17 19 11 Decoder Input input 18 20 12 Decoder Data Clock input/ output 19 21 13 Algorithm input 20 22 14 Clock Mode 2 input 21 23 15 Clock Mode 1 input 22 24 16 VDD power A logic I/O port. External decode clock input or internal data clock output, dependent upon Clock Mode 1 and 2 inputs. See Table 3. Note: No internal pull-up is provided. A logic '1' at this pin sets this device for a 3-bit companding algorithm. A logical '0' sets a 4-bit companding algorithm. Internal 1 M pull-up. Clock rates refer to f = 1024MHz Xtal/Clock input. During internal operation the data clock frequencies are available at the ports for external circuit synchronization. Independent or common data rate inputs to Encode and Decode data clock ports may be employed in the External Clocks mode. Internal 1M pull-ups. See Table 3. Positive Supply. A single 3.0V to 5.5V supply is required. Table 1: Signal List 2000 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies. Consumer/Commercial CVSD Digital Voice CODEC 5 CMX639 Preliminary Information Powersave Data Enable 1 0 1 1 don't care 0 Encoder Output Enable High Z (open circuit) VSS Table 2: Encoder Output Clock Mode 1 input 0 0 1 1 Clock Mode 2 input 0 1 0 1 Data/Sampling Clock Rate (Xtal/clock = f) External Clocks Internally generated @ f/16 Internally generated @ f/32 Internally generated @ f/64 Example for f = 1.024MHz External Clocks Internally generated @ 64kbps Internally generated @ 32kbps Internally generated @ 16kbps Table 3: Clock Modes and Pins 3 External Components VDD XTAL/CLOCK R1 X1 C2 C1 XTAL ENCODER DATA CLOCK ENCODER OUTPUT DATA ENABLE BIAS ENCODER INPUT C3 C4 VSS 1 2 3 4 5 6 7 8 CMX639D4 16 15 14 13 12 11 10 9 VDD CLOCK MODE 1 CLOCK MODE 2 ALGORITHM DECODER DATA CLOCK DECODER INPUT POWERSAVE DECODER OUTPUT C5 Figure 2: Recommended External Components for Typical Application 10% C4 Note 4 1.0F 20% Note 2 1M 33pF 20% C5 Note 5 20% C2 Note 2 33pF 20% X1 Note 6, 7 1.0F 1.024MHz C3 Note 3 1.0F 20% R1 Note 1 C1 Table 4: Recommended External Components for Typical Application Notes: 1. Oscillator inverter bias resister 2. Xtal circuit load capacitor 3. The drive source impedance connected to the coupling capacitor's input node, rather than the CMX639 ENCODER INPUT pin node, should be should be less than 1k. Output idle channel noise levels will improve with even lower source impedances driving the coupling capacitor's input node. 4. Bias decoupling capacitor 5. VDD decoupling capacitor 6. A 1.024MHz Xtal/Clock input will yield exactly 16kbps/32kbps/64kbps internally generated data clock rates. 7. For best results, a crystal oscillator design should drive the clock inverter input with signal levels of at least 40% of VDD, peak to peak. Tuning fork crystals generally cannot meet this requirement. To obtain crystal oscillator design assistance, please consult your crystal manufacturer. 2000 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies. Consumer/Commercial CVSD Digital Voice CODEC 6 CMX639 Preliminary Information 4 Application 4.1 CODEC Integration CMX639 PARAMETERS MEASURED HERE INPUT ANALOG INPUT INTERFACE CMX639 PARAMETERS MEASURED HERE REGULATED POWER SUPPLY CMX639 ENCODER DATA ANALOG OUTPUT INTERFACE CMX639 DECODER CLOCK MODE 16/32/64 KB/S CLOCKS OUTPUT DATA CLOCKS 1.024MHz 1.024MHz SYNCHRONOUS CLOCK AND DATA SYSTEM Figure 3: System Configuration using the CMX639 5 Performance Specification 5.1 5.1.1 Electrical Performance Absolute Maximum Ratings Exceeding these maximum ratings can result in damage to the device. Supply (VDD - VSS) Voltage on any pin to VSS Current VDD VSS any other pin E2 Package Total Allowable Power Dissipation at TAMB = 25C Derating above 25C Storage Temperature Operating Temperature P6 / D4 Packages Total Allowable Power Dissipation at TAMB = 25C Derating above 25C Storage Temperature Operating Temperature 5.1.2 Min. -0.3 -0.3 Max. 7.0 VDD + 0.3 Units V V -30 -30 -20 30 30 20 mA mA mA -40 -40 300 3 125 85 mW mW/C above 25C C C -40 -40 800 10 125 85 mW mW/C above 25C C C Operating Limits Correct operation of the device outside these limits is not implied. Supply (VDD - VSS) Operating Temperature Xtal Frequency 2000 MX-COM, Inc. Min 2.7 -40 0.500 Typ. Max. 5.5 85 2.048 www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Units V C MHz Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies. Consumer/Commercial CVSD Digital Voice CODEC 5.1.3 7 CMX639 Preliminary Information Operating Characteristics For the following conditions unless otherwise specified: VDD = 3.0V to 5.5V at TAMB = -40 to +85C, Audio Test Frequency = 820Hz, Xtal/Clock f0 = 1.024MHz Sample Clock Rate = 32kbps, Audio level 0dB ref (0 dBm0) = 489mVRMS. Notes Static Values Supply Current (Enabled) VDD = 3.0V VDD = 5.0V Supply Current (Powersave) 6 6 6 Input logic `1' Input Logic `0' Output Logic `1' Output Logic `0' Digital input Impedance Logic I/O pins Logic Input pins, Pull-up Resistor Min. Typ. Max. mA mA mA 1.90 2.75 600 70% VDD 30% VDD 80% VDD 20% VDD 1 M 300 k 4 2 100 Analog Output Impedance 4 0 2000 MX-COM, Inc. 3 7 7 -37 -33 7 7 7 4 4 -37 -33 6 10 dB dB Hz Hz ms 6 10 dB dB Hz 3400 10 3200 300 6 8 -60 Hz KHz dB dB dB dBmOp 8, 9 -63 dBmOp 60 0 -3 3 www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA A dB 160 3240 5 4 k k 800 Three State Output Leakage Insertion Loss Dynamic Values Encoder Analog signal Input levels VDD = 3.0V VDD = 5.0V Principal Integrator Frequency Encoder Passband Compand Time Constant Decoder Analog Signal Output Levels VDD = 3.0V VDD = 5.0V Decoder Passband Encoder Decoder (Full Codec) Passband Stopband Stopband Attenuation Passband Gain Passband Ripple Output Noise (Input Short Circuit) Perfect Idle Channel Noise (Encode Forced) A V V V V 1 Digital output impedance Analog Input Impedance Units Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies. Consumer/Commercial CVSD Digital Voice CODEC 8 Max. Units 450 s (600Hz-2800Hz) 750 s (500Hz-3000Hz) 1500 s MHz Group Delay Distortion (1000Hz-2600Hz) Xtal/clock Frequency Notes 5 CMX639 Preliminary Information 10, 11 Min. 0.500 Typ. 1.024 2.048 Notes: 1. All logic inputs except Encoder and Decoder Data clocks. 2. The source impedance driving the coupling capacitor should be less than 1k. A lower driving source impedance will reduce encoder output channel noise levels. 3. For an Encoder/Decoder combination. 4. See Figure 5. 5. Group Delay Distortion for the full codec is relative to the delay with an 820Hz, -20dB signal at the encoder input 6. Not including any current drawn from the device by external circuits. 7. Recommended values 8. dBmOp units are measured after the application of a psophometrically weighted filter that is commonly used in voice communication applications per CCITT Recommendation G.223. 9. Forced idle encode/decode control not available on D4 (16 pin SOIC) package. 10. Some applications may benefit from the use of an Xtal/clock frequency other than 1.024MHz. Note: CODEC time constants and filter response curves are effectively proportional to Xtal/clock frequency and so will shift with the use of Xtal/clock frequencies other than 1.024MHz. For example, the specified Encoder Decoder (Full Codec) Passband of 300Hz min. to 3400Hz max. for a 1.024MHz Xtal/clock will shift to 600Hz min. to 6800Hz max. when the device is operated from a 2.048MHz Xtal/clock. For this reason, all CMX639 CODECs involved in the same communications link should usually be operated from the same Xtal/clock frequency. Example 1: A design saves the cost of a 1.024MHz Xtal or clock generator by making use of an already existing clock source of a frequency other than 1.024MHz. Example 2: Best noise performance is achieved when the CMX639 CODEC data clock is internally generated. If a CODEC bit rate other than 16kbps, 32kbps or 64kbps is desired then an Xtal/clock different than 1.024Mhz can be used to proportionately shift the available set of internally generated clock rates, as needed. Example 3: To increase the CODEC high frequency response and audio bandwidth a faster Xtal/Clock speed can be used. Other designs may prefer the proportionately higher CODEC bandwidths and data rates that can be supported with faster clock speeds. 11. In general, optimum CODEC performance is achieved when both encoder and decoder Xtal/Clock signals are synchronized. While this is practical in many telecom applications it may not be in others such as wireless data links. The CMX639 decoder can generally deliver best performance when its data clock is recovered/derived from the received data stream and applied as an external data clock to the decoder per the decoder timing depicted in Figure 4. Nonetheless, some Xtal/Clock frequency and data rate combinations are better served by the use of internal clocks. Experimentation with each specific design may provide the best guidance for making this design choice. 2000 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies. Consumer/Commercial CVSD Digital Voice CODEC 5.1.4 9 CMX639 Preliminary Information Timing Serial Bus Timings (See Figure 4) tCH Clock 1 pulse width tCL Clock 0 pulse width tIR tIF tSU tH tSU +tH Clock rise time Clock fall time Data set-up time Data hold time Data true time Min. 1.0 Typ. Max. s 1.0 0 100 100 450 600 1.5 tPCO Clock to output delay time tDR Data rise time tDF Data fall time Xtal input frequency = 1.024MHz Units 750 100 100 s ns ns ns ns s ns ns ns ENCODER TIMING ENCODER CLOCK tCH tCH tCL t IR tIF DATA CLOCKED ENCODER DATA OUTPUT tPCO DECODER TIMING DECODER CLOCK DATA CLOCKED DECODER DATA INPUT tSU tH DATA TRUE TIME ENCODER OUTPUT MULTIPLEXING FUNCTION HIGH Z HIGH Z tDR t DF DATA ENABLE Figure 4: Serial Bus Timing 2000 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies. Consumer/Commercial CVSD Digital Voice CODEC 5.1.5 CMX639 Preliminary Information Typical Performance CODEC Performance Codec Gain including encode and decode, (dB) 5.1.5.1 10 Input Level = -15dBmO Data Clocks = 32kbps Xtal = 1.024MHz 0 -10 -20 -30 -40 -50 -60 1 2 3 Frequency (kHz) 5 4 6 Figure 5: Typical CODEC Frequency Response (32kbps) Input Level = -20dB 35 30 64kb/s S/N (dB) 25 20 32kb/s 15 10 16kb/s 5 500 1000 1500 2000 2500 3000 3500 Frequency (Hz) Figure 6: Typical S/N Ratio with Input Frequency 2000 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies. Consumer/Commercial CVSD Digital Voice CODEC 11 3 CMX639 Preliminary Information 35 Ref: 0dB Input Level = 489mVrms Input Frequency = 820 Hz 2 30 64 kbps S/N (dB) Attenuation (dB) ref @ -15dBmO Input Frequency = 820Hz 1 32 kbps 20 0 16 kbps -1 -40 -30 -20 -10 0 10 Input Level (dBmO) Figure 7: Typical Variation of Gain with Input Level (32kbps) 5.2 ref. 10 -40 -30 -20 -10 0 Input Level (dB) Figure 8: Typical S/N Ratio with Input Level Packaging Figure 9: 24-pin TSSOP (E2) Mechanical Outline: Order as part no. CMX639E2 2000 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies. Consumer/Commercial CVSD Digital Voice CODEC 12 CMX639 Preliminary Information Figure 10: 16-pin SOIC (DW) Mechanical Outline: Order as part no. CMX639D4 Figure 11: 22-pin PDIP (P) Mechanical Outline: Order as part no. CMX639P6 2000 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480209.006 All Trademarks and service marks are held by their respective companies.