IRDC3842
02/02/2009 1
USER GUIDE FOR IR3842 EVALUATION BOARD
DESCRIPTION
The IR3842 is a synchronous buck
converter, providing a compact, high
performance and flexible solution in a small
5mmx6mm Power QFN package.
Key features offered by the IR3842 include
programmable soft-start ramp, precision
0.7V reference voltage, Power Good,
thermal protection, programmable switching
frequency, Sequence input, Enable input,
input under-voltage lockout for proper start-
up, and pre-bias start-up.
An output over-current protection function is
implemented by sensing the voltage developed
across the on-resistance of the synchronous
rectifier MOSFET for optimum cost and
performance.
This user guide contains the schematic and bill
of materials for the IR3842 evaluation board.
The guide describes operation and use of the
evaluation board itself. Detailed application
information for IR3842 is available in the
IR3842 data sheet.
BOARD FEATURES
•Vin = +12V (13.2V Max)
•Vcc=+5V (5.5V Max)
•Vout = +1.8V @ 0- 4A
•Fs=600kHz
•L= 1.5uH
•Cin= 2x10uF (ceramic 1206) + 330uF (electrolytic)
•Cout= 4x22uF (ceramic 0805)
SupIRBuckTM
IRDC3842
02/02/2009 2
A well regulated +12V input supply should be connected to VIN+ and VIN-. A maximum 4A load should be
connected to VOUT+ and VOUT-. The connection diagram is shown in Fig. 1 and inputs and outputs of the
board are listed in Table I.
IR3842 has two input supplies, one for biasing (Vcc) and the other as input voltage (Vin). Separate supplies
should be applied to these inputs. Vcc input should be a well regulated 4.5V-5.5V supply and it would be
connected to Vcc+ and Vcc-.
If single 12V application is required connect R7 (zero Ohm resistor) which enables the on board bias
regulator (see schematic). In this case there is no need of external Vcc supply.
The output can track a sequencing input at the start-up. For sequencing application, R16 should be
removed and the external sequencing source should be applied between Seq. and Agnd. The value of R1 4
and R28 can be selected to provide the desired ratio between the output voltage and the tracking input. For
proper operation of IR3842, the voltage at Seq. pin should not exceed Vcc.
CONNECTIONS and OPERATING INSTRUCTIONS
LAYOUT
The PCB is a 4-layer board. All of layers are 2 Oz. copper. The IR3842 SupIRBuck and all of the
passive components are mounted on the top side of the board.
Power supply decoupling capacitors, the Bootstrap capacitor and feedback components are located
close to IR3842. The feedback resistors are connected to the output voltage at the point of regulation
and are located close to the SupIRBuck. To improve efficiency, the circuit board is designed to
minimize the length of the on-board power ground current path.
Table I. Connections
Sequence InputSeq.
Vout (+1.8V)VOUT+
Ground for Vcc inputVcc-
Vcc inputVcc+
EnableEnable
Power Good SignalP_Good
Ground of Vout
VOUT-
Ground of Vin
VIN-
Vin (+12V)VIN+
Signal NameConnection
IRDC3842
02/02/2009 3
Connection Diagram
Fig. 1: Connection diagram of IR384x evaluation boards
Vin
PGood
Vo
GND
GND
Enable
SS
Seq
AGND
Vcc GND
IRDC3842
02/02/2009 4
Fig. 2: Board layout, top overlay
Fig. 3: Board layout, bottom overlay (rear view)
IRDC3842
02/02/2009 5
Fig. 4: Board layout, mid-layer I.
Fig. 5: Board layout, mid-layer II.
Single point
connection
between AGND
and PGND.
AGND
Plane
PGND
Plane
IRDC3842
02/02/2009 6
Fig. 6: Schematic of the IR3842 evaluation board
Single point of connection between Power
Ground and Signal ( “analog” ) Ground
Vout-
1
C32
0.1uF
Seq.
1
C21
N/S C22
N/S
Vin
C14
0.1uF
Vcc-
1
C10
0.1uF
PGND
1
L1
1.5uH
R28
N/S
C24
0.1uF
C26
8200pF
C13
0.1uF
R19
750
R14
N/S
SS
1
Vout
Vcc+
1
C2
10uF
C5
N/S
R9
23.7K
R1
2.15K
C3
10uF
R16
0
R3
2.49K
Vin
Vcc
D1
MM3Z5V6B
21
R4
130
Optiona l +5V supply for Vcc
R2
3.92K
R5
3.30K
C4
N/S
Q1
MMBT3904-TP
C15
22uF
C34
10uF
R6
20
C16
22uF
C25
N/S
C17
22uF
R12
2.49k
C18
22uF
C19
N/S
C20
N/S
VCC
U1
IR3842
En 14
Boot 13
AGnd1
15
Rt
5SW 11
Vcc
9
COMP
3
OCset
7PGnd 10
SS
6
Seq
1
FB
2
AGnd
4
PGood
8
Vin 12
A
1
Seq
B
1
R18
4.99K
+
C1
330uF
R*
0
C27
N/S
VCC
C8
2200pF
C7
0.1uF
VCC
R7
N/S
+
C36
N/S
+
C35
N/S
Agnd
1
C28
N/S
Vin+
1
C29
N/S
Vin-
1
C30
N/S
Vout+
1
Vout-
1
R17
10K
PGood
1
C11
220pF
C6
N/S
Enable
1
Vin+
1
Vin-
1
Vout+
1
IRDC3842
02/02/2009 7
Bill of Materials
Item Quantity Part Reference Value Description Manufacturer Part Number
1 1 C1 330uF SMD Elecrolytic, Fsize, 25V, 20% Panasonic EEV-FK1E331P
2 2 C3 C2 10uF 1206, 16V, X5R, 20% Panasonic - ECG ECJ-3YB1C106M
3 1 C34 10uF 0805, 10V, X5R, 20% Panasonic - ECG ECJ-GVB1A106M
4 6 C7 C10 C13 C14 C24 C32 0.1uF 0603, 25V, X7R, 10% Panasonic - ECG ECJ-1VB1E104K
5 1 C8 2200pF 0603, 50V, NP0, 5% Murata GRM1885C1H222JA01D
6 1 C11 220pF 0603, 50V, NP0, 5% Panasonic- ECG ECJ-1VC1H221J
74
C15 C16 C17 C18 22uF 0805, 6.3V, X5R, 20% Panasonic- ECG ECJ-2FB0J226M
8 1 C26 8200pF 0603, 50V, X7R, 10% Panasonic - ECG ECJ-1VB1H822K
9 1 D1 MM3Z5V6B MM3Z5V6B,Zener, 5.6V Fairchild MM3Z5V6B
10 1 L1 1.5uH 11.5x10x4mm, 20%, 3.8mOhm Delta MPO104-1R5
11 1 Q1 MMBT3904/SOT NPN, 40V, 200mA, SOT-23 Fairchild MMBT3904/SOT
12 1 R5 3.3k Thick Film, 0603,1/10W,1% Rohm MCR03EZPFX3301
13 1 R18 4.99k Thick Film, 0603,1/10W,1% Rohm MCR03EZPFX4991
14 1 R4 130 Thick Film, 0603,1/10W,1% Panasonic - ECG ERJ-3EKF1300V
15 1 R6 20 Thick Film, 0603,1/10 W,1% Vishey/Dale CRCW060320R0FKEA
16 1 R9 23.7k Thick Film, 0603,1/10W,1% Rohm MCR03EZPFX2372
17 1 R16 0 Thick Film, 0603,1/10 W,5% Vishay/Dale CRCW06030000Z0EA
18 2 R3 R12 2.49k Thick Film, 0603,1/10 W,1% Rohm MCR03EZPFX2491
19 1 R17 10.0k Thick Film, 0603,1/10W,1% Rohm MCR03EZPFX1002
20 1 R19 750 Thick Film, 0603,1/10W,1% Rohm MCR03EZPFX7500
21 1 R1 2.15k Thick Film, 0603,1/10W,1% Rohm MCR03EZPFX2151
22 1 R2 3.92k Thick Film, 0603,1/10W,1% Rohm MCR03EZPFX3921
23 1 U1 IR3842 PQFN 6mmx5mm, 4A SupIRBuck International Rectifier IR3842MPbF
IRDC3842
02/02/2009 8
TYPICAL OPERATING WAVEFORMS
Vin=12.0V, Vcc=5V, Vo=1.8V, Io=0-4A, Room Temperature, No Air Flow
Fig. 20. Output Voltage Ripple, 4A load
Ch1: Vo
Fig. 21. Inductor node at 4A load
Ch2:LX Fig. 22. S hort (Hiccup) Recovery
Ch1:Vo , Ch3:VSS
Fig. 18. Start up at 4A Load,
Ch1:Vo, Ch2:Vin, Ch3:Vss, Ch4:VPGood
Fig. 17. Start up at 4A Load
Ch1:Vo, Ch2:Vin, Ch3:Vss, Ch4:Enable
Fig. 19. Start up with 1.62V Pre Bias, 0A
Load, Ch1:Vo, Ch3:VSS
IRDC3842
02/02/2009 9
TYPICAL OPERATING WAVEFORMS
Vin=12V, Vc c=5 V, Vo=1.8V, Io=0-4A, Room Temperature, No Air Flow
Fig. 23. Transient Response, 2A to 4A step 2.5A/μs
Ch1:Vo, Ch4:Io
IRDC3842
02/02/2009 10
TYPICAL OPERATING WAVEFORMS
Vin=12V, Vcc=5V, Vo=1.8V, Io=4A, Room Temperature, No Air Flow
Fig. 24. Bode Plot at 4A load shows a bandwidth of 103.76 kHz and phase margin of 52.878
degrees
IRDC3842
02/02/2009 11
Fig.16: Power loss versus load current
Fig.15: Efficiency versus load current
TYPICAL OPERATING WAVEFORMS
Vin=12V, Vo=1 .8V, Io=0- 4A, Room Temperature, No Air Flow
82
83
84
85
86
87
88
89
90
91
92
10 20 30 40 50 60 70 80 90 100
Load Percentage (%)
Efficiency (%)
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
0.65
0.70
10 20 30 40 50 60 70 80 90 100
Load Percentage(%)
Power Loss (W)
IRDC3842
02/02/2009 12
THERMAL IMAGES
Vin=12V, Vo=1.8V, Io=4A, Room Temperature, No Air Flow
Fig. 17: Thermal Image at 4A load
Test points 1 and 2 are IR3842 and inductor, respectively.
IRDC3842
02/02/2009 13
Simultaneous Tracking at Power Up and Power Down
Vin=12V, Vo=1.8V, Io=4A, Room Temperature, No Air Flow
Fig. 18: Simultaneous Tracking a 3.3V input at power-up and shut-down
Ch2: SEQ Ch3:Vout Ch4: SS
In order to run the IR3841 in the simultaneous tracking mode, the following steps should be
taken:
- Remove R16 from the board.
- Set the value of R14 and R28 as R2 (3.92K) and R3 (2.49K), respectively.
- Connect the controlling input across SEQ and AGND test points on the board. This voltage
should be at least 1.15 time greater than Vo. For the following test results a 0-3.3V source is
applied to SEQ pin.
- The controlling input should be applied after the SS pin is clamped to 3.0V.
IRDC3842
02/02/2009
PCB Metal and Components Placement
The lead lands (the 11 IC pins) width should be equal to the nominal part lead width. The minimum
lead to lead spacing should be ≥0.2mm to minimize shorting.
Lead land length should be equal to the maximum part lead length + 0.3 mm outboard extension. The
outboard extension ensures a large and inspectable toe fillet.
The pad lands (the 4 big pads other than the 11 IC pins) length and width should be equal to
maximum part pad length and width. However, the minimum metal to metal spacing should be no less
than 0.17mm for 2 oz. Copper; no less than 0.1mm for 1 oz. Copper and no less than 0.23mm for 3 oz.
Copper.
IRDC3842
02/02/2009
Solder Resist
It is recommended that the lead lands are Non Solder Mask Defined (NSMD). The solder resist
should be pulled away from the metal lead lands by a minimum of 0.025mm to ensure NSMD
pads.
The land pad should be Solder Mask Defined (SMD), with a minimum overlap of the solder resist
onto the copper of 0.05mm to accommodate solder resist mis-alignment.
Ensure that the solder resist in between the lead lands and the pad land is ≥0.15mm due to the
high aspect ratio of the solder resist strip separating the lead lands from the pad land.
IRDC3842
02/02/2009
Stencil Design
• The Stencil apertures for the lead lands should be approximately 80% of the area of the
lead lads. Reducing the amount of solder deposited will minimize the occurrences of lead
shorts. If too much solder is deposited on the center pad the part will float and the lead
lands will be open.
• The maximum length and width of the land pad stencil aperture should be equal to the
solder resist opening minus an annular 0.2mm pull back t o decrease the incidence of
shorting the center land to the lead lands when the part is pushed into the solder paste.
IRDC3842
02/02/2009
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
This product has been designed and qualified for the Consumer market.
Visit us at www.irf.com for sales contact information
Data and specifications subject to change without notice. 11/07
BOTTOM VIEW
