1. General description
The 74HC4060; 74HCT4060 are high-speed Si-gate CMOS device and is pin compatible
with the HEF4060.
The 74HC4060; 74HCT4060 are 14-stage ripple-carry counter/dividers and oscillators
with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to Q9 and
Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator
configuration allows design of either RC or crystal oscillator circuits. The oscillator may be
replaced by an external clock signal at input RS. In this case keep the other oscillator pins
(RTC and CTC) floating. The counter advances on the negative-going transition of RS. A
HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of
other input conditions. In the HCT version, the MR input is TTL compatible, but the RS
input has CMOS input switching levels and can be driven by a TTL output by using a
pull-up resistor to VCC.
2. Features
nAll active components on chip
nRC or crystal oscillator configuration
nComplies with JEDEC standard no. 7 A
nESD protection:
uHBM JESD22-A114E exceeds 2000 V
uMM JESD22-A115-A exceeds 200 V
nMultiple package options
nSpecified from 40 °Cto+85°C and from 40 °C to +125 °C
3. Applications
nControl counters
nTimers
nFrequency dividers
nTime-delay circuits
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Rev. 03 — 14 July 2008 Product data sheet
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 2 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
4. Ordering information
5. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC4060N 40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HCT4060N
74HC4060D 40 °C to +125 °C SO16 plastic small outline package; 16 leads;
body width 3.9 mm SOT109-1
74HCT4060D
74HC4060DB 40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm SOT338-1
74HCT4060DB
74HC4060PW 40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm SOT403-1
74HC4060BQ 40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal-enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 ×3.5 × 0.85 mm
SOT763-1
74HCT4060BQ
Fig 1. Logic symbol
Q3
Q11
Q4
Q9
Q5
Q8
RS
MR
Q6
Q7
RTC
001aai467
7
5
4
6
14
10
15
13
11
1
Q12 2
Q13 3
CTC
9
12
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 3 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Fig 2. IEC logic symbol
3
CTR14
(b)
11
9CT = 0
001aai468
7
5
4
6
14
15
13
1
2
11
13 3
AND
CT
+
12
3
CTR14
(a)
11
9CT = 0
7
5
4
6
14
15
13
1
2
11
13 3
!G
CT
+
12
10
9
RCX
RX
CX
Fig 3. Functional diagram
001aai113
910
Q3
7
MR
CP
RS
RTC CTC
MR
11
12
14-STAGE BINARY COUNTER
Q4
5
Q5
4
Q6
6
Q7
14
Q8
13
Q9
15
Q11
1
Q12
2
Q13
3
Fig 4. Logic diagram
001aai114
CTC
RTC
CP
MR Q
RS
MR Q13
Q11Q9Q3
FF
1
CP
MR Q
FF
4
CP
MR Q
FF
10
CP
MR Q
FF
12
CP
MR Q
FF
14
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 4 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
6. Pinning information
6.1 Pinning
6.2 Pin description
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as
supply pin or input.
Fig 5. Pin configuration DIP16, SO16 and (T)SSOP16 Fig 6. Pin configuration DHVQFN16
74HC4060
74HCT4060
Q11 VCC
Q12 Q9
Q13 Q7
Q5 Q8
Q4 MR
Q6 RS
Q3 RTC
GND CTC
001aai115
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
001aai469
74HC4060
74HCT4060
Q3 RTC
Q6 RS
Q4 MR
Q5 Q8
Q13 Q7
Q12 Q9
GND
CTC
Q11
VCC
Transparent top view
7 10
6 11
5 12
4 13
3 14
2 15
8
9
1
16
terminal 1
index area
VCC(1)
Table 2. Pin description
Symbol Pin Description
Q11 to Q13 1, 2, 3 counter output
Q3 to Q9 7, 5, 4, 6, 14, 13, 15 counter output
GND 8 ground (0 V)
CTC 9 external capacitor connection
RTC 10 external resistor connection
RS 11 clock input /oscillator pin
MR 12 master reset input (active HIGH)
VCC 16 supply voltage
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 5 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
7. Functional description
8. Limiting values
Fig 7. Timing diagram
001aai117
RS
MR
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q11
Q12
Q13
12481632641282565121024 2048 4096 8192 16384
Table 3. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7 V
IIK input clamping current VI < 0.5 V or VI>V
CC + 0.5 V [1] -±20 mA
IOK output clamping current VO<0.5 V or VO>V
CC + 0.5 V [1] -±20 mA
IOoutput current 0.5 V < VO < VCC + 0.5 V - ±25 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 °C
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 6 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 12 mW/K above 70 °C.
[3] Ptot derates linearly with 8 mW/K above 70 °C.
[4] Ptot derates linearly with 5.5 mW/K above 60 °C.
[5] Ptot derates linearly with 4.5 mW/K above 60 °C.
9. Recommended operating conditions
10. Static characteristics
Ptot total power dissipation Tamb = 40 °C to +125 °C
DIP16 package [2] - 750 mW
SO16 package [3] - 500 mW
(T)SSOP16 package [4] - 500 mW
DHVQFN16 package [5] - 500 mW
Table 3. Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
Table 4. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions 74HC4060 74HCT4060 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
VIinput voltage 0 - VCC 0-V
CC V
VOoutput voltage 0 - VCC 0-V
CC V
Tamb ambient temperature 40 - +125 40 - +125 °C
t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
Table 5. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
74HC4060
VIH HIGH-level
input voltage MR input
VCC = 2.0 V 1.5 1.3 - 1.5 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V
VCC = 6.0 V 4.2 3.1 - 4.2 - 4.2 - V
RS input
VCC = 2.0 V 1.7 - - 1.7 - 1.7 - V
VCC = 4.5 V 3.6 - - 3.6 - 3.6 - V
VCC = 6.0 V 4.8 - - 4.8 - 4.8 - V
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 7 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
VIL LOW-level
input voltage MR input
VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V
VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V
RS input
VCC = 2.0 V - - 0.3 - 0.3 - 0.3 V
VCC = 4.5 V - - 0.9 - 0.9 - 0.9 V
VCC = 6.0 V - - 1.2 - 1.2 - 1.2 V
VOH HIGH-level
output
voltage
RTC output; RS = MR = GND
IO=20 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO=20 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=20 µA; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO=2.6 mA; VCC = 4.5 V 3.98 - - 3.84 - 3.7 - V
IO=3.3 mA; VCC = 6.0 V 5.48 - - 5.34 - 5.2 - V
RTC output; RS = MR = VCC
IO=20 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO=20 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=20 µA; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO=0.65 mA; VCC = 4.5 V 3.98 - - 3.84 - 3.7 - V
IO=0.85 mA; VCC = 6.0 V 5.48 - - 5.34 - 5.2 - V
CTC output;
RS=V
IH;MR=V
IL
IO=3.2 mA; VCC = 4.5 V 3.98 - - 3.84 - 3.7 - V
IO=4.2 mA; VCC = 6.0 V 5.48 - - 5.34 - 5.2 - V
VI=V
IH or VIL;
except RTC output
IO=20 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO=20 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=20 µA; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
VI=V
IH or VIL;
except RTC and CTC outputs
IO=4.0 mA; VCC = 4.5 V 3.98 - - 3.84 - 3.7 - V
IO=5.2 mA; VCC = 6.0 V 5.48 - - 5.34 - 5.2 - V
Table 5. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 8 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
VOL LOW-level
output
voltage
RTC output; RS = VCC;
MR = GND
IO=20µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO=20µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO=20µA; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 2.6 mA; VCC = 4.5 V - - 0.26 - 0.33 - 0.4 V
IO= 3.3 mA; VCC = 6.0 V - - 0.26 - 0.33 - 0.4 V
CTC output; RS = VIL;
MR = VIH
IO= 3.2 mA; VCC = 4.5 V - - 0.26 - 0.33 - 0.4 V
IO= 4.2 mA; VCC = 6.0 V - - 0.26 - 0.33 - 0.4 V
VI=V
IH or VIL;
except RTC output
IO=20µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO=20µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO=20µA; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
VI=V
IH or VIL;
except RTC and CTC outputs
IO= 4.0 mA; VCC = 4.5 V - - 0.26 - 0.33 - 0.4 V
IO= 5.2 mA; VCC = 6.0 V - - 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI=V
CC or GND; VCC = 6.0 V - - ±0.1 - ±1.0 - ±1.0 µA
ICC supply
current VI=V
CC or GND; IO=0A;
VCC = 6.0 V - - 8.0 - 80 - 160 µA
CIinput
capacitance - 3.5 - - - - - pF
74HCT4060
VIH HIGH-level
input voltage MR input;
VCC = 4.5 V to 5.5 V [1] 2.0 - - 2.0 - 2.0 - V
VIL LOW-level
input voltage MR input;
VCC = 4.5 V to 5.5 V [1] - - 0.8 - 0.8 - 0.8 V
Table 5. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 9 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
[1] For HCT4060, only input MR (pin 12) has TTL input switching levels.
VOH HIGH-level
output
voltage
RTC output; RS = MR = VCC
IO=20 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=0.65 mA; VCC = 4.5 V 3.98 - - 3.84 - 3.7 - V
RTC output; RS = MR = GND
IO=20 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=2.6 mA; VCC = 4.5 V 3.98 - - 3.84 - 3.7 - V
CTC output; RS = VIH;
MR = VIL
IO=3.2 mA; VCC = 4.5 V 3.98 - - 3.84 - 3.7 - V
VI=V
IH or VIL;
except RTC output
IO=20 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
VI=V
IH or VIL;
except RTC and CTC outputs
IO=4.0 mA; VCC = 4.5 V 3.98 - - 3.84 - 3.7 - V
VOL LOW-level
output
voltage
RTC output; RS = VCC;
MR = GND
IO=20µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO= 2.6 mA; VCC = 4.5 V - - 0.26 - 0.33 - 0.4 V
CTC output; RS = VIL;
MR = VIH
IO= 3.2 mA; VCC = 4.5 V - - 0.26 - 0.33 - 0.4 V
VI=V
IH or VIL;
except RTC output
IO=20µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
VI=V
IH or VIL;
except RTC and CTC outputs
IO= 4.0 mA; VCC = 4.5 V - - 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI=V
CC or GND; VCC = 5.5 V - - ±0.1 - ±1.0 - ±1.0 µA
ICC supply
current VI=V
CC or GND;
VCC = 5.5 V; IO=0A - - 8.0 - 80 - 160 µA
ICC additional
supply
current
per input pin;
VI=V
CC 2.1 V; other inputs
at VCC or GND;
VCC = 4.5 V to 5.5 V; IO=0A
- 40 144 - 180 - 196 µA
CIinput
capacitance - 3.5 - - - - - pF
Table 5. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 10 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
11. Dynamic characteristics
Table 6. Dynamic characteristics
GND = 0 V; C
L
= 50 pF unless otherwise specified; for test circuit see Figure 11.
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
74HC4060
tpd propagation
delay RS to Q3; see Figure 8 [1]
VCC = 2.0 V - 99 300 - 375 - 450 ns
VCC = 4.5 V - 36 60 - 75 - 90 ns
VCC = 5.0 V; CL=15pF - 31 - - - - - ns
VCC = 6.0 V - 29 51 - 64 - 77 ns
Qn to Qn+1; see Figure 9 [2]
VCC = 2.0 V - 22 80 - 100 - 120 ns
VCC = 4.5 V - 8 16 - 20 - 24 ns
VCC = 5.0 V; CL=15pF - 6 - - - - - ns
VCC = 6.0 V - 6 14 - 17 - 20 ns
tPHL HIGH to LOW
propagation
delay
MR to Qn; see Figure 10
VCC = 2.0 V - 55 175 - 220 - 265 ns
VCC = 4.5 V - 20 35 - 44 - 53 ns
VCC = 5.0 V; CL=15pF - 17 - - - - - ns
VCC = 6.0 V - 16 30 - 37 - 45 ns
tttransition time Qn; see Figure 8 [3]
VCC = 2.0 V - 19 75 - 95 - 110 ns
VCC = 4.5 V - 7 15 - 19 - 22 ns
VCC = 6.0 V - 6 13 - 16 - 19 ns
tWpulse width RS (HIGH or LOW);
see Figure 8
VCC = 2.0 V 80 17 - 100 - 120 - ns
VCC = 4.5 V 16 6 - 20 - 24 - ns
VCC = 6.0 V 14 5 - 17 - 20 - ns
MR (HIGH); see Figure 10
VCC = 2.0 V 80 25 - 100 - 120 - ns
VCC = 4.5 V 16 9 - 20 - 24 - ns
VCC = 6.0 V 14 7 - 17 - 20 - ns
trec recovery time MR to RS; see Figure 10
VCC = 2.0 V 100 28 - 125 - 150 - ns
VCC = 4.5 V 20 10 - 25 - 30 - ns
VCC = 6.0 V 17 8 - 21 - 26 - ns
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 11 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
fmax maximum
frequency RS; see Figure 8
VCC = 2.0 V 6 26 - 4.8 - 4 - MHz
VCC = 4.5 V 30 80 - 24 - 20 - MHz
VCC = 5.0 V; CL= 15 pF - 87 - - - - - MHz
VCC = 6.0 V 35 95 - 28 - 24 - MHz
CPD power
dissipation
capacitance
VI = GND to VCC;
VCC =5V; f
i= 1 MHz [4] -40- - - - -pF
74HCT4060
tpd propagation
delay RS to Q3; see Figure 8 [1]
VCC = 4.5 V - 33 66 - 83 - 99 ns
VCC = 5.0 V; CL=15pF - 31 - - - - - ns
Qn to Qn+1; see Figure 9 [2]
VCC = 4.5 V - 8 16 - 20 - 24 ns
VCC = 5.0 V; CL=15pF - 6 - - - - - ns
tPHL HIGH to LOW
propagation
delay
MR to Qn; see Figure 10
VCC = 4.5 V - 21 44 - 55 - 66 ns
VCC = 5.0 V; CL=15pF - 18 - - - - - ns
tttransition time Qn; see Figure 8 [3]
VCC = 4.5 V - 7 15 - 19 - 22 ns
tWpulse width RS (HIGH or LOW);
see Figure 8
VCC = 4.5 V 16 6 - 20 - 24 - ns
MR (HIGH); see Figure 10
VCC = 4.5 V 16 6 - 20 - 24 - ns
trec recovery time MR to RS; see Figure 10
VCC = 4.5 V 26 13 - 33 - 39 - ns
fmax maximum
frequency RS; see Figure 8
VCC = 4.5 V 30 80 - 24 - 20 - MHz
VCC = 5.0 V; CL= 15 pF - 88 - - - - - MHz
Table 6. Dynamic characteristics
…continued
GND = 0 V; C
L
= 50 pF unless otherwise specified; for test circuit see Figure 11.
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 12 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
[1] tpd is the same as tPHL and tPLH.
[2] Qn+1 is the next Qn output.
[3] tt is the same as tTHL and tTLH.
[4] CPD is used to determine the dynamic power dissipation (PD in µW):
PD=C
PD ×VCC2×fi×N+(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL×VCC2×fo) = sum of outputs.
12. Waveforms
CPD power
dissipation
capacitance
VI = GND to VCC 1.5 V;
VCC =5V; f
i= 1 MHz [4] -40- - - - -pF
Table 6. Dynamic characteristics
…continued
GND = 0 V; C
L
= 50 pF unless otherwise specified; for test circuit see Figure 11.
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
Measurement points are given in Table 7.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 8. Waveforms showing the clock (RS) to output (Q3) propagation delays, the clock pulse width, the output
transition times and the maximum clock frequency
001aai118
RS input
1/fmax
tW
tTHL tTLH
tPHL tPLH
VOH
VI
GND
VOL
VM
VM
10 %
90 %90 %
10 %
Q3 output
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 13 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Measurement points are given in Table 7.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 9. Waveforms showing the output Qn to output Qn+1 propagation delays
001aai120
Qn output
tPLH tPHL
VOH
VOH
VOL
VOL
VM
VM
Qn+1 output
Measurement points are given in Table 7.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 10. Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation
delays and the master reset to clock (RS) recovery time
001aai119
RS input
MR input
tPHL
trec
VOH
VI
GND
VI
VOL
VM
VM
TW
VM
GND
Qn output
Table 7. Measurement points
Type Input Output
VMVM
74HC4060 0.5 ×VCC 0.5 ×VCC
74HCT4060 1.3 V 1.3 V
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 14 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Test data is given in Table 8.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
Fig 11. Test circuit for measuring switching times
001aah768
tW
tW
tr
tr
tf
VM
VI
negative
pulse
GND
VI
positive
pulse
GND
10 %
90 %
90 %
10 % VMVM
VM
tf
VCC
DUT
RT
VIVO
CL
G
Table 8. Test data
Type Input Load
VItr, tfCL
74HC4060 VCC 6 ns 15 pF, 50 pF
74HCT4060 3 V 6 ns 15 pF, 50 pF
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 15 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
13. RC oscillator
13.1 Timing component limitations
The oscillator frequency is mainly determined by RtCt, provided R2 2Rt and
R2C2 << RtCt. The function of R2 is to minimize the influence of the forward voltage
across the input protection diodes on the frequency. The stray capacitance C2 should be
kept as small as possible. In consideration of accuracy, Ctmust be larger than the inherent
stray capacitance. Rtmust be larger than the ON resistance in series with it, which
typically is 280 at VCC = 2.0 V, 130 at VCC = 4.5 V and 100 at VCC = 6.0 V.
The recommended values for these components to maintain agreement with the typical
oscillation formula are:
Ct> 50 pF, up to any practical value and 10 k<R
t<1 M.
In order to avoid start-up problems, Rt 1 k.
13.2 Typical crystal oscillator circuit
In Figure 13, R2 is the power limiting resistor. For starting and maintaining oscillation a
minimum transconductance is necessary, so R2 should not be too large. A practical value
for R2 is 2.2 k.
Typical formula for oscillator frequency:
Fig 12. Example of a RC oscillator
001aai121
MR (from logic)
C2 R2 Rt
RTC
11 RS
CTC
10 9
Ct
74HC4060
74HCT4060
fosc 1
2.5 Rt
×Ct
×
-------------------------------
=
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 16 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
gfs =IO / VI at VO is constant; MR = LOW.
See also Figure 15.
Fig 13. External component connection for a crystal
oscillator Fig 14. Test set-up for measuring forward
transconductance
001aai122
MR (from logic)
C2
100 pF
C3
22 pF to 37 pF
Rbias
100 k to 1MR2
2.2 k
RTC
11 RS
10
74HC4060
74HCT4060
001aai123
560 k
Rbias
input
0.47 pF 100 µF
output
GND
VDD
VI
(fi = 1 kHz) IO
A
Tamb =25°C.
(1) Maximum.
(2) Typical.
(3) Minimum.
Fig 15. Typical forward transconductance as function of the supply voltage
001aai124
VCC (V)
0642
6
10
14
gfs
(mA/V)
2
(1)
(2)
(3)
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 17 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
VCC = 2.0 V to 6.0 V; Tamb =25°C.
For Rtcurve: Ct= 1 nF; R2 = 2 × Rt.VCC = 2.0 V to 6.0 V; Tamb =25°C.
For Ctcurve: Rt= 100 k; R2 = 200 k.
Fig 16. RC oscillator frequency as a function of RtFig 17. RC oscillator frequency as a function of Ct
001aai125
Rt ()
103106
105
104
102
103
104
105
fosc
(Hz)
10
Rt
001aai127
Ct (µF)
104101
102
103
102
103
104
105
fosc
(Hz)
10
Ct
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 18 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
14. Package outline
Fig 18. Package outline SOT38-4 (DIP16)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT38-4 95-01-14
03-02-13
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
b2
e
D
A2
Z
16
1
9
8
E
pin 1 index
b
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
UNIT A
max. 12 b1(1) (1) (1)
b2cD E e M Z
H
L
mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
min. A
max. bmax.
w
ME
e1
1.73
1.30 0.53
0.38 0.36
0.23 19.50
18.55 6.48
6.20 3.60
3.05 0.2542.54 7.62 8.25
7.80 10.0
8.3 0.764.2 0.51 3.2
inches 0.068
0.051 0.021
0.015 0.014
0.009
1.25
0.85
0.049
0.033 0.77
0.73 0.26
0.24 0.14
0.12 0.010.1 0.3 0.32
0.31 0.39
0.33 0.030.17 0.02 0.13
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 19 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Fig 19. Package outline SOT109-1 (SO16)
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10 1.45
1.25 0.25 0.49
0.36 0.25
0.19 10.0
9.8 4.0
3.8 1.27 6.2
5.8 0.7
0.6 0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT109-1 99-12-27
03-02-19
076E07 MS-012
0.069 0.010
0.004 0.057
0.049 0.01 0.019
0.014 0.0100
0.0075 0.39
0.38 0.16
0.15 0.05
1.05
0.041
0.244
0.228 0.028
0.020 0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 20 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Fig 20. Package outline SOT338-1 (SSOP16)
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.25 0.38
0.25 0.20
0.09 6.4
6.0 5.4
5.2 0.65 1.25
7.9
7.6 1.03
0.63 0.9
0.7 1.00
0.55 8
0
o
o
0.130.2 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT338-1 99-12-27
03-02-19
(1)
wM
bp
D
HE
E
Z
e
c
vMA
X
A
y
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
MO-150
pin 1 index
0 2.5 5 mm
scale
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1
A
max.
2
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 21 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Fig 21. Package outline SOT403-1 (TSSOP16)
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 5.1
4.9 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.40
0.06 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT403-1 MO-153 99-12-27
03-02-18
wM
bp
D
Z
e
0.25
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
y
0 2.5 5 mm
scale
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
A
max.
1.1
pin 1 index
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 22 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Fig 22. Package outline SOT763-1 (DHVQFN16)
terminal 1
index area
0.51
A1Eh
b
UNIT ye
0.2
c
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 3.6
3.4
Dh
2.15
1.85
y1
2.6
2.4 1.15
0.85
e1
2.5
0.30
0.18
0.05
0.00 0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT763-1 MO-241 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT763-1
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
A(1)
max.
AA1c
detail X
y
y1C
e
L
Eh
Dh
e
e1
b
27
15 10
9
8
1
16
X
D
E
C
BA
terminal 1
index area
AC
CB
vM
wM
E(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D(1)
02-10-17
03-01-27
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 23 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
15. Abbreviations
16. Revision history
Table 9. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT4060_3 20080714 Product data sheet - 74HC_HCT4060_CNV_2
Modifications: The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Section 4: DHVQFN16 package added.
Section 8: derating values added for DHVQFN16 package.
Section 14: outline drawing added for DHVQFN16 package.
74HC_HCT4060_CNV_2 19970901 Product specification - -
74HC_HCT4060_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 14 July 2008 24 of 25
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
17. Legal information
18. Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.1 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
18.2 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
18.3 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors 74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
© NXP B.V. 2008. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 14 July 2008
Document identifier: 74HC_HCT4060_3
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
20. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 5
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Recommended operating conditions. . . . . . . . 6
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 10
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
13 RC oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13.1 Timing component limitations. . . . . . . . . . . . . 15
13.2 Typical crystal oscillator circuit . . . . . . . . . . . . 15
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18
15 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 23
16 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 23
17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 24
18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 24
18.1 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
18.2 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 24
18.3 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 24
19 Contact information. . . . . . . . . . . . . . . . . . . . . 24
20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25