CCD image sensor S9037/S9038 series
2
Absolute maximum ratings (Ta=25 °C)
Operating conditions (MPP mode, Ta=25 °C)
Electrical characteristics (Typ. Ta=25 °C unless otherwise noted)
Parameter Symbol Min. Typ. Max. Unit
Operating temperature*4Topr -50 - +70 °C
Storage temperature Tstg -50 - +70 °C
Output transistor drain voltage VOD -0.5 - +25 V
Reset drain voltage VRD -0.5 - +18 V
Horizontal input source voltage VISH -0.5 - +18 V
Horizontal input gate voltage VIG1H, VIG2H -10 - +15 V
Summing gate voltage VSG -10 - +15 V
Output gate voltage VOG -10 - +15 V
Reset gate voltage VRG -10 - +15 V
Transfer gate voltage VTG -10 - +15 V
Vertical shift register clock voltage VP1V, VP2V -10 - +15 V
Horizontal shift register clock voltage VP1H, VP2H -10 - +15 V
Note: Exceeding the absolute maximum ratings even momentarily may cause a drop in product quality. Always be sure to use the
product within the absolute maximum ratings.
*4: Chip temperature
Parameter Symbol Min. Typ. Max. Unit
Output transistor drain voltage VOD 12 15 - V
Reset drain voltage VRD 11.5 12 12.5 V
Output gate voltage VOG 135V
Substrate voltage VSS -0-V
Test point Horizontal input source VISH -VRD -V
Horizontal input gate VIG1H, VIG2H -9 -8 0 V
Vertical shift register
clock voltage
High VP1VH, VP2VH 468
V
Low VP1VL, VP2VL -9 -8 -7
Horizontal shift register
clock voltage
High VP1HH, VP2HH 468
V
Low VP1HL, VP2HL -9 -8 -7
Summing gate voltage High VSGH 468
V
Low VSGL -9 -8 -7
Reset gate voltage High VRGH 468
V
Low VRGL -9 -8 -7
Transfer gate voltage High VTGH 468
V
Low VTGL -9 -8 -7
External load resistance RL2.0 2.2 2.4 kΩ
Parameter Symbol Min. Typ. Max. Unit
Signal output frequency fc - - 10 MHz
Line rate -0902 LR -16-
kHz
-1002 - 8 -
Vertical shift register capacitance -0902 CP1V, CP2V - 100 - pF
-1002 - 200 - pF
Horizontal shift register capacitance -0902 CP1H, CP2H - 130 - pF
-1002 - 170 - pF
Summing gate capacitance CSG -30-pF
Reset gate capacitance CRG -30-pF
Transfer gate capacitance CTG -50-pF
Transfer effi ciency*5CTE 0.99995 0.99999 - -
DC output level Vout - 7 - V
Output impedance*6Zo - 500 - Ω
Power dissipation*6 *7P - 100 - mW
*5: Charge transfer effi ciency per pixel, measured at half of the full well capacity
*6: The values depend on the load resistance.
*7: Power dissipation of the on-chip amplifi er plus load resistance