FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©2008-2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2009.9
ASSP for Power Management Applications
2 ch DC/DC Converter IC Built-in Switching FET &
voltage detection function, PFM/PWM Synchronous
Rectification, and Down Conversion Support
MB39C007
■DESCRIPTION
The MB39C007 is a current mode type 2-channel DC/DC conver ter IC built-in voltage detection, synchronous
rectifier, and down conversion suppor t. The device is integrated with a switching FET, oscillator, error amplifier,
PFM/PWM control circuit, reference voltage source, and voltage detection circuit.
External inductor and decoupling capacitor are needed only for the external component.
MB39C007 is small, achie v e a highly eff ective DC/DC con v erter in the full load range, this is suitab le as the built-
in power supply for handheld equipment such as mobile phone/PDA, DVDs, and HDDs.
■FEATURES
• High efficiency : 96% (Max)
• Low current consumption : 30 μA (At PFM/ch)
• Output current : 800 mA/ch (Max)
• Input voltage range : 2.5 V to 5.5 V
• Operating frequency : 2.0 MHz (Typ)
• Built-in PWM operation fixed function
• No flyback diode needed
• Low dropout operation : For 100% on duty
• Built-in high-precision reference voltage generator : 1.30 V ± 2%
• Consumption current in shutdown mode : 1 μA or less
• Built-in switching FET : P-ch MOS 0.3 Ω (Typ) , N-ch MOS 0.2 Ω (Typ)
• High speed for input and load transient response in the current mode
• Over temperature protection
• Packaged in a compact package : QFN-24
■APPLICATIONS
•Flash ROMs
• MP3 players
• Electronic dictionary devices
• Surveillance cameras
• Portable GPS navigators
• DVD drives
• IP phones
• Network hubs
• Mobile phones etc.
DS04-27246-2E
MB39C007
2DS04-27246-2E
■PIN ASSIGNMENT
LX2 LX1DGND2 DGND2 DGND1 DGND1
CTLP
19
20
21
22
23
24
12
11
10
9
8
7
123456
18 17 16 15 14 13
VREFCTL2 CTL1 AGND AVDD
DVDD2
DVDD2
OUT2
MODE2
VREFIN2
XPOR
DVDD1
DVDD1
OUT1
MODE1
VREFIN1
VDET
(Top View)
(LCC-24P-M09)
MB39C007
DS04-27246-2E 3
■PIN DESCRIPTIONS
Pin No. Pin Name I/O Description
1CTLPI
Voltage detection circuit block control input pin.
(L : Voltage detection function stop / H : Normal operation)
2, 3 CTL2, CTL1 I DC/DC converter block control input pins.
(L : Shut down / H : Normal operation)
4AGND⎯Control block ground pin.
5AVDD⎯Control block power supply pin.
6 VREF O Reference voltage output pin.
7 VDET I Voltage detection input pin.
8, 23 VREFIN1, VREFIN2 I Error amplifier (Error Amp) non-inverted input pins.
9, 22 MODE1, MODE2 I Operation mode switch pins.
(L : PFM/PWM mode / OPEN : PWM mode)
10, 21 OUT1, OUT2 I Output voltage feedback pins.
11, 12 DVDD1 ⎯Drive block power supply pins.
19, 20 DVDD2
13, 18 LX1, LX2 O Inductor connection output pins.
High impedance during shut down.
14, 15 DGND1 ⎯Drive block ground pins.
16, 17 DGND2
24 XPOR O VDET circuit output pin.
Connected to an N-ch MOS open drain circuit.
MB39C007
4DS04-27246-2E
■I/O PIN EQUIVALENT CIRCUIT DIAGRAM
GND
VDD
LX1
,
LX2
∗
∗
GND
VDD
VREF
XPOR
∗
GND
∗
GND
VDD
CTL1
,
CTL2
,
CTLP
GND
VDD
∗
∗
VREFIN1
,
VREFIN2
,
VDET OUT1
,
OUT2
∗
∗
MODE1
,
MODE2
∗
GND
VDD
∗
* : ESD Protection device
MB39C007
DS04-27246-2E 5
■BLOCK DIAGRAM
×3−
+
−
+
VIN DVDD2
11, 12 19, 20
DVDD1
AVDD
VOUT1
VIN
XPOR
5
16, 17
DGND2
14, 15
DGND1AGND4
ON/OFF
ON/OFF
ON/OFF
CTL1
OUT1
3
10
8
VREFIN1
DAC
9
1
7
MODE1
VDET
CTLP
CTL2
OUT2
VIN
DVDD1
IOUT
Comp.
Error Amp
Error Amp
PFM/PWM
Logic
Control
×3−
+
DVDD2
I
OUT
Comp.
PFM/PWM
Logic
Control
LX1
13
VOUT2
LX2
18
24
1.30 V
VREF
VREF
VREFIN2
MODE2
6
21
2
23
22
Mode
Control
L:PFM/PWM
OPEN:PWM
Mode
Control
L:PFM/PWM
OPEN:PWM
MB39C007
6DS04-27246-2E
• Current mode
• Original voltage mode type :
Stabilize the output voltage by comparing two items below and on-duty control.
- Voltage (VC) obtained through negative feedback of the output voltage by Error Amp
- Reference triangular wave (VTRI)
• Current mode type :
Instead of the triangular wav e (VTRI), the voltage (VIDET) obtained through I-V con version of the sum of currents
that flow in the oscillator (rectangular wave generation circuit) and SW FET is used.
Stabilize the output voltage by comparing two items below and on-duty control.
- Voltage (VC) obtained through negative feedback of the output voltage by Error Amp
- Voltage (VIDET) obtained through I-V conversion of the sum of current that flow in the oscillator (rectangular
wave generation circuit) and SW FET
VIN
ton
toff
VTRI
Vc
Vc
VTRI
VIN
toff
Vc
Vc
VIDET
S
R
ton
SR-FF
VIDET
Q
−
+−
+
Voltage mode type model Current mode type model
Oscillator
Note : The abov e models illustrate the general operation and an actual operation will be pref erred in the IC.
MB39C007
DS04-27246-2E 7
■FUNCTION OF EACH BLOCK
• PFM/PWM Logic control circuit
In nor mal operation, frequency (2.0 MHz) which is set by the built-in oscillator (square wave oscillation circuit)
controls the built-in P-ch MOS FET and N-ch MOS FET for the synchronous rectification operation. In the light
load mode, the intermittent (PFM) operation is executed.
This circuit protects against pass-through current caused by synchronous rectification and against reverse
current caused in a non-successive operation mode.
•I
OUT Comparator circuit
This circuit detects the current (ILX) which flows to the external inductor from the built-in P-ch MOS FET.
By comparing VIDET obtained through I-V conv ersion of peak current IPK of ILX with the Error Amp output, the built-
in P-ch MOS FET is turned off via the PFM/PWM Logic Control circuit.
• Error Amp phase compensation circuit
This circuit compares the output voltage to reference voltages such as VREF. This IC has a built-in phase
compensation circuit that is designed to optimize the operation of this IC.
This needs neither to be considered nor addition of a phase compensation circuit and an external phase
compensation device.
•VREF circuit
A high accuracy reference voltage is generated with BGR (bandgap reference) circuit. The output voltage is
1.30 V (Typ).
• Voltage Detection (VDET) circuit
The voltage detection circuit monitors the VDET pin voltage. Normally, use the XPOR pin through pull-up with
an external resistor. When the VDET pin voltage reaches 0.6 V, it reaches the H level.
Timing chart example : (XPOR pin pulled up to VIN)
• Protection circuit
This IC has a built-in over-tempera ture protection circuit.
The over-temperature protection circuit turns off both N-ch and P-ch switching FETs when the junction
temperature reaches + 135 °C. When the junction temperature comes down to + 110 °C, the switching FET is
returned to the normal operation. Since the PFM/PWM control circuit of this IC is in the control method in current
mode, the current peak value is also monitored and controlled as required.
VIN
CTLP
VDET
XPOR
VUVLO
VTHHPR
VTHLPR
VUVLO : UVLO threshold voltage
VTHHPR, VTHLPR : XPOR threshold voltage
MB39C007
8DS04-27246-2E
• Function table
* : Don't care
Input Output
CTL1 CTL2 CTLP MODE CH1
function CH2
function VDET
function VREF
function Switching operation
L * Stopped
HL
L
L
Operation Stopped
Stopped
1.3 V
output
PFM/PWM mode
L H Stopped Operation
HOperation
L
H
Stopped
OperationH L Operation Stopped
L H Stopped Operation
H Operation
HL
L
Open
Operation Stopped
Stopped
PWM fixed mode
L H Stopped Operation
HOperation
L
H
Stopped
OperationH L Operation Stopped
L H Stopped Operation
H Operation
MB39C007
DS04-27246-2E 9
■ABSOLUTE MAXIMUM RATINGS
*1 : See the diagram of “■ EXAMPLE OF STANDARD OPERATION CHARACTERISTICS. Power dissipation vs.
Operating ambient temperature” for the package power dissipation of Ta from + 25 °C to + 85 °C.
*2 : When mounted on a four-layer epoxy board of 11.7 cm × 8.4 cm
*3 : IC is mounted on a f our-lay er epoxy board, which has thermal via, and the IC's thermal pad is connected to the
epoxy board (Thermal via is 9 holes).
*4 : IC is mounted on a four-layer epoxy board, which has no thermal via, and the IC's thermal pad is connected
to the epoxy board.
Notes: • The use of negativ e v oltages below − 0.3 V to the AGND, DGND1, and DGND2 pin may create parasitic
transistors on LSI lines, which can cause abnormal operation.
• This device can be damaged if the LX pins are short-circuited to A VDD and D VDD1/D VDD2, or AGND and
DGND1/DGND2.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Parameter Symbol Condition Rating Unit
Min Max
Power supply voltage VDD AVDD = DVDD1 = DVDD2 −0.3 +6.0 V
Signal input voltage VISIG
OUT1, OUT2 pins −0.3 VDD + 0.3
V
CTLP, CTL1, CTL2,
MODE1, MODE2 pins −0.3 VDD + 0.3
VREFIN1, VREFIN2 pins −0.3 VDD + 0.3
VDET pin −0.3 VDD + 0.3
XPOR pull-up voltage VIXPOR XPOR pin −0.3 +6.0 V
LX voltage VLX LX1, LX2 pins −0.3 VDD + 0.3 V
LX Peak current IPK The upper limit value of ILX1
and ILX2 ⎯1.8 A
Power dissipation PD
Ta ≤ +25 °C⎯3125*1, *2, *3mW
⎯1563*1, *2, *4
Ta = +85 °C⎯1250*1, *2, *3mW
⎯625*1, *2, *4
Operating ambient
temperature Ta ⎯−40 +85 °C
Storage temperature TSTG ⎯−55 +125 °C
MB39C007
10 DS04-27246-2E
■RECOMMENDED OPERATING CONDITIONS
Note : The output current from this device has a situation to decrease if the power supply voltage (VIN) and the DC/DC
conv erter output voltage (V OUT) differ only b y a small amount. This is a result of slope compensation and will
not damage this device.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
Parameter Symbol Condition Value Unit
Min Typ Max
Power supply voltage VDD AVDD = DVDD1 = DVDD2 2.5 3.7 5.5 V
VREFIN voltage VREFIN ⎯0.15 ⎯1.30 V
CTL voltage VCTL CTLP, CTL1, CTL2 pins 0 ⎯5.0 V
LX current ILX ILX1, ILX2 ⎯⎯800 mA
VREF output current IROUT
2.5 V ≤ AVDD = DVDD1 =
DVDD2 < 3.0 V ⎯⎯0.5 mA
3.0 V ≤ AVDD = DVDD1 =
DVDD2 ≤ 5.5 V ⎯⎯ 1
XPOR current IPOR ⎯⎯⎯1mA
Inductor value L ⎯⎯2.2 ⎯μH
MB39C007
DS04-27246-2E 11
■ELECTRICAL CHARACTERISTICS
(Ta = +25 °C, AVDD = DVDD1 = DVDD2 = 3.7 V, VOUT1/VOUT2 setting value = 2.5 V, MODE1/MODE2 = 0 V)
* : This value is not be specified. This should be used as a reference to support designing the circuits.
(Continued)
Parameter Sym-
bol Pin No. Condition Value Unit
Min Typ Max
DC/DC
converter
block
Input current IREFIN 8, 23 VREFIN = 0.15 V to 1.3 V − 100 0 + 100 nA
Output voltage VOUT
10, 21
VREFIN = 0.833 V,
OUT = −100 mA 2.45 2.50 2.55 V
Input stability LINE 2.5 V ≤ AVDD = DVDD1 =
DVDD2 ≤ 5.5 V*1⎯⎯10 mV
Load stability LOAD −100 mA ≥ OUT ≥ −800 mA ⎯⎯10 mV
OUT pin input
impedance ROUT OUT = 2.0 V 0.6 1.0 1.5 MΩ
LX Peak current IPK
13, 18
Output shorted to GND 0.9 1.2 1.7 A
PFM/PWM
switch current IMSW ⎯⎯30 ⎯mA
Oscillation
frequency fosc ⎯1.6 2.0 2.4 MHz
Rise delay time tPG 2, 3,
10, 21 C1/C2 = 4.7 μF, OUT = 0 A,
OUT1/OUT2 : 0 → 90% VOUT ⎯45 80 μs
SW NMOS-FET
OFF voltage VNOFF
13, 18
⎯⎯ − 10* ⎯mV
SW PMOS-FET
ON resistance RONP LX1/LX2 = −100 mA ⎯0.30 0.48 Ω
SW NMOS-FET
ON resistance RONN LX1/LX2 = −100 mA ⎯0.20 0.42 Ω
LX leak current ILEAKM 0 ≤ LX ≤ VDD*2 − 1.0 ⎯ + 8.0 μA
ILEAKH VDD = 5.5 V, 0 ≤ LX ≤ VDD*2 − 2.0 ⎯ + 16.0 μA
Protection
circuit
block
Overheating
protection
(Junction Temp.)
TOTPH
⎯⎯
+ 120* + 135* + 160* °C
TOTPL + 95* + 110* + 125* °C
UVLO threshold
voltage VTHHUV 5, 11,
12, 19,
20
⎯2.17 2.30 2.43 V
VTHLUV 2.03 2.15 2.27 V
UVLO
hysteresis width VHYSUV ⎯0.08 0.15 0.25 V
Voltage
detection
circuit
block
XPOR threshold
voltage VTHHPR
7⎯575 600 625 mV
VTHLPR 558 583 608 mV
XPOR
hysteresis width VHYSPR ⎯⎯17 ⎯mV
XPOR output
voltage VOL 24 XPOR = 25 μA⎯⎯0.1 V
XPOR output
current IOH XPOR = 5.5 V ⎯⎯1.0 μA
MB39C007
12 DS04-27246-2E
(Continued)
(Ta = +25 °C, AVDD = DVDD1 = DVDD2 = 3.7 V, VOUT1/VOUT2 setting value = 2.5 V, MODE1/MODE2 = 0 V)
*1 : The minimum v alue of AVDD = DVDD1 = DVDD2 is the 2.5 V or VOUT setting value + 0.6 V, whiche v er is higher .
*2 : The + leak at the LX pin includes the current of the internal circuit.
*3 : Sum of the current flowing into the AVDD, the DVDD1, and the DVDD2 pins.
*4 : Current consumption based on 100% ON-duty (High side FET in full ON state). The SW FET gate drive current is
not included because the device is in full ON state (no switching operation). Also the load current is not included.
Parameter Symbol Pin No. Condition Value Unit
Min Typ Max
Control
block
CTL threshold
voltage VTHHCT
1, 2, 3
⎯0.55 0.95 1.45 V
VTHLCT ⎯0.40 0.80 1.30 V
CTL pin
input current IICTL 0 V ≤ CTLP/CTL1/CTL2 ≤
3.7 V ⎯⎯1.0 μA
Reference
voltage
block
VREF voltage VREF 6VREF = 0 A 1.274 1.300 1.326 V
VREF Load
stability LOADREF VREF = −1.0 mA ⎯⎯20 mV
General
Shut down
power supply
current
IVDD1
5, 11,
12, 19,
20
CTLP/CTL1/CTL2 = 0 V,
State of all circuits OFF*3⎯⎯1.0 μA
IVDD1H CTLP/CTL1/CTL2 = 0 V,
VDD = 5.5 V,
State of all circuits OFF*3⎯⎯1.0 μA
Power supply
current at DC/DC
operation 1
(PFM mode)
IVDD21
1. CTLP = 0 V,CTL1 = 3.7 V,
CTL2 = 0 V
2. CTLP = 0 V, CTL1 = 0 V,
CTL2 = 3.7 V, OUT = 0 A
⎯30 48 μA
IVDD22 CTLP = 0 V, CTL1/CTL2 =
3.7 V, OUT = 0 A ⎯50 80 μA
Power supply
current at DC/DC
operation 2
(PWM mode)
IVDD31
1. CTLP = 0 V, CTL1 = 3.7 V,
CTL2 = 0 V, MODE1/
MODE2 = OPEN
2. CTLP = 0 V, CTL1 = 0 V,
CTL2 = 3.7 V, MODE1/
MODE2 = OPEN,
OUT = 0 A
⎯3.5 10.0 mA
IVDD32
CTLP = 0 V, CTL1/CTL2 =
3.7 V,
MODE1/MODE2 = OPEN,
OUT = 0 A
⎯7.0 20.0 mA
Power supply
current
(voltage detection
mode)
IVDD5 CTLP = 3.7 V,
CTL1/CTL2 = 0 V ⎯15 24 μA
Power-on
invalid current IVDD
1. CTL1 = 3.7 V, CTL2 = 0 V
2. CTL1 = 0 V, CTL2 = 3.7 V,
VOUT1/VOUT2 = 90%,
OUT = 0 A*4
⎯1000 2000 μA
MB39C007
DS04-27246-2E 13
■TEST CIRCUIT FOR MEASURING TYPICAL OPERATING CHARACTERISTICS
Note : These components are recommended based on the operating tests authorized.
TDK : TDK Corporation
SSM : SUSUMU Co., Ltd
KOA : KOA Corporation
Component Specification Vendor Part Number Remarks
R1 1 MΩKOA RK73G1JTTD D 1 MΩ
R3-1
R3-2 20 kΩ
150 kΩ
SSM
SSM RR0816-203-D
RR0816-154-D VOUT1/VOUT2 = 2.5 V
Setting
R4 300 kΩSSM RR0816-304-D
R5 510 kΩKOA RK73G1JTTD D 510 kΩ
R6 100 kΩSSM RR0816-104-D
C1 4.7 μF TDK C2012JB1A475K
C2 4.7 μF TDK C2012JB1A475K
C3 0.1 μF TDK C1608JB1E104K
C6 0.1 μF TDK C1608JB1H104K For adjusting slow start time
L1 2.2 μH TDK VLF4012AT-2R2M
VIN
VOUT1/
VOUT2
L1
2.2 µH
C1
4.7µF IOUT
C2
4.7 µF
CTL1/CTL2
MODE1/MODE2
VREF
VREFIN1/VREFIN2 AGND
OUT1/OUT2
AVDD
LX1/LX2
DVDD1/DVDD2
GND
R1
1 MΩ
VDD VDD
MB39C007
DGND1/DGND2
VDET
R4
300 kΩ
R5
510 kΩ
R6
100 kΩ
C6
0.1 µF
SW
C3
0.1 µF
R3-1
20 kΩ
R3-2
150 kΩ
SW
VOUT = 2.97 × VREFIN
MB39C007
14 DS04-27246-2E
■APPLICATION NOTES
[1] Selection of components
• Selection of an external inductor
Basically it dose not need to design inductor. This IC is designed to operate efficiently with a 2.2 μH external
inductor.
The inductor should be rated for a saturation current higher than the LX peak current value during normal
operating conditions, and should have a minimal DC resistance. (100 mΩ or less is recommended.)
LX peak current value IPK is obtained by the following formula.
L : External inductor value
IOUT : Load current
VIN : Power supply voltage
VOUT : Output setting voltage
D : ON-duty to be switched ( = VOUT/VIN)
fosc : Switching frequency (2 MHz)
ex) When VIN = 3.7 V, VOUT = 2.5 V, IOUT = 0.8 A, L = 2.2 μH, fosc = 2.0 MHz
The maximum peak current value IPK is obtained by the following formula.
• I/O capacitor selection
• Select a low equivalent series resistance (ESR) for the VDD input capacitor to suppress dissipation from ripple
currents.
• Also select a low equivalent series resistance (ESR) for the output capacitor. The variation in the inductor
current causes ripple currents on the output capacitor which, in turn, causes r ipple voltages an output equal
to the amount of variation multiplied b y the ESR v alue. The output capacitor v alue has a significant impact on
the operating stability of the device when used as a DC/DC converter. Therefore, FUJITSU MICROELEC-
TRONICS gener ally recommends a 4.7 μF capacitor , or a larger capacitor value can be used if ripple voltages
are not suitable. If the VIN/VOUT voltage difference is within 0.6 V, the use of a 10 μF output capacitor value is
recommended.
• Types of capacitors
Ceramic capacitors are effective for reducing the ESR and afford smaller DC/DC conver ter circuit. However,
power supply functions as a heat generator, therefore avoid to use capacitor with the F-temperature rating
( − 80% to + 20%) . FUJITSU MICROELECTRONICS recommends capacitors with the B-temperature rating
( ± 10% to ± 20%).
Normal electrolytic capacitors are not recommended due to their high ESR.
Tantalum capacitor will reduce ESR, however, it is dangerous to use because it tur ns into short mode when
damaged. If you insist on using a tantalum capacitor , FUJITSU MICR OELECTRONICS recommends the type
with an internal fuse.
IPK = IOUT + VIN − VOUT × D × 1 = IOUT + (VIN − VOUT) × VOUT
L fosc 2 2 × L × fosc × VIN
IPK = IOUT + (VIN − VOUT) × VOUT = 0.8 A + (3.7 V − 2.5 V) × 2.5 V := 0.89 A
2 × L × fosc × VIN 2 × 2.2 μH × 2.0 MHz × 3.7 V
MB39C007
DS04-27246-2E 15
[2] Output voltage setting
The output voltage VOUT (VOUT1 or VOUT2) of this IC is defined by the voltage input to VREFIN (VREFIN1 or
VREFIN2) . Supply the voltage for inputting to VREFIN from an external power supply, or set the VREF output
by dividing it with resistors.
The output voltage when the VREFIN voltage is set by dividing the VREF voltage with resistors is obtained by
the following formula.
Note : Refer to “■ APPLICATION CIRCUIT EXAMPLES” for the an example of this circuit.
Although the output v oltage is defined according to the dividing r atio of resistance, select the resistance value
so that the current flowing through the resistance does not exceed the VREF current rating (1 mA) .
VOUT = 2.97 × VREFIN, VREFIN = R2 × VREF
R1 + R2
(VREF = 1.30 V)
R2
R1
VREF
VREFIN
VREF
VREFIN
MB39C007
MB39C007
16 DS04-27246-2E
[3] About conversion efficienc y
The conversion efficiency can be improved by reducing the loss of the DC/DC converter circuit.
The total loss (PLOSS) of the DC/DC converter is roughly divided as follows :
PLOSS = PCONT + PSW + PC
PCONT : Control system circuit loss (The pow er used for this IC to operate, including the gate driving power f o r
internal SW FETs)
PSW : Switching loss (The loss caused during switching of the IC's internal SW FETs)
PC : Continuity loss (The loss caused when currents flow through the IC's internal SW FETs and external
circuits )
The IC's control circuit loss (PCONT) is extremely small, less than 100 mW* (with no load).
As the IC contains FETs which can switch faster with less power, the continuity loss (PC) is more predominant
as the loss during heavy-load operation than the control circuit loss (PCONT) and switching loss (PSW) .
Furthermore, the continuity loss (PC) is divided roughly into the loss by internal SW FET ON-resistance and by
external inductor ser ies resistance.
PC = IOUT2 × (RDC + D × RONP + (1 − D) × RONN)
D : Switching ON-duty cycle ( = VOUT / VIN)
RONP : Internal P-ch SW FET ON resistance
RONN : Internal N-ch SW FET ON resistance
RDC : External inductor series resistance
IOUT : Load current
The above for mula indicates that it is important to reduce RDC as much as possible to improve efficiency by
selecting components.
* : The loss in the successiv e operation mode . This IC s uppresses the loss in order to ex ecute the PFM oper ation
in the low load mode (less than 100 μA in no load mode). Mode is changed b y the current peak v alue IPK which
flows into switching FET. The threshold value is about 30 mA.
MB39C007
DS04-27246-2E 17
[4] Power dissipation and heat considerations
The IC is so efficient that no consideration is required in most cases. However, if the IC is used at a low power
supply voltage, hea vy load, high output v oltage, or high temper ature, it requires further consideration f or higher
efficiency.
The internal loss (P) is roughly obtained from the following formula :
P = IOUT2 × (D × RONP + (1 − D) × RONN)
D : Switching ON-duty cycle ( = VOUT / VIN)
RONP : Internal P-ch SW FET ON resistance
RONN : Internal N-ch SW FET ON resistance
IOUT : Output current
The loss e xpressed b y the abo v e f ormula is mainly continuity loss . The internal loss includes the switching loss
and the control circuit loss as well but they are so small compared to the continuity loss they can be ignored.
In this IC with RONP greater than RONN, the larger the on-duty cycle, the greater the loss.
When assuming VIN = 3.7 V, Ta = + 70 °C, for example, RONP = 0.36 Ω and RONN = 0.30 Ω according to the
graph “MOS FET ON resistance vs. Operating ambient temperature”. The IC's internal loss P is 123 mW at
VOUT = 2.5 V and IOUT = 0.6 A. According to the graph “Power dissipation vs. Operating ambient temperature”,
the power dissipation at an operating ambient temperature Ta of + 70 °C is 300 mW and the internal loss is
smaller than the power dissipation.
MB39C007
18 DS04-27246-2E
[5] XPOR threshold voltage setting [VPORH, VPORL]
Set the detection voltage by applying voltage to the VDET pin via an external resistor calculated according to
this formula.
VTHHPR = 0.600 V
VTHLPR = 0.583 V
Example for setting detection voltage to 3.7 V
R3 = 510 kΩ
R4 = 100 kΩ
VPORH = R3 + R4 × VTHHPR
R4
VPORL = R3 + R4 × VTHLPR
R4
VPORH = 510 kΩ + 100 kΩ × 0.600 = 3.66 := 3.7 [V]
100 kΩ
VPORL = 510 kΩ + 100 kΩ × 0.583 = 3.56 := 3.6 [V]
100 kΩ
R4
R3 1 MΩ
VIN
XPOR
AVDD
MB39C007
XPOR
VDET
MB39C007
DS04-27246-2E 19
[6] Transient response
Normally, IOUT is suddenly changed while VIN and VOUT are maintained constant, responsiveness including the
response time and ov ershoot/undershoot voltage is chec ked. As this IC has built-in Error Amp with an optimiz ed
design, it shows good transient response characteristics. However, if r inging upon sudden change of the load
is high due to the operating conditions, add capacitor C6 (e.g. 0.1 μF). (Since this capacitor C6 changes the
start time, check the start waveform as well.) This action is not required for DAC input.
R2
R1
VREF
VREFIN
VREF
VREFIN1/
VREFIN2
MB39C007
C6
MB39C007
20 DS04-27246-2E
[7] Board layout, design example
The board layout needs to be designed to ensure the stable operation of this IC.
Follow the procedure below for designing the layout.
• Arrange the input capacitor (Cin) as close as possible to both the VDD and GND pins. Make a through-hole
(TH) near the pins of this capacitor if the board has planes for power and GND.
• Large AC currents flow between this IC and the input capacitor (Cin), output capacitor (Co), and external
inductor (L). Group these components as close as possible to this IC to reduce the o v erall loop area occupied
by this g roup. Also try to mount these components on the same surf ace and arr ange wiring without through-
hole wiring. Use thick, short, and straight routes to wire the net (The layout by planes is recommended.).
• Arrange a bypass capacitor for AVDD as close as possible to both the ADVV and AGND pins. Make a
through-hole (TH) near the pins of this capacitor if the board has planes for power and GND.
• The feedback wiring to the OUT should be wired from the voltage output pin closest to the output capacitor
(Co). The OUT pin is e xtremely sensitiv e and should thus be k ept wired a w a y from the LX pin of this IC as far
as possible.
• If applying v oltage to the VREFIN1/VREFIN2 pins through dividing resistors, arr ange the resistors so that the
wiring can be kept as short as possible. Also arr ange them so that the GND pin of VREFIN1/VREFIN2 resistor
is close to the IC's AGND pin. Further, provide a GND exclusively for the control line so that the resistor can
be connected via a path that does not carry current. If installing a bypass capacitor f or the VREFIN, put it close
to the VREFIN pin.
• If applying voltage to the VDET pin through dividing resistors, arrange the resistors so that the wiring can be
kept as short as possible. Also arrange so that the GND pin of the VDET resistor is close to the IC's AGND
pin. Fur ther, provide a GND exclusively for the control line so that the resistor can be connected via a path
that does not carry current.
• Try to make a GND plane on the surf ace to which this IC will be mounted. For efficient heat dissipation when
using the QFN-24 package, FUJITSU MICROELECTRONICS recommends providing a thermal via in the
footprint of the thermal pad.
• Example of arranging IC SW system parts
Cin VIN
GND
Cin
VIN
Co Co
GND VIN
1pin
L
L
Feedback line Feedback line
AVDD bypass capacitor
MB39C007
DS04-27246-2E 21
• Notes for circuit design
The switching operation of this IC works by monitoring and controlling the peak current which, incidentally,
serves as a form of short-circuit protection. How ever, do not leave the output short-circuited for long periods of
time. If the output is short-circuited where VIN < 2.9 V, the current limit value (peak current to the inductor) tends
to rise. Leaving in the short-circuit state, the temperature of this IC will continue rising and activate the thermal
protection.
Once the thermal protection stops the output, the temperature of the IC will go down and operation will be
restarted, after which the output will repeat the starting and stopping.
Although this effect will not destroy the IC, the thermal exposure to the IC over prolonged hours may affect the
peripherals surrounding it.
MB39C007
22 DS04-27246-2E
■EXAMPLE OF STANDARD OPERATION CHARACTERISTICS
(Shown below is an example of characteristics for connection according to “■ TEST CIRCUIT FOR MEASURING
TYPICAL OPERATING CHARACTERISTICS”.)
• Characteristics CH1
(Continued)
50
60
70
80
90
100
1 10 100 1000
VIN = 3.0 V
VIN = 4.2 V
Ta = +25°C
VOUT = 2.5 V
MODE = L
VIN = 3.7 V
VIN = 5.0 V
50
60
70
80
90
100
V
IN
= 3.0 V
V
IN
= 4.2 V
Ta = +25°C
V
OUT
= 1.2 V
MODE = L
V
IN
= 3.7 V
V
IN
= 5.0 V
1 10 100 1000
50
60
70
80
90
100
VIN = 3.0 V
VIN = 4.2 V
Ta = +25°C
VOUT = 1.8 V
VIN = 3.7 V
VIN = 5.0 V
1 10 100 1000
50
60
70
80
90
100
VIN = 4.2 V
Ta = +25°C
VOUT = 3.3 V
MODE = L
VIN = 3.7 V
VIN = 5.0 V
1 10 100 1000
Load current IOUT (mA)
Conversion efficiency η (%)
Load current IOUT (mA)
Conversion efficiency η (%)
Load current IOUT (mA)
Conversion efficiency η (%)
Load current IOUT (mA)
Conversion efficiency η (%)
Conversion efficiency vs. Load current
(PFM/PWM mode) Conversion efficiency vs. Load current
(PFM/PWM mode)
Conversion efficiency vs. Load current
(PFM/PWM mode) Conversion efficiency vs. Load current
(PFM/PWM mode)
MB39C007
DS04-27246-2E 23
(Continued)
0
10
20
30
40
50
60
70
80
90
100
VIN = 3.0 V
VIN = 4.2 V
VIN = 5.0 V
Ta = +25°C
VOUT = 2.5 V
MODE = OPEN
VIN = 3.7 V
1 10 100 1000
0
10
20
30
40
50
60
70
80
90
100
VIN = 3.0 V VIN = 4.2 V
Ta = +25°C
VOUT = 1.2 V
MODE = OPEN
VIN = 3.7 V
VIN = 5.0 V
1 10 100 1000
0
10
20
30
40
50
60
70
80
90
100
VIN = 3.0 V
VIN = 4.2 V
Ta = +25°C
VOUT = 1.8 V
MODE = OPEN
VIN = 3.7 V
VIN = 5.0 V
1 10 100 1000
0
10
20
30
40
50
60
70
80
90
100
VIN = 4.2 V
Ta = +25°C
VIN = 3.7 V
VIN = 5.0 V
1 10 100 1000
VOUT = 3.3 V
MODE = OPEN
Load current IOUT (mA)
Conversion efficiency η (%)
Load current IOUT (mA)
Conversion efficiency η (%)
Conversion efficiency vs. Load current
(PWM fixed mode) Conversion efficiency vs. Load current
(PWM fixed mode)
Conversion efficiency vs. Load current
(PWM fixed mode)
Conversion efficiency η (%)
Conversion efficiency vs. Load current
(PWM fixed mode)
Conversion efficiency η (%)
Load current IOUT (mA) Load current IOUT (mA)
MB39C007
24 DS04-27246-2E
(Continued)
2.40
2.42
2.44
2.46
2.48
2.50
2.52
2.54
2.56
2.58
2.60
2.0 3.0 4.0 5.0 6.0
IOUT = -100 mA
IOUT = 0 A
Ta = +25°C
VOUT = 2.5 V
MODE = L
2.40
2.42
2.44
2.46
2.48
2.50
2.52
2.54
2.56
2.58
2.60
2.0
IOUT = -100 mA
IOUT = 0 A
Ta = +25°C
VOUT = 2.5 V
MODE = OPEN
3.0 4.0 5.0 6.0
2.40
2.42
2.44
2.46
2.48
2.50
2.52
2.54
2.56
2.58
2.60
0 200 400 600
Ta = +25°C
VIN = 3.7 V
VOUT = 2.5 V
MODE = L
800
2.40
2.42
2.44
2.46
2.48
2.50
2.52
2.54
2.56
2.58
2.60
0
Ta = +25°C
400200 600 800
VOUT = 2.5 V
VIN = 3.7 V
MODE = OPEN
MB39C007
DS04-27246-2E 25
(Continued)
1.20
1.22
1.24
1.26
1.28
1.30
1.32
1.34
1.36
1.38
1.40
2.0 3.0 4.0 5.0 6.0
IOUT
= -100 mA
IOUT
= 0 A
Ta = +25°C
V
OUT
= 2.5 V
1.20
1.22
1.24
1.26
1.28
1.30
1.32
1.34
1.36
1.38
1.40
-50 0 +50 +100
V
IN
= 3.7 V
V
OUT
= 2.5 V
IOUT
= 0 A
0
5
10
15
20
25
30
35
40
45
50
2.0 3.0 4.0 5.0 6.0
Ta = +25°C
VOUT = 2.5 V
MODE = L
0
1
2
3
4
5
6
7
8
9
10
Ta = +25°C
V
OUT
= 2.5 V
MODE = OPEN
2.0 3.0 4.0 5.0 6.0
Input voltage VIN (V)
Reference voltage VREF (V)
Input voltage VIN (V)
Input current IIN (μA)
Input voltage VIN (V)
Input current IIN (mA)
Reference voltage vs. Input voltage
Input current vs. Input voltage
(PFM/PWM mode) Input current vs. Input voltage
(PWM fixed mode)
Operating ambient temperature Ta ( °C)
Reference voltage VREF (V)
Reference voltage vs.
Operating ambient temperature
MB39C007
26 DS04-27246-2E
(Continued)
0
5
10
15
20
25
30
35
40
45
50
-50 0 +50 +100
V
IN
= 3.7 V
V
OUT
= 2.5 V
MODE = L
0
1
2
3
4
5
6
7
8
9
10
VIN = 3.7 V
VOUT = 2.5 V
MODE = OPEN
-50 0 +50 +100
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
Ta = +25°C
V
OUT
= 1.8 V
IOUT
= -100 mA
2.0 3.0 4.0 5.0 6.0
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
VIN = 3.7 V
VOUT = 2.5 V
IOUT
= -100 mA
-50 0 +50 +100
Power supply voltage VIN (V)
Oscillation frequency fOSC (MHz)
Operating ambient temperature Ta ( °C)
Oscillation frequency fOSC (MHz)
Oscillation frequency vs.
Power supply voltage Oscillation frequency vs.
Operating ambient temperature
Operating ambient temperature Ta ( °C)
Input current IIN (μA)
Input current vs. Operating ambient temperature
(PFM/PWM mode)
Operating ambient temperature Ta ( °C)
Input current IIN (mA)
Input current vs. Operating ambient temperature
(PWM fixed mode)
MB39C007
DS04-27246-2E 27
(Continued)
0
0.1
0.2
0.3
0.4
0.5
0.6
Ta = +25°C
P-ch
N-ch
2.0 3.0 4.0 5.0 6.0
0
0.1
0.2
0.3
0.4
0.5
0.6
VIN = 3.7 V
VIN = 5.5 V
-50 0 +50 +100
0
0.1
0.2
0.3
0.4
0.5
0.6
VIN = 3.7 V
VIN = 5. 5 V
-50 0 +50 +100
Operating ambient temperature Ta ( °C)
N-ch MOS FET ON resistor RONN (Ω)
N-ch MOS FET
ON resistor vs. Operating ambient temperature
Input voltage VIN (V)
MOS FET ON resistor RON (Ω)
MOS FET ON resistor vs. Input voltage
Operating ambient temperature Ta ( °C)
P-ch MOS FET ON resistor RONP (Ω)
P-ch MOS FET ON resistor vs.
Operating ambient temperature
MB39C007
28 DS04-27246-2E
(Continued)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Ta = +25°C
V
OUT
= 2.5 V
V
THLMD
V
THMMD
2.0 3.0 4.0 5.0 6.0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Ta = +2 5°C
VOUT = 2.5 V
V
THHCT
V
THLCT
2.0 3.0 4.0 5.0 6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Ta = + 2 5°C
V
PORH
V
PORL
2.0 3.0 4.0 5.0 6.0
Input voltage VIN (V)
VXPOR (V)
VXPOR vs. Input voltage
Input voltage VIN (V)
MODE VTH (V)
MODE VTH vs. Input voltage
Input voltage VIN (V)
CTL VTH (V)
CTL VTH vs. Input voltage
VTHHCT : Circuit OFF→ON
VTHLCT : Circuit ON→OFF
MB39C007
DS04-27246-2E 29
(Continued)
0
500
1000
1500
2000
2500
3000
3500
+85
-50 0 +50 +100
1250
3125
0
500
1000
1500
2000
2500
3000
3500
1563
+85
625
-50 0 +50 +100
Operating ambient temperature Ta ( °C)
Power dissipation PD (mW)
Power dissipation vs.
Operating ambient temperature
(with thermal via)
Operating ambient temperature Ta ( °C)
Power dissipation PD (mW)
Power dissipation vs.
Operating ambient temperature
(without thermal via)
MB39C007
30 DS04-27246-2E
• Switching waveform
2 μs/div
V
O1
: 20 mV/div (AC)
V
LX1
: 2.0 V/div
l
LX1
: 500 mA/div
V
IN
= 3.7 V, I
O1
= −5 mA, V
O1
= 2.5 V, MODE = L ,Ta = +25 °C
1
2
4
2 μs/div
V
O2
: 20 mV/div (AC)
V
LX2
: 2.0 V/div
l
LX2
: 500 mA/div
1
2
4
V
IN
= 3.7 V, I
O2
= −5 mA, V
O2
= 1.8 V, MODE = L ,Ta = +25 °C
2 μs/div
V
O1
: 20 mV/div (AC)
V
LX1
: 2.0 V/div
l
LX1
: 500 mA/div
1
2
4
V
IN
= 3.7 V, V
O1
= 2.5 V, I
O1
= −800 mA, MODE = L ,Ta = +25 °C
2 μs/div
V
O2
: 20 mV/div(AC)
V
LX2
: 2.0 V/div
l
LX2
: 500 mA/div
2
4
1
V
IN
= 3.7 V, V
O2
= 1.8 V, I
O2
= −800 mA, MODE = L ,Ta = +25 °C
PFM/PWM operation
PWM operation
MB39C007
DS04-27246-2E 31
• Output waveforms at sudden load changes
100 μs/div
V
O1
: 200 mV/div
V
LX1
: 2.0 V/div
l
O1
: 1 A/div
0 A
−800 mA
1
2
4
V
IN
= 3.7 V, V
O1
= 2.5 V, MODE = L ,Ta = +25 °C
100 μs/div
V
O2
: 200 mV/div
V
LX2
: 2.0 V/div
l
O2
: 1 A/div
0 A
−800 mA
1
2
4
V
IN
= 3.7 V, V
O2
= 1.8 V, MODE = L ,Ta = +25 °C
20 mA
800 mA
100 μs/div
V
O1
: 200 mV/div
V
LX1
: 2.0 V/div
l
O1
: 1 A/div
4
2
1
V
IN
= 3.7 V, V
O1
= 2.5 V, MODE = L ,Ta = +25 °C
V
LX2
: 2.0 V/div
V
O2
: 200 mV/div
l
O2
: 1 A/div
100 μs/div
20 mA
800 mA
1
2
4
V
IN
= 3.7 V, V
O2
= 1.8 V, MODE = L ,Ta = +25 °C
V
LX1
: 2.0 V/div
l
O1
: 1 A/div
100 mA
800 mA
100 µs/div
V
O1
: 200 mV/div
1
2
4
V
IN
= 3.7 V, V
O1
= 2.5 V, MODE = L ,Ta = +25 °C
VLX2 : 2.0 V/div
lO2 : 1 A/div
100 mA
800 mA
VO2 : 200 mV/div
100 μs/div
1
2
4
VIN = 3.7 V, VO2 = 1.8 V, MODE = L ,Ta = +25 °C
0 A ←→ − 800 mA
− 20 mA ←→ − 800 mA
− 100 mA ←→ − 800 mA
MB39C007
32 DS04-27246-2E
• CTL start-up waveform
(Continued)
V
LX1
: 5 V/div
CTL1 : 5 V/div
I
LX1
: 1 A/div
V
IN
= 3.7 V, V
O1
= 2.5 V, MODE = L, Ta = + 25 °C
10 μs/div
V
O1
: 1 V/div
2
4
1
3
CTL2 : 5 V/div
V
O2
: 1 V/div
V
LX2
: 5 V/div
I
LX2
: 1 A/div
10 μs/div
V
IN
= 3.7 V, V
O2
= 1.8 V, MODE = L, Ta = + 25 °C
3
4
2
1
ILX1 : 1 A/div
VLX1 : 5 V/div
VO1 : 1 V/div
CTL1 : 5 V/div
10 μs/div
VIN = 3.7 V, VO1 = 2.5 V
, IO1 = −800 mA
, MODE = L, Ta = + 25 °C
2
4
1
3
10 μs/div
V
IN
= 3.7 V, V
O2
= 1.8 V
, I
O2
= −800 mA
, MODE = L, Ta = + 25 °C
4
2
1
CTL2 : 5 V/div
V
O2
: 1 V/div
V
LX2
: 5 V/div
3
I
LX2
: 1 A/div
No load, No VREFIN capacitor
Maximum load, No VREFIN capacitor
MB39C007
DS04-27246-2E 33
(Continued)
• CTL stop waveform
VIN = 3.7 V, VO1 = 2.5 V
,
MODE = L, Ta = + 25 °C
4
2
1
3
ILX1 : 1 A/div
VO1 : 1 V/div
CTL1 : 5 V/div
VLX1 : 5 V/div
1 ms/div
V
IN
= 3.7 V, V
O2
= 1.8 V
,
MODE = L, Ta = + 25 °C
4
2
1
3
I
LX2
: 1 A/div
V
O2
: 1 V/div
CTL2 : 5 V/div
V
LX2
: 5 V/div
1 ms/div
4
2
1
3
VIN = 3.7 V, VO1 = 2.5 V
, I
O1
= −800 mA
, MODE = L, Ta = + 25 °C
CTL1 : 5 V/div
V
O1
: 1 V/div
I
LX1
: 1 A/div
V
LX1
: 5 V/div
1 ms/div
4
2
1
3
CTL2 : 5 V/div
V
O2
: 1 V/div V
LX2
: 5 V/div
I
LX2
: 1 A/div
1 ms/div
V
IN
= 3.7 V, V
O2
= 1.8 V
, IO2 = −800 mA
, MODE = L, Ta = + 25 °C
No load, VREFIN capacitor = 0.1 μF
Maximum load, VREFIN capacitor = 0.1 μF
1
2
3
4
CTL1 : 5 V/div
10 μs/div
V
O1
: 1 V/div
V
LX1
: 5 V/div
V
IN
= 3.7 V, V
O1
= 2.5 V
, I
O1
= −800 mA
, MODE = L, Ta = + 25 °C
I
LX1
: 1 A/div
1
2
3
4
CTL2 : 5 V/div
10 μs/div
V
O2
: 1 V/div
V
LX2
: 5 V/div
I
LX2
: 1 A/div
V
IN
= 3.7 V, V
O2
= 1.8 V
, I
O2
= −800 mA
, MODE = L, Ta = + 25 °C
Maximum load, VREFIN capacitor = 0.1 μF
MB39C007
34 DS04-27246-2E
• Current limitation waveform
• Voltage detection waveform
• Waveform of dynamic output voltage transition (VO1 1.8 V←→2.5 V)
1
4
100 μs/div
V
O1
: 1 V/div
1.5 A
I
LX1
: 1 A/div
V
IN
= 3.7 V
,
V
O1
= 2.5 V
,
MODE = OPEN
,
Ta = +25 °C
600 mA
1
4
100 μs/div
V
O2
: 1 V/div
1.5 A
I
LX2
: 1 A/div
V
IN
= 3.7 V, V
O2
= 1.8 V, MODE = OPEN, Ta = +25 °C
600 mA
3
1
2
VIN : 3 V/div
VVDET : 1 V/div
VXPOR : 3 V/div
VIN = 3.7 V
,
CTLP = VIN
,
Ta = +25 °C
1 ms/div
Pull-up XPOR to VIN at 1 kΩ.
1.8 V
1
3
V
O1
: 200 mV/div
V
VREFIN1
: 200 mV/div
V
IN
= 3.7 V
,
l
O1
= −800 mA
,
−576 mA ( 3.125 Ω)
,
MODE = L
,
Ta = +25 °C
,
No VREFIN capacitor
10 μs/div
2.5 V
840 mV
610 mV
1.8 V
MB39C007
DS04-27246-2E 35
■APPLICATION CIRCUIT EXAMPLES
• APPLICATION CIRCUIT EXAMPLE 1
• An external voltage is input to the ref erence voltage external input (VREFIN1, VREFIN2) , and the VOUT voltage
is set to 2.97 times the VOUT setting gain.
VIN
CPU
VOUT1
DAC1
L1
2.2 μH
L2
2.2 μH
4.7 μF
C1
4.7 μF
C2
MB39C007 C3
4.7 μF
4.7 μF
CTL1
MODE1
VREFIN1
OUT1
XPOR
LX1
DVDD1
R8
1 MΩ
R7
1 MΩ
CTL2
MODE2
VREF
VREFIN2
VDET
CTLP
DVDD2
DGND1
DGND2
C4
0.1 μF
C5
AVDD
AGND
OUT2
LX2
DAC2
APLI2
VOUT2
VOUT = 2.97 × VREFIN
3
8
2
23
9
22
6
7
124
21
18
10
13
4
5
16
17
19
20
14
15
11
12
APLI1
L = PFM/PWM
OPEN = PWM
MB39C007
36 DS04-27246-2E
• APPLICATION CIRCUIT EXAMPLE 2
• The voltage of VREF pin is input to the reference voltage external input (VREFIN1, VREFIN2) by dividing
resistors. The VOUT1 voltage is set to 2.5 V and VOUT2 voltage is set to 1.8 V.
R8
1 MΩ
R6
300 kΩ
R2
R5
( 13 kΩ + 330 kΩ )
343 kΩ
R1
( 13 kΩ + 150 kΩ )
163 kΩ
300 kΩ
R7
1 MΩ
CPU
MB39C0007
CTL1
VREF
VREFIN1
CTL2
MODE2
MODE1
VREFIN2
CTLP
3
8
2
23
6
9
22
7
1
VIN
C3
4.7 μF
4.7 μF
DVDD1
DVDD2
DGND1
DGND2
C4
0.1 μF
C5
AVDD
AGND 4
5
16
17
19
20
14
15
11
12
OUT1
XPOR
LX1
OUT2
LX2
VOUT1
L1
2.2 μH
L2
2.2 μH
4.7 μF
C1
4.7 μF
C2
APLI2
VOUT2
24
21
18
10
13
APLI1
VOUT1 = 2.97 × VREFIN1
(VREF = 1.30 V)
× VREFVREFIN1 = R2
R1 + R2
× 1.30 V = 2.5 VVOUT1 = 2.97 × 300 kΩ
163 kΩ + 300 kΩ
× 1.30 V = 1.8 VVOUT2 = 2.97 ×300 kΩ
343 kΩ + 300 kΩ
VDET
L = PFM/PWM
OPEN = PWM
MB39C007
DS04-27246-2E 37
• APPLICATION CIRCUIT EXAMPLE COMPONENTS LIST
TDK : TDK Corporation
FDK : FDK Corporation
KOA : KOA Corporation
Component Item Part Number Specification Package Vendor
L1 Inductor VLF4012AT-2R2M 2.2 μH, RDC = 76 mΩSMD TDK
MIPW3226D2R2M 2.2 μH, RDC = 100 mΩSMD FDK
L2 Inductor VLF4012AT-2R2M 2.2 μH, RDC = 76 mΩSMD TDK
MIPW3226D2R2M 2.2 μH, RDC = 100 mΩSMD FDK
C1 Ceramic capacitor C2012JB1A475K 4.7 μF (10 V) 2012 TDK
C2 Ceramic capacitor C2012JB1A475K 4.7 μF (10 V) 2012 TDK
C3 Ceramic capacitor C2012JB1A475K 4.7 μF (10 V) 2012 TDK
C4 Ceramic capacitor C2012JB1A475K 4.7 μF (10 V) 2012 TDK
C5 Ceramic capacitor C1608JB1E104K 0.1 μF (50 V) 2012 TDK
R1 Resistor RK73G1JTTD D 13 kΩ
RK73G1JTTD D 150 kΩ
13 kΩ
150 kΩ
1608
1608 KOA
KOA
R2 Resistor RK73G1JTTD D 300 kΩ300 kΩ1608 KOA
R5 Resistor RK73G1JTTD D 13 kΩ
RK73G1JTTD D 330 kΩ
13 kΩ
330 kΩ
1608
1608 KOA
KOA
R6 Resistor RK73G1JTTD D 300 kΩ300 kΩ1608 KOA
R7 Resistor RK73G1JTTD D 1 MΩ1 MΩ ± 0.5%1608 KOA
R8 Resistor RK73G1JTTD D 1 MΩ 1 MΩ ± 0.5%1608 KOA
MB39C007
38 DS04-27246-2E
■USAGE PRECAUTIONS
1. Do not configure the IC over the maximum ratings
If the lC is used over the maximum ratings, the LSl may be permanently damaged.
It is preferable for the device to normally operate within the recommended usage conditions. Usage outside of
these conditions adversely affect the reliability of the LSI.
2. Use the devices within recommended operating conditions
The recommended operating conditions are the conditions under which the LSl is guaranteed to operate.
The electrical ratings are guaranteed when the device is used within the recommended operating conditions
and under the conditions stated for each item.
3. Printed circuit board ground lines should be set up with consideration for common
impedance
4. Take appropriate static electricity measures
• Containers f or semiconductor materials should ha v e anti-static protection or be made of conductiv e material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
5. Do not apply negative voltages
The use of negative voltages below −0.3 V may create parasitic transistors on LSI lines, which can cause
abnormal operation.
■ORDERING INFORMATION
■RoHS COMPLIANCE INFORMATION OF LEAD (Pb) FREE VERSION
The LSI products of FUJITSU MICROELECTRONICS with “E1” are compliant with RoHS Directive, and has
observed the standard of lead, cadmium, mercury, he xav alent chromium, polybrominated biphenyls (PBB) , and
polybrominated diphenyl ethers (PBDE).
A product whose part number has trailing characters “E1” is RoHS compliant.
Part number Package Remarks
MB39C007QN 24-pin plastic QFN
(LCC-24P-M09)
MB39C007
DS04-27246-2E 39
■MARKING FORMAT (LEAD FREE VERSION)
XXXXX
X
INDEX
Lead-free version
MB39C007
40 DS04-27246-2E
■LABELING SAMPLE (LEAD FREE VERSION)
2006/03/01
ASSEMBLED IN JAPAN
G
QC PASS
(3N) 1MB123456P-789-GE1
1000
(3N)2 1561190005 107210
1,000
PCS
0605 - Z01A
1000
1/1
1561190005
MB123456P - 789 - GE1
MB123456P - 789 - GE1
MB123456P - 789 - GE1
Pb
Lead-free mark
JEITA logo JEDEC logo
The part number of a lead-free product has
the trailing characters “E1”. “ASSEMBLED IN CHINA” is printed on the label
of a product assembled in China.
MB39C007
DS04-27246-2E 41
■ RECOMMENDED MOUNTING CONDITIONS OF MB39C007QN
[FUJITSU MICROELECTRONICS Recommended Mounting Conditions]
[Parameters for Each Mounting Method]
IR (infrared reflow)
Item Condition
Mounting Method IR (infrared reflow), warm air reflow
Mounting times 2 times
Storage period Before opening Please use it within two years after
manufacture.
From opening to the 2nd
reflow
Storage conditions 5 °C to 30 °C, 70%RH or less (the lowest possible humidity)
260 °C
(e)
(d')
(d)
255 °C
170 °C
190 °C
RT (b)
(a)
(c)
to
Note : Temperature : the top of the package body
(a) Temperature Increase gradient : Average 1 °C/s to 4 °C/s
(b) Preliminary heating : Temperature 170 °C to 190 °C, 60s to 180s
(c) Temperature Increase gradient : Average 1 °C/s to 4 °C/s
(d) Actual heating : Temperature 260 °C Max; 255 °C or more, 10s or less
(d’) : Temperature 230 °C or more, 40s or less
or
Temperature 225 °C or more, 60s or less
or
Temperature 220 °C or more, 80s or less
(e) Cooling : Natural cooling or forced cooling
H rank : 260 °C Max
MB39C007
42 DS04-27246-2E
■EVALUATION BOARD SPECIFICATION
The MB39C007 Evaluation Board provides the proper for evaluating the efficiency and other characteristics of
the MB39C007.
• Terminal information
Symbol Functions
VIN
Power supply terminal
In standard condition 3.1 V to 5.5 V*
* : When the VIN/V OUT diff erence is to be held within 0.6 V or less, such as f or de vices
with a standard output v oltage (V OUT1 = 2.5 V) when VIN < 3.1 V, FUJITSU MICRO-
ELECTRONICS recommends changing the output capacity (C1, C2) to 10 μF.
VOUT1, VOUT2 Output terminals
(VOUT1: CH1, VOUT2: CH2)
VCTL Power supply terminal for setting the CTL1, CTL2 and CTLP terminals.
Use by connecting with VIN (When SW is mounted).
CTL1, CTL2 Direct supply terminal of CTL (CTL1 : for CH1, CTL2 : for CH2)
CTL1, CTL2 = 0 V to 0.8 V (Typ.) : Shutdown
CTL1, CTL2 = 0.95 V (Typ.) to VIN (5 V Max) : Normal operation
MODE1, MODE2 Direct supply terminal of MODE (CH1 : for MODE1, CH2 : for MODE2)
MODE1, MODE2 = 0 V to 0.4 V(Max) : PFM/PWM mode
MODE1, MODE2 = OPEN(Remove R1 and R4) : PWM mode
VREF Reference voltage output terminal
VREF = 1.30 V (Typ.)
VREFIN1, VREFIN2
External reference voltage input terminals
(VREFIN1 : for CH1, VREFIN2 : for CH2)
When an external reference voltage is supplied, connect it to the terminal for each chan-
nel.
VDET Voltage input terminal for voltage detection
CTLP Voltage detection circuit block control terminal
CTLP = L : Voltage detection circuit block stop
CTLP = H : Normal operation
XPOR Voltage detection circuit output terminal
The N-ch MOS open drain circuit is connected.
VXPOR Pull-up voltage terminal for the XPOR terminal
PGND
Ground terminal
Connect power supply GND to the PGND terminal next to the VIN terminal.
Connect output (load) GND to the PGND terminal between the VOUT1 terminal and the
VOUT2 terminal.
AGND Ground terminal
MB39C007
DS04-27246-2E 43
• Startup terminal information
• Jumper information
•Setup and checkup
(1) Setup
1. Connect the CTL1 terminal and the CTL2 terminal to the VIN terminal.
2. Put it into “L” state by connecting the CTLP terminal to the AGND pad.
3. Connect the power supply terminal to the VIN terminal, and the power supply GND terminal to the PGND
terminal. Make sure PGND is connected to the PGND terminal next to the VIN terminal.
(Example of setting power-supply voltage : 3.7 V)
(2) Checkup
Supply power to VIN. The IC is operating normally if V OUT1 = 2.5 V (Typ) and VOUT2 = 1.8 V (Typ).
Terminal name Condition Functions
CTL1 L : Open
H : Connect to VIN
ON/OFF switch for CH1
L : Shutdown
H : Normal operation.
CTL2 L : Open
H : Connect to VIN
ON/OFF switch for CH2
L : Shutdown
H : Normal operation.
CTLP L : Open
H : Connect to VIN
ON/OFF switch for the voltage detection block
L: Stops the voltage detection circuit
H: Normal operation.
JP Functions
JP1 Short-circuited in the layout pattern of the board (normally used shorted).
JP2 Short-circuited in the layout pattern of the board (normally used shorted).
JP3 Not mounted
JP6 Normally used shorted (0 Ω)
MB39C007
44 DS04-27246-2E
• Component layout on the evaluation board (Top View)
MB39C007EVB-06Rev. 2.0
MODE2
VREFIN2
XPOR
VXPOR
AGND CTL2 CTL1 CTLP
VCTL
VREF
VDET
VREFIN1
MODE1
VIN
VOUT1VOUT2
PGMD
JP3
C2
C4
C7
R5 C5
R4-2
R4-1
R8R10
R9
R3
SW1
CTL2
CTL1
CTLP
JP6
R1-1R1-2
R4
C1
L2 L1
M1
C3C6
R2
R1
R7
R6-2
R6-1
14
OFF
MB39C007
DS04-27246-2E 45
• Evaluation board layout (Top View)
Top Side (Layer1) Inside GND (Layer2)
Inside VIN & GND
(Layer3) Bottom Side (Layer4)
MB39C007
46 DS04-27246-2E
• Connection diagram
JP3
JP1
IIN
VIN
VOUT1
L1
2.2 μH
R7
300 kΩ
R6-1
13 kΩ
C1
4.7 μF
VCTL
CTL1
VREF
IOUT
MB39C007
MODE1
SW1
R8
1 MΩ
R6-2
150 kΩ
CTL1
MODE1
VREFIN1
OUT1
XPOR
LX1
XPOR
CTL2
SW1
R9
1 MΩ
CTL2
3
9
8
2
VREF VREF
6
VREF
VDET
R1-1
0 Ω R1-2
300 kΩ
R2
75 kΩ
VREFIN1
SW1
CTLP
R5
300 kΩ
VREF
VREFIN2
23
VREFIN2
VDET
7
CTLP
1
R10
1 MΩ
DVDD2 19
13
10
PGND
DGND2 17
C4
4.7 μF
AVDD 5
AGND 4
C5
0.1 μFAGND
JP6
JP2
VOUT2
L2
2.2 μH
C2
4.7 μF
IOUT
OUT2
LX2 18
21
R3
1MΩ
VXPOR
24
R1
0 Ω
MODE2 MODE2
22
R4
0 Ω
DGND2 16
DVDD2 20
DVDD1 11
15
C3
4.7 μF
DGND1 14
DVDD1 12
DGND1
C6
0.1 µF
R4-1
13 kΩ R4-2
330 kΩ C7
0.1 µF
* Not mounted
MB39C007
DS04-27246-2E 47
• Component list
Note : These components are recommended based on the operating tests authorized.
FML : FUJITSU MICROELECTRONICS LIMITED
TDK : TDK Corporation
KOA : KOA Corporation
SSM : SUSUMU Co., Ltd
Compo-
nent Part Name Model Number Specification Package Vendor Remark
M1 IC MB39C007QN ⎯QFN-24 FML
L1 Inductor VLF4012AT-2R2M 2.2 μH, RDC=76 mΩSMD TDK
L2 Inductor VLF4012AT-2R2M 2.2 μH, RDC=76 mΩSMD TDK
C1 Ceramic capacitor C2012JB1A475K 4.7 μF(10 V) 2012 TDK
C2 Ceramic capacitor C2012JB1A475K 4.7 μF(10 V) 2012 TDK
C3 Ceramic capacitor C2012JB1A475K 4.7 μF(10 V) 2012 TDK
C4 Ceramic capacitor C2012JB1A475K 4.7 μF(10 V) 2012 TDK
C5 Ceramic capacitor C1608JB1E104K 0.1 μF(50 V) 1608 TDK
C6 Ceramic capacitor C1608JB1H104K 0.1 μF(50 V) 1608 TDK
C7 Ceramic capacitor C1608JB1H104K 0.1 μF(50 V) 1608 TDK
R1 Resistor RK73Z1J 0 Ω, 1 A 1608 KOA
R1-1 Resistor RK73Z1J 0 Ω, 1 A 1608 KOA
R1-2 Resistor RR0816P-304-D 300 kΩ ± 0.5% 1608 SSM
R2 Resistor RR0816P-753-D 75 kΩ ± 0.5% 1608 SSM
R3 Resistor RK73G1JTTD D 1MΩ1 MΩ ± 0.5% 1608 KOA
R4 Resistor RK73Z1J 0 Ω, 1 A 1608 KOA
R4-1 Resistor RR0816P-133-D 13 kΩ ± 0.5% 1608 SSM
R4-2 Resistor RR0816P-334-D 330 kΩ ± 0.5% 1608 SSM
R5 Resistor RR0816P-304-D 300 kΩ ± 0.5% 1608 SSM
R6-1 Resistor RR0816P-133-D 13 kΩ ± 0.5% 1608 SSM
R6-2 Resistor RR0816P-154-D 150 kΩ ± 0.5% 1608 SSM
R7 Resistor RR0816P-304-D 300 kΩ ± 0.5% 1608 SSM
R8 Resistor RK73G1JTTD D 1MΩ1 MΩ ± 0.5% 1608 KOA
R9 Resistor RK73G1JTTD D 1MΩ1 MΩ ± 0.5% 1608 KOA
R10 Resistor RK73G1JTTD D 1MΩ1 MΩ ± 0.5% 1608 KOA
SW1 DIP switch ⎯⎯⎯⎯
Not
mounted
JP1 Jumper ⎯⎯⎯⎯
Pattern-
shorted
JP2 Jumper ⎯⎯⎯⎯
Pattern-
shorted
JP3 Jumper ⎯⎯⎯⎯
Not
mounted
JP6 Jumper RK73Z1J 0 Ω, 1A 1608 KOA
MB39C007
48 DS04-27246-2E
■EV BOARD ORDERING INFORMATION
EV Board Part No. EV Board Version No. Remarks
MB39C007EVB-06 MB39C007EVB-06 Rev.2.0 QFN-24
MB39C007
DS04-27246-2E 49
■PACKAGE DIMENSION
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
24-pin plastic QFN Lead pitch 0.50 mm
Sealing method Plastic mold
24-pin plastic QFN
(LCC-24P-M09)
(LCC-24P-M09)
C
2006-2008 FUJITSU MICROELECTRONICS LIMITED C24059S-c-2-3
INDEX AREA
(.157±.004)
4.00±0.10
4.00±0.10
(.157±.004)
2.70±0.10
(.106±.004)
2.70±0.10
(.106±.004)
3-R0.20
(3-R.008)
0.50(.020)
TYP
(.016±.004)
0.40±0.10
1PIN CORNER
(C0.25(C.010))
0.25±0.05
(.010±.002)
MAX
0.85(.033)
0.20(.008)
0.00(.000)
MIN
0.08(.003)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
MB39C007
50 DS04-27246-2E
■CONTENTS
page
-DESCRIPTION .................................................................................................................................................... 1
-FEATURES .......................................................................................................................................................... 1
-APPLICATIONS .................................................................................................................................................. 1
-PIN ASSIGNMENT ............................................................................................................................................. 2
-PIN DESCRIPTIONS .......................................................................................................................................... 3
-I/O PIN EQUIVALENT CIRCUIT DIAGRAM ................................................................................................... 4
-BLOCK DIAGRAM .............................................................................................................................................. 5
-FUNCTION OF EACH BLOCK ......................................................................................................................... 7
-ABSOLUTE MAXIMUM RATINGS ................................................................................................................... 9
-RECOMMENDED OPERATING CONDITIONS ............................................................................................ 10
-ELECTRICAL CHARACTERISTICS ................................................................................................................ 11
-TEST CIRCUIT FOR MEASURING TYPICAL OPERATING CHARACTERISTICS ................................ 13
-APPLICATION NOTES ...................................................................................................................................... 14
-EXAMPLE OF STANDARD OPERATION CHARACTERISTICS ............................................................... 22
-APPLICATION CIRCUIT EXAMPLES ............................................................................................................. 35
-USAGE PRECAUTIONS ................................................................................................................................... 38
-ORDERING INFORMATION ............................................................................................................................. 38
-RoHS COMPLIANCE INFORMATION OF LEAD (Pb) FREE VERSION .................................................. 38
-MARKING FORMAT (LEAD FREE VERSION) .............................................................................................. 39
-LABELING SAMPLE (LEAD FREE VERSION) ............................................................................................. 40
-RECOMMENDED MOUNTING CONDITIONS OF MB39C007QN ............................................................ 41
-EVALUATION BOARD SPECIFICATION ....................................................................................................... 42
-EV BOARD ORDERING INFORMATION ....................................................................................................... 48
-PACKAGE DIMENSION .................................................................................................................................... 49
MB39C007
DS04-27246-2E 51
MEMO
MB39C007
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome,
Shinjuku-ku, Tokyo 163-0722, Japan
Tel: +81-3-5322-3329
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
FUJITSU MICROELECTRONICS AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
Europe
FUJITSU MICROELECTRONICS EUROPE GmbH
Pittlerstrasse 47, 63225 Langen, Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
206 Kosmo Tower Building, 1002 Daechi-Dong,
Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fmk/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE. LTD.
151 Lorong Chuan,
#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://www.fmal.fujitsu.com/
FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.
Rm. 3102, Bund Center, No.222 Yan An Road (E),
Shanghai 200002, China
Tel : +86-21-6146-3688 Fax : +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fmc/en/
Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating
the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to
the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear
facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon
system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited: Sales Promotion Department