VND1NV04TR - STMicroelectronics, Inc.

April 2009 Doc ID 7381 Rev 2 1/33

VND1NV04

VNN1NV04 - VNS1NV04

OMNIFET II

fully autoprotected Power MOSFET

Features

■Linear current limitation

■Thermal shutdown

■Short circuit protection

■Integrated clamp

■Low current drawn from input pin

■Diagnostic feedback through input pin

■ESD protection

■Direct access to the gate of the Power

MOSFET (analog driving)

■Compatible with standard Power MOSFET

Description

The VND1NV04, VNN1NV04, VNS1NV04 are

monolithic devices designed in

STMicroelectronics VIPower M0-3 Technology,

intended for replacement of standard Power

MOSFETs from DC up to 50 KHz applications.

Built in thermal shutdown, linear current limitation

and overvoltage clamp protect the chip in harsh

environments.

Fault feedback can be detected by monitoring the

voltage at the input pin.

Parameter Symbol Value

Max on-state resistance (per ch.) RON 250 mΩ

Current limitation (typ) ILIMH 1.7 A

Drain-source clamp voltage VCLAMP 40 V

TO-252 (DPAK)

SOT-223

SO-8

Table 1. Device summary

Package

Order codes

Tube Tube (lead free) Tape and reel Tape and reel (lead free)

TO-252 (DPAK) VND1NV04 VND1NV04-E VND1NV04TR VND1NV04TR-E

SOT-223 VNN1NV04 - VNN1NV04TR -

SO-8 VNS1NV04 - VNS1NV04TR -

www.st.com

         
Contents VND1NV04 - VNN1NV04 - VNS1NV04
2/33  Doc ID 7381 Rev 2
Contents
Block diagram and pin description  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1 Absolute maximum ratings  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  6
2 Thermal data   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
4 Electrical characteristics curves  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  12
Protection features  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
1 Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  16
2 Linear current limiter circuit   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  16
3 Over temperature and short circuit protection  . . . . . . . . . . . . . . . . . . . . .  16
4 Status feedback  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  16
Package and PCB thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1 DPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  17
2 SOT-223 thermal data   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  19
3 SO-8 thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  22
Package and packing information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1 DPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  25
2 SOT-223 mechanical data   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  27
3 SO8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  27
4 DPAK packing information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  29
5 SOT-223 packing information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  30
6 SO8 packing information   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  31
Revision history   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

VND1NV04 - VNN1NV04 - VNS1NV04 List of tables
Doc ID 7381 Rev 2 3/33
         
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. DPAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 6. SOT-223 thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 7. SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 8. DPAK mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 9. SO-8 mechanical data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 10. Document revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

         
List of figures VND1NV04 - VNN1NV04 - VNS1NV04
4/33  Doc ID 7381 Rev 2
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Switching time test circuit for resistive load  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 8. Unclamped inductive waveforms  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 9. Source-drain diode forward characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11. Derating curve  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 12. Static drain-source on resistance vs. input voltage (part 1/2). . . . . . . . . . . . . . . . . . . . . . . 12
Figure 13. Static drain-source on resistance vs. input voltage (part 2/2). . . . . . . . . . . . . . . . . . . . . . . 12
Figure 14. Transconductance  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 15. Static drain-source on resistance vs. Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 16. Transfer characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 17. Turn-on current slope (part 1/2)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 18. Turn-on current slope (part 2/2)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 19. Input voltage vs. input charge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 20. Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 21. Turn-off drain-source voltage slope (part 2/2)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 23. Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 24. Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 25. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 26. Normalized on resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 27. Normalized input threshold voltage vs. temperature  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 28. Normalized current limit vs. junction temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 29. Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 30. DPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 31. DPAK Rthj-amb vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . 17
Figure 32. DPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 33. DPAK thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 34. SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 35. SOT-223 Rthj-amb vs. PCB copper area in open box free air condition  . . . . . . . . . . . . . . 20
Figure 36. SOT-223 thermal impedance junction ambient single pulse  . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 37. SOT-223 thermal fitting model of a single channel   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 38. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 39. SO-8 Rthj-amb vs. PCB copper area in open box free air condition  . . . . . . . . . . . . . . . . . 22
Figure 40. SO-8 thermal impedance junction ambient single pulse  . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 41. SO-8 thermal fitting model of a single channel   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 42. DPAK package dimensions  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 43. SOT-223 mechanical data & package outline  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 44. SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 45. SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 46. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 47. SO-8 tape and reel shipment (suffix “TR”)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

VND1NV04 - VNN1NV04 - VNS1NV04 Block diagram and pin description

Doc ID 7381 Rev 2 5/33

1 Block diagram and pin description

Figure 1. Block diagram

Figure 2. Configuration diagram (top view) (a)

a. For the pins configuration related to SOT-223 and DPAK see outline at page 1.

Overvoltage

Gate

Linear

DRAIN

SOURCE

Clamp

Current

Limiter

Control

Over

Temperature

INPUT

DRAIN

INPUT

SOURCE

Electrical specifications VND1NV04 - VNN1NV04 - VNS1NV04

6/33 Doc ID 7381 Rev 2

2 Electrical specifications

Figure 3. Current and voltage conventions

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may

cause permanent damage to the device. These are stress ratings only and operation of the

device at these or any other conditions above those indicated in the operating sections of

this specification is not implied. Exposure to Absolute maximum rating conditions for

extended periods may affect device reliability. Refer also to the STMicroelectronics SURE

program and other relevant quality document.

DRAIN

INPUT

SOURCE

Table 2. Absolute maximum ratings

Symbol Parameter

Value

Unit

SOT-223 SO-8 DPAK

VDSn Drain-source voltage (VINn=0 V) Internally clamped V

VINn Input voltage Internally clamped V

IINn Input current +/-20 mA

RIN MINn Minimum input series impedance 330 Ω

IDn Drain current Internally limited A

IRn Reverse DC output current -3 A

VESD1 Electrostatic discharge (R=1.5 KΩ, C=100 pF) 4000 V

VESD2

Electrostatic discharge on output pins only

(R=330 Ω, C=150 pF) 16500 V

Ptot Total dissipation at Tc=25 °C 7 8.3 35 W

TjOperating junction temperature Internally limited °C

TcCase operating temperature Internally limited °C

Tstg Storage temperature -55 to 150 °C

VND1NV04 - VNN1NV04 - VNS1NV04 Electrical specifications

Doc ID 7381 Rev 2 7/33

2.2 Thermal data

2.3 Electrical characteristics

Table 3. Thermal data

Symbol Parameter

Max value

Unit

SOT-223 SO-8 DPAK

Rthj-case Thermal resistance junction-case 18 3.5 °C/W

Rthj-lead Thermal resistance junction-lead 15 °C/W

Rthj-amb Thermal resistance junction-ambient 70(1)

1. When mounted on a standard single-sided FR4 board with 50 mm2 of Cu (at least 35 μm thick) connected

to all DRAIN pins

65(1) 54(1) °C/W

Table 4. Electrical characteristics

Symbol Parameter Test conditions Min Typ Max Unit

Off (-40 °C<Tj<150 °C, unless otherwise specified)

VCLAMP

Drain-source clamp

voltage VIN=0 V; ID=0.5 A 40 45 55 V

VCLTH

Drain-source clamp

threshold voltage VIN=0 V; ID=2 mA 36 V

VINTH

Input threshold

voltage VDS=VIN; ID=1 mA 0.5 2.5 V

IISS

Supply current from

input pin VDS=0 V; VIN=5 V 100 150 µA

VINCL

Input-source clamp

voltage

IIN=1 mA

IIN=-1 mA

-1.0

6.8 8

-0.3 V

IDSS

Zero input voltage

drain current

(VIN=0 V)

VDS=13 V; VIN=0 V; Tj=25 °C

VDS=25 V; VIN=0 V

75 µA

On (-40 °C<Tj<150 °C, unless otherwise specified)

RDS(on)

Static drain-source on

resistance

VIN=5 V; ID=0.5 A; Tj=25 °C

VIN=5 V; ID=0.5 A

250

500 mΩ

Dynamic (Tj=25 °C, unless otherwise specified)

gfs (1) Forward

transconductance VDD=13 V; ID=0.5 A 2 S

COSS Output capacitance VDS=13 V; f=1 MHz; VIN=0 V 90 pF

Switching (Tj=25 °C, unless otherwise specified)

Electrical specifications VND1NV04 - VNN1NV04 - VNS1NV04

8/33 Doc ID 7381 Rev 2

td(on) Turn-on delay time

VDD=15 V; ID=0.5 A

Vgen=5 V; Rgen=RIN MIN=330 Ω

(see Figure 4)

70 200 ns

trRise time 170 500 ns

td(off) Turn-off delay time 350 1000 ns

tfFall time 200 600 ns

td(on) Turn-on delay time

VDD=15 V; ID=0.5 A

Vgen=5 V; Rgen=2.2 KΩ

(see Figure 4)

0.25 1.0 µs

trRise time 1.3 4.0 µs

td(off) Turn-off delay time 1.8 5.5 µs

tfFall time 1.2 4.0 µs

(dI/dt)on Turn-on current slope VDD=15 V; ID=1.5 A

Vgen=5 V; Rgen=RIN MIN=330 Ω5A/µs

QiTotal input charge VDD=12 V; ID=0.5 A; VIN=5 V

Igen=2.13 mA (see Figure 7)5nC

Source drain diode (Tj=25 °C, unless otherwise specified)

VSD(1) Forward on voltage ISD=0.5 A; VIN=0 V 0.8 V

trr

Reverse recovery

time

ISD=0.5 A; dI/dt=6 A/µs

VDD=30V; L=200µH

(see Figure 5)

205 ns

Qrr Reverse recovery

charge 100 nC

IRRM Reverse recovery

current 0.7 A

Protections (-40 °C<Tj<150 °C, unless otherwise specified)

Ilim Drain current limit VIN=5 V; VDS=13 V 1.7 3.5 A

tdlim Step response

current limit VIN=5 V; VDS=13 V 2.0 µs

Tjsh Over temperature

shutdown 150 175 200 °C

Tjrs Over temperature

reset 135 °C

Igf Fault sink current VIN=5 V; VDS=13 V; Tj=Tjsh 10 15 20 mA

Eas Single pulse

avalanche energy

Starting Tj=25 °C; VDD=24 V

VIN=5 V Rgen=RIN MIN=330 Ω;

L=50 mH

(see Figure 6 and Figure 8)

55 mJ

1. Pulsed: pulse duration = 300 µs, duty cycle 1.5 %

Table 4. Electrical characteristics (continued)

Symbol Parameter Test conditions Min Typ Max Unit

VND1NV04 - VNN1NV04 - VNS1NV04 Electrical specifications

Doc ID 7381 Rev 2 9/33

Figure 4.

Switching time test circuit for resistive load

90%

10%

gen

d(on)

d(off)

gen

Electrical specifications VND1NV04 - VNN1NV04 - VNS1NV04

10/33 Doc ID 7381 Rev 2

Figure 5.

Test circuit for diode recovery times

Figure 6. Unclamped inductive load test circuits

L=100uH

8.5

gen

FAST

DIODE

OMNIFET

330

OMNIFET

gen

GEN

VND1NV04 - VNN1NV04 - VNS1NV04 Electrical specifications

Doc ID 7381 Rev 2 11/33

Figure 7. Input charge test circuit

Figure 8. Unclamped inductive waveforms

GEN

ND8003

VIN

Electrical specifications VND1NV04 - VNN1NV04 - VNS1NV04

12/33 Doc ID 7381 Rev 2

2.4 Electrical characteristics curves

Figure 9. Source-drain diode forward

characteristics

Figure 10. Static drain-source on resistance

Figure 11. Derating curve Figure 12. Static drain-source on resistance

vs. input voltage (part 1/2)

Figure 13. Static drain-source on resistance

vs. input voltage (part 2/2)

Figure 14. Transconductance

0 2 4 6 8 101214

Id (A)

700

750

800

850

900

950

1000

Vsd (mV)

Vin=0V

0 0.05 0.1 0.15 0.2 0.25 0.3

Id(A)

0.5

1.5

2.5

3.5

4.5

Rds(on) (ohms)

Tj=25ºC

Tj=150ºC

Tj=-40ºC

Vin=2.5V

33.544.555.566.5 7

Vin(V)

100

150

200

250

300

350

400

450

500

Rds(on) (mohms)

Id=0.5A

Tj=150ºC

Tj=-40ºC

Tj=25ºC

3 3.5 4 4.5 5 5.5 6 6.5

Vin(V)

100

150

200

250

300

350

400

450

500

Rds(on) (mohms)

Id=1.5A

Id=1A

Id=1.5A

Id=1A

Id=1.5A

Id=1A

Tj=25ºC

Tj=150ºC

Tj=-40ºC

0 0.25 0.5 0.75 1 1.25 1.5 1.75 2

Id(A)

0.5

1.5

2.5

3.5

4.5

5.5

Gfs (S)

Vds=13V

Tj=25ºC

Tj=150ºC

Tj=-40ºC

VND1NV04 - VNN1NV04 - VNS1NV04 Electrical specifications

Doc ID 7381 Rev 2 13/33

Figure 15. Static drain-source on resistance

vs. Id

Figure 16. Transfer characteristics

Figure 17. Turn-on current slope (part 1/2) Figure 18. Turn-on current slope (part 2/2)

Figure 19. Input voltage vs. input charge Figure 20. Turn-off drain source voltage slope

(part 1/2)

0 0.25 0.5 0.75 1 1.25 1.5 1.75 2

Id(A)

100

150

200

250

300

350

400

450

500

Rds(on) (mohms)

Tj=25ºC

Tj=150ºC

Tj=-40ºC

Vin=5V

Vin=3.5V

Vin=5V

Vin=3.5V

1.5

1.75

2.25

2.5

2.75

3.25

3.5

3.75

4.25

4.5

4.75

Vin(V)

0.25

0.5

0.75

1.25

1.5

1.75

2.25

Idon(A)

Vds=13.5V

Tj=150ºC

Tj=25ºC

Tj=-40ºC

0 500 1000 1500 2000 2500

Rg(ohm)

di/dt(A/us)

Vin=5V

Vdd=15V

Id=1.5A

0 500 1000 1500 2000 2500

Rg(ohm)

0.2

0.4

0.6

0.8

1.2

1.4

di/dt(A/us)

Vin=3.5V

Vdd=15V

Id=1.5A

0 123456

Qg (nC)

Vin (V)

Vds=12V

Id=0.5A

0 500 1000 1500 2000 2500

Rg(ohm)

100

150

200

250

300

350

dv/dt(V/us)

Vin=5V

Vdd=15V

Id=0.5A

Electrical specifications VND1NV04 - VNN1NV04 - VNS1NV04

14/33 Doc ID 7381 Rev 2

Figure 21. Turn-off drain-source voltage slope

(part 2/2)

Figure 22. Capacitance variations

Figure 23. Switching time resistive load

(part 1/2)

Figure 24. Switching time resistive load

(part 2/2)

Figure 25. Output characteristics Figure 26. Normalized on resistance vs.

temperature

0 500 1000 1500 2000 2500

Rg(ohm)

100

150

200

250

300

350

dv/dt(V/us)

Vin=3.5V

Vdd=15V

Id=0.5A

0 5 10 15 20 25 30 35

Vds(V)

100

125

150

175

200

225

C(pF)

f=1MHz

Vin=0V

0250 500 750 1000 1250 1500 1750 2000 2250 2500

Rg(ohm)

0.25

0.5

0.75

1.25

1.5

1.75

t(us)

Vdd=15V

Id=0.5A

Vin=5V

td(off)

td(on)

3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25

Vin(V)

100

150

200

250

300

350

400

450

500

550

t(ns)

Vdd=15V

Id=0.5A

Rg=330ohm

td(off)

td(on)

0123456789101112

VDS(V)

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

2.2

2.4

ID(A)

Vin=3V

Vin=5.5V

Vin=3.5V

Vin=4.5V

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

0.5

0.75

1.25

1.5

1.75

2.25

Rds(on) (mOhm)

Vin=5V

Id=0.5A

VND1NV04 - VNN1NV04 - VNS1NV04 Electrical specifications

Doc ID 7381 Rev 2 15/33

Figure 27. Normalized input threshold voltage

vs. temperature

Figure 28. Normalized current limit vs.

junction temperature

Figure 29. Step response current limit

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

Vinth (V)

Vds=Vin

Id=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc (º C )

0.5

1.5

2.5

3.5

4.5

Ilim (A)

Vin=5V

Vds=13V

5 101520253035

Vdd(V)

1.9

2.1

2.2

2.3

2.4

Tdlim(us)

Vin=5V

Rg=330ohm

Protection features VND1NV04 - VNN1NV04 - VNS1NV04

16/33 Doc ID 7381 Rev 2

3 Protection features

During normal operation, the input pin is electrically connected to the gate of the internal

Power MOSFET through a low impedance path.

The device then behaves like a standard Power MOSFET and can be used as a switch from

DC up to 50 KHz. The only difference from the user’s standpoint is that a small DC current

IISS (typ. 100 µA) flows into the input pin in order to supply the internal circuitry.

The device integrates:

3.1 Overvoltage clamp protection

Internally set at 45 V, along with the rugged avalanche characteristics of the Power

MOSFET stage give this device unrivalled ruggedness and energy handling capability. This

feature is mainly important when driving inductive loads.

3.2 Linear current limiter circuit

Limits the drain current ID to Ilim whatever the input pin voltages. When the current limiter is

active, the device operates in the linear region, so power dissipation may exceed the

capability of the heatsink. Both case and junction temperatures increase, and if this phase

lasts long enough, junction temperature may reach the over temperature threshold Tjsh.

3.3 Over temperature and short circuit protection

These are based on sensing the chip temperature and are not dependent on the input

voltage. The location of the sensing element on the chip in the power stage area ensures

fast, accurate detection of the junction temperature. Over temperature cutout occurs in the

range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted

when the chip temperature falls of about 15 °C below shutdown temperature.

3.4 Status feedback

In the case of an over temperature fault condition (Tj > Tjsh), the device tries to sink a

diagnostic current Igf through the input pin in order to indicate fault condition. If driven from a

low impedance source, this current may be used in order to warn the control circuit of a

device shutdown. If the drive impedance is high enough so that the input pin driver is not

able to supply the current Igf, the input pin will fall to 0 V. This will not however affect the

device operation: no requirement is put on the current capability of the input pin driver

except to be able to supply the normal operation drive current IISS.

Additional features of this device are ESD protection according to the Human Body model

and the ability to be driven from a TTL logic circuit.

VND1NV04 - VNN1NV04 - VNS1NV04 Package and PCB thermal data

Doc ID 7381 Rev 2 17/33

4 Package and PCB thermal data

4.1 DPAK thermal data

Figure 30. DPAK PC board

1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,

Cu thickness=35 µm , Copper areas: from minimum pad layout to 16 cm2).

Figure 31. DPAK Rthj-amb vs. PCB copper area in open box free air condition

0246810

PCB Cu heatsink area (cm^ 2) - (refer to PCB layout)

footprint

Package and PCB thermal data VND1NV04 - VNN1NV04 - VNS1NV04

18/33 Doc ID 7381 Rev 2

Figure 32. DPAK thermal impedance junction ambient single pulse

Equation 1: pulse calculation formula

where δ = tP/T

Figure 33. DPAK thermal fitting model of a single channel

0,1

100

0,0001 0,001 0,01 0,1 1 10 100 1000

Time ( s)

ZTH (°C/ W)

Footprint

6 cm

ZTHδRTH δZTHtp 1δ–()+⋅=

VND1NV04 - VNN1NV04 - VNS1NV04 Package and PCB thermal data

Doc ID 7381 Rev 2 19/33

Table 5. DPAK thermal parameter

4.2 SOT-223 thermal data

Figure 34. SOT-223 PC board

1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,

Cu thickness=35 µm , Copper areas: from minimum pad layout to 0.8 cm2).

Area/island (cm2)0.256

R1 (°C/W) 0.8

R2 (°C/W) 1.6

R3 (°C/W) 0.8

R4 (°C/W) 2

R5 (°C/W) 15

R6 (°C/W) 61 24

C1 (W·s/°C) 0.00006

C2 (W·s/°C) 0.0005

C3 (W·s/°C) 0.01

C4 (W·s/°C) 0.3

C5 (W·s/°C) 0.45

C6 (W·s/°C) 0.8 5

Package and PCB thermal data VND1NV04 - VNN1NV04 - VNS1NV04

20/33 Doc ID 7381 Rev 2

Figure 35. SOT-223 Rthj-amb vs. PCB copper area in open box free air condition

Figure 36. SOT-223 thermal impedance junction ambient single pulse

100

110

120

130

140

0 0,5 1 1,5 2 2,5

PCB Cu heatsink area (cm^ 2) - (refer to PCB layout)

footprint

0,1

100

1000

0,0001 0,001 0,01 0,1 1 10 100 1000

Time ( s)

ZTH (°C/ W)

Footprint

2 cm

VND1NV04 - VNN1NV04 - VNS1NV04 Package and PCB thermal data

Doc ID 7381 Rev 2 21/33

Equation 2: pulse calculation formula

where δ = tP/T

Figure 37. SOT-223 thermal fitting model of a single channel

Table 6. SOT-223 thermal parameter

Area/island (cm2)FP2

R1 (°C/W) 0.8

R2 (°C/W) 1.6

R3 (°C/W) 4.5

R4 (°C/W) 24

R5 (°C/W) 0.1

R6 (°C/W) 100 45

C1 (W·s/°C) 0.00006

C2 (W·s/°C) 0.0005

C3 (W·s/°C) 0.03

C4 (W·s/°C) 0.16

C5 (W·s/°C) 1000

C6 (W·s/°C) 0.5 2

ZTHδRTH δZTHtp 1δ–()+⋅=

Package and PCB thermal data VND1NV04 - VNN1NV04 - VNS1NV04

22/33 Doc ID 7381 Rev 2

4.3 SO-8 thermal data

Figure 38. SO-8 PC board

1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,

Cu thickness=35 µm , Copper areas: from minimum pad layout to 2 cm2).

Figure 39. SO-8 Rthj-amb vs. PCB copper area in open box free air condition

105

00,511,522,5

PCB Cu heatsink area (cm^ 2) - (refer to PCB layout)

footprint

VND1NV04 - VNN1NV04 - VNS1NV04 Package and PCB thermal data

Doc ID 7381 Rev 2 23/33

Figure 40. SO-8 thermal impedance junction ambient single pulse

Equation 3: pulse calculation formula

where δ = tP/T

Figure 41. SO-8 thermal fitting model of a single channel

ZTH (°C/ W)

0,1

100

1000

0,0001 0,001 0,01 0,1 1 10 100 1000

Time (s)

Footprint

2 cm

ZTHδRTH δZTHtp 1δ–()+⋅=

Package and PCB thermal data VND1NV04 - VNN1NV04 - VNS1NV04

24/33 Doc ID 7381 Rev 2

Table 7. SO-8 thermal parameter

Area/island (cm2)FP2

R1 (°C/W) 0.8

R2 (°C/W) 2.6

R3 (°C/W) 3.5

R4 (°C/W) 21

R5 (°C/W) 16

R6 (°C/W) 58 28

C1 (W·s/°C) 0.00006

C2 (W·s/°C) 0.0005

C3 (W·s/°C) 0.0075

C4 (W·s/°C) 0.045

C5 (W·s/°C) 0.35

C6 (W·s/°C) 1.05 2

VND1NV04 - VNN1NV04 - VNS1NV04 Package and packing information

Doc ID 7381 Rev 2 25/33

5 Package and packing information

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK® is an ST trademark.

5.1 DPAK mechanical data

Figure 42. DPAK package dimensions

P032P

Package and packing information VND1NV04 - VNN1NV04 - VNS1NV04

26/33 Doc ID 7381 Rev 2

Table 8. DPAK mechanical data

Dim.

mm.

Min. Typ. Max.

A 2.20 2.40

A1 0.90 1.10

A2 0.03 0.23

B 0.64 0.90

B2 5.20 5.40

C 0.45 0.60

C2 0.48 0.60

D 6.00 6.20

D1 5.1

E 6.40 6.60

E1 4.7

e2.28

G 4.40 4.60

H 9.35 10.10

L2 0.8

L4 0.60 1.00

R0.2

V2 0° 8°

Package weight Gr. 0.29

VND1NV04 - VNN1NV04 - VNS1NV04 Package and packing information

Doc ID 7381 Rev 2 27/33

5.2 SOT-223 mechanical data

Figure 43. SOT-223 mechanical data & package outline

5.3 SO8 mechanical data

Table 9. SO-8 mechanical data

Dim.

Min. Typ. Max.

A 1.75

A1 0.10 0.25

A2 1.25

Package and packing information VND1NV04 - VNN1NV04 - VNS1NV04

28/33 Doc ID 7381 Rev 2

Figure 44. SO-8 package dimension

b 0.28 0.48

c 0.17 0.23

D(1) 4.80 4.90 5.00

E 5.80 6.00 6.20

E1(2) 3.80 3.90 4.00

e 1.27

h 0.25 0.50

L 0.40 1.27

L1 1.04

k 0° 8°

ccc 0.10

1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs

shall not exceed 0.15 mm in total (both side).

2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not

exceed 0.25 mm per side.

Table 9. SO-8 mechanical data (continued)

Dim.

Min. Typ. Max.

0016023 D

VND1NV04 - VNN1NV04 - VNS1NV04 Package and packing information

Doc ID 7381 Rev 2 29/33

5.4 DPAK packing information

The devices can be packed in tube or tape and reel shipments (see the Device summary on

page 1 ).

DPAK FOOTPRINT TUBE SHIPMENT (no suffix)

All dimensions are in mm.

Base Q.ty 75

Bulk Q.ty 3000

Tube length (± 0.5) 532

B21.3

C (± 0.1) 0.6

TAPE AND REEL SHIPMENT (suffix “13TR”)

REEL DIMENSIONS

Base Q.ty 2500

Bulk Q.ty 2500

A (max) 330

B (min) 1.5

C (± 0.2) 13

F20.2

G (+ 2 / -0) 16.4

N (min) 60

T (max) 22.4

TAPE DIMENSIONS

According to Electronic Industries Association

(EIA) Standard 481 rev. A, Feb 1986

All dimensions are in mm.

Tape width W 16

Tape Hole Spacing P0 (± 0.1) 4

Component Spacing P 8

Hole Diameter D (± 0.1/-0) 1.5

Hole Diameter D1 (min) 1.5

Hole Position F (± 0.05) 7.5

Compartment Depth K (max) 6.5

Hole Spacing P1 (± 0.1) 2

Top

cover

tape

End

Start

No componentsNo components Components

500mm min

Empty components pockets

saled with cover tape.

User direction of feed

Package and packing information VND1NV04 - VNN1NV04 - VNS1NV04

30/33 Doc ID 7381 Rev 2

5.5 SOT-223 packing information

Figure 45. SOT-223 tape and reel shipment (suffix “TR”)

Reel dimensions

Base Q.ty 1000

Bulk Q.ty 1000

A (max) 330

B (min) 1.5

C (± 0.2) 13

F20.2

G (+ 2 / -0) 12.4

N (min) 60

T (max) 18.4

Tape dimensions

According to Electronic Industries Association

(EIA) Standard 481 rev. A, Feb. 1986

All dimensions are in mm.

Tape width W 12

Tape Hole Spacing P0 (± 0.1) 4

Component Spacing P 8

Hole Diameter D (+ 0.1/-0) 1.5

Hole Diameter D1 (min) 1.5

Hole Position F (± 0.05) 5.5

Compartment Depth K (max) 4.5

Hole Spacing P1 (± 0.1) 2

Top

cover

tape

End

Start

No componentsNo components Components

500mm min

Empty components pockets

saled with cover tape.

User direction of feed

VND1NV04 - VNN1NV04 - VNS1NV04 Package and packing information

Doc ID 7381 Rev 2 31/33

5.6 SO8 packing information

Figure 46. SO-8 tube shipment (no suffix)

Figure 47. SO-8 tape and reel shipment (suffix “TR”)

All dimensions are in mm.

Base Q.ty 100

Bulk Q.ty 2000

Tube length (± 0.5) 532

A3.2

C (± 0.1) 0.6

TAPE DIMENSIONS

According to Electronic Industries Association

(EIA) Standard 481 rev. A, Feb. 1986

All dimensions are in mm.

Tape width W 12

Tape Hole Spacing P0 (± 0.1) 4

Component Spacing P 8

Hole Diameter D (+ 0.1/-0) 1.5

Hole Diameter D1 (min) 1.5

Hole Position F (± 0.05) 5.5

Compartment Depth K (max) 4.5

Hole Spacing P1 (± 0.1) 2

Top

cover

tape

End

Start

No componentsNo components Components

500mm min

Empty components pockets

saled with cover tape.

User direction of feed

REEL DIMENSIONS

All dimensions are in mm.

Base Q.ty 2500

Bulk Q.ty 2500

A (max) 330

B (min) 1.5

C (± 0.2) 13

F20.2

G (+ 2 / -0) 12.4

N (min) 60

T (max) 18.4

Revision history VND1NV04 - VNN1NV04 - VNS1NV04

32/33 Doc ID 7381 Rev 2

6 Revision history

Table 10. Document revision history

Date Revision Changes

Feb-2003 1 Initial release.

16-Apr-2009 2

Added Table 1: Device summary on page 1 and Section 4: Package

and PCB thermal data

Updated Section 5: Package and packing information on page 25

VND1NV04 - VNN1NV04 - VNS1NV04

Doc ID 7381 Rev 2 33/33

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