TEA1552T/N1,518 - NXP SEMICONDUCTORS

1. General description

The GreenChipII is the second generation of green Switched Mode Power

Supply (SMPS) control ICs operating directly from the rectified universal mains. A high

level of integration leads to a cost effective po wer supply with a very low number of

external components.

The special built-in green functions allow the efficiency to be optimum at all power levels.

This holds for quasi-resonant operation at high power levels, as well as fixed frequency

operation with valley switching at medium power levels. At low power (standby) levels, the

system operates at reduced frequency and with valley detection.

The proprietary high voltage BCD800 process makes direct start-up possible from the

rectified mains volt age in an ef fective and green way. A second low volta ge BICMOS IC is

used for accurate, high speed protection functions and control.

Highly efficient, reliable supplies can easily be designed using the GreenChipII control IC.

2. Features and benefits

Distinctive features:

Universal mains supply operation (70 VAC to 276 VAC)

High level of integration, giving a very low external component count.

Green features:

Valley or zero voltage switching for minimum switching losses

Efficient quasi-resonant operation at high power levels

Frequency reduction at low power standby for improved system efficiency (<3 W)

Cycle skipping mode at very low loads. Pi< 300 mW at no-load operation for a

typical adapter application

On-chip start-up current source

Standby indication pin to indicate low output power consumption.

Protection features:

Safe restart mode for system fault conditions

Continuous mode protection by means of demagnetization detection (zero

switch-on current)

Accurate and adjustable overvoltage protection (latched)

Short winding protection

Undervoltage protection (foldback during overload)

Overtemperature protection (latched)

TEA1552

HV start-up flyback controller for DCM or QR mode; 125 kHz

fosc(h); standby output signal

Rev. 3.1 — 21 June 2012 Product data sheet

Product data sheet Rev. 3.1 — 21 June 2012 2 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

Low and adjustable overcurrent protection trip level

Soft (re)start

Mains voltage-dependent operation-enabling level

General purpose input for lock protection.

3. Applications

3.1 Typical application

Typical application areas are adapters and chargers (e.g. for laptops, camcorders and

printers) and all applications that demand an efficient and cost-effective solution up to

250 W.

4. Ordering information

Table 1. Ordering information

Type number Package

Name Description Version

TEA1552T SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx

xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx

xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx

xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x

Product data sheet Rev. 3.1 — 21 June 2012 3 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

5. Block diagram

Fig 1. Block diagram

SUPPLY

MANAGEMENT

internal

supply

UVLO start

M-level

VCC 8

300 Ω

GND

STDBY

CTRL

FREQUENCY

CONTROL

VOLTAGE

CONTROLLED

OSCILLATOR

LOGIC

OVER-

VOLTAGE

PROTECTION

OVER-POWER

PROTECTION

short

winding

soft

start

OVER-

TEMPERATURE

PROTECTION

UVLO Q

MAXIMUM

ON-TIME

PROTECTION

POWER-ON

RESET

-1

VALLEY

TEA1552

100 mV

clamp

DRIVER

START-UP

CURRENT SOURCE

LOCK

VCOadj

0.88 V

0.5 V

5.6 V

Isense

VCC(5V)

4DRIVER

mbl499

14 DEM

7DRAIN

5, 6 HVS

OCP

LEB

blank

Iss

lock

detect

2.5 V

VCC < 4.5 V Q

5 V/1 mA

(max)

Product data sheet Rev. 3.1 — 21 June 2012 4 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

6. Pinning information

6.1 Pinning

6.2 Pin description

7. Functional description

The TEA1552 is the controller of a compact flyback converter, with the IC situated at the

primary side. An auxiliary winding of the transformer provides demagnetization detection

and powers the IC after start-up.

The TEA1552 operates in multi modes (see Figure 3).

Fig 2. Pin configuration

TEA1552T

VCOadj DEM

Isense CTRL

STDBY LOCK

DRIVER VCC(5V)

HVS GND

HVS n.c.

DRAIN VCC

mbl497

7 8

Table 2. Pin description

Symbol Pin Description

VCOadj 1 VCO adjustment input

Isense 2 programmable current sense input

STDBY 3 standby indication or control output

DRIVER 4 gate driver output

HVS 5 high voltage safety spacer, not connected

HVS 6 high voltage safety spacer, not connected

DRAIN 7 drain of external MOS switch, input for start-up current and valley

sensing

VCC 8 supply voltage

n.c. 9 not connected

GND 10 ground

VCC(5V) 11 5 V output

LOCK 12 lock input

CTRL 13 control input

DEM 14 input from auxiliary winding for demagnetization timing, OVP and OPP

Product data sheet Rev. 3.1 — 21 June 2012 5 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

The next converter stroke is started only after demagnetization of the transformer current

(zero current switching), while the drain volt age has reached the lowest volt age to prevent

switching losses (green function). The primary resonant circuit of primary inductance and

drain capacitor ensures this quasi-resonant operation. The design can be optimized in

such a way that zero voltage switching can be reached over almost the complete

universal mains range.

To prevent very high frequency operation at lower loads, the quasi-resonant operation

changes smoothly in fixed frequency PWM control.

At very low power (standby) levels, the frequency is controlled down, via the VCO, to a

minimum frequency of approximately 25 kHz.

7.1 Start-up, mains enabling operation level and undervoltage lock-out

(see Figure 11 and 12)

Initially, the IC is self supplying from the rectified mains voltage via pin DRAIN. Supply

capacitor CVCC is charged by the intern al start-up current source to a level of

approximately 4 V or higher, depending on the drain voltage. Once the drain voltage

exceeds the M-level (mains-dependent operation-enabling level), the start-up current

source will continue charging capacitor CVCC (switch S1 will be opened); see Figure 1.

The IC will activate the power converter as soon as the voltage on pin VCC passes the

level VCC(start). The IC supply is taken over by the auxiliary winding as soon as the output

voltage reaches its intended level and the IC supply from the mains voltage is

subsequently stopped for high efficiency operation (green function).

The moment the voltage on pin VCC drops below the undervoltage lock-out level VUVLO,

the IC stops switching and enter s a safe rest art from the rectifie d mains volt age. Inhibiting

the auxiliary supply by external means causes the converter to operate in a stable, well

defined burs t mo de .

7.2 Supply management

All (internal) reference voltages are derived from a temperature compensated, on-chip

band gap circuit .

7.3 Current mode control

Current mode control is used for its good line regulation behaviour.

Fig 3. Multi-mode operation

VCO fixed quasi resonant

P (W)

mbl500

(kHz)

125

Product data sheet Rev. 3.1 — 21 June 2012 6 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

The ‘on-time’ is controlled by the internally inve rted control pin volt age, which is comp ared

with the primary current information. The primary current is sensed across an external

resistor. The driver output is latched in the logic, prev en tin g multiple switch-on.

The internal control voltage is inversely proportional to the external control pin voltage,

with an offset of 1.5 V. This means that a voltage range from 1 V to 1.5 V on pin CTRL will

result in an internal control voltage range from 0.5 V to 0 V (a high external control voltage

results in a low duty cycle).

7.4 Oscillator

The maximum fixed frequency of the oscillator is set by an internal current source and

capacitor. The maximum frequency is reduced once the control voltage enters the VCO

control window. Then, the maximum frequency changes linearly with the control voltage

until the minimum frequency is reached (see Figure 4 and 5).

7.5 VCO adjustment

The VCOadj pin can be use d to set the VCO operation point. As soon as the peak vo ltage

on the sense resistor is contr olled below half the voltage on the VCOad j pi n (VCO 1 level),

frequency reduction will start. The actual peak voltage on sense will be somewhat higher

Fig 4. Vsense(max) as a function of VCTRL

Fig 5. VCO-frequency as a function of Vsense(max)

VCTRL

1 V

(typ)

0.52 V

1.5 V

(typ)

mgu233

Vsense(max)

Vsense(max) (V)

mbl501

(kHz)

125 125 kHz

VCO2

level

VCO1

level

Product data sheet Rev. 3.1 — 21 June 2012 7 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

due to switch-off delay (see Figure 6). The frequency reduction will stop approximately

25 mV lower (VCO2 level), when the minimum frequency is reached.

7.6 Cycle skipping

At very low power levels, a cycle skipping mode will be activated. A high control voltage

will reduce the switching frequency to a minimum of 25 kHz. If the voltage on the control

pin has raised even more, switch-on of the external power MOSFET will be inhibited until

the voltage on the control pin has dropped to a lower value again <.Normal_XRef>(see

Fig.6).

For system accuracy, it is not the absolute voltage on the control pin that will trigger the

cycle skipping mode, but a signal derived from the internal VCO will be used.

Remark: If the no-load requirement of the system is such that the output voltag e can be

regulated to its intended level at a switching frequency of 25 kHz or above, the cycle

skipping mode will not be activated.

7.7 Standby output

The STDBY output pin (VSTDBY = 5 V) can be used to drive an external NPN transistor or

FET in order to e.g. switch-off a PFC circuit. The STDBY output is activated by the internal

VCO: as soon as the VCO has reduced the switching frequency to (almost) the minimum

frequency of 25 kHz, the STDBY output will be activated (see Figure 6). The STDBY output

will go low again as soon as the VCO allows a switching frequency close to the maximum

frequency of 125 kHz.

The voltage levels dV1, dV2, dV3 and dV4 are fixed in the IC to typically 50 mV, 18 mV, 40 mV and 15 mV respectively.

The level at which VCO mode of operation starts or ends can be externally controlled with the VCOadj pin.

Fig 6. A functional implementation of the standby and cycle skipp in g circuitry.

mbl502

1.5 V - VCTRL

Isense

fosc

fmax

fmin

Vx (mV)

CTRL

VCC(5V)

VCOadj

current

comparator

cycle

skipping

OSCILLATOR

DRIVER DRIVER

5 V

Vx (mV)

dV4

VCOadj

dV2dV1

dV3

VSTDBY

(V)

Product data sheet Rev. 3.1 — 21 June 2012 8 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

7.8 Demagnetization

The system will be in discontinuous conduction mode all the time. The oscillator will not

start a new primary stroke until the secondary stroke has ended.

Demagnetization features a cycle-by-cycle output short-circuit protection by immediately

lowering the frequency (longer off-time), thereby reducing the power level.

Demagnetization recognition is suppressed during the first time (tsuppr). This suppression

may be necessary in applications where the transformer has a large leakage inductance

and at low output voltages/start-up.

7.9 OverVoltage Protection (OVP)

An OVP mode is implemented in the GreenChip series. For the TEA1552, this works by

sensing the auxiliary voltage via the current flowing into pin DEM during the secondary

stroke. The auxiliary winding voltage is a well-defined replica of the output voltage. Any

voltage spikes are averaged by an internal filter.

If the output voltage exceeds the OVP trip level, the OVP circuit switches off the power

MOSFET. The controller then waits until the UVLO level is reached on pin VCC. When VCC

drops to UVLO, capacitor CVCC will be recharged to the Vstart level, however the IC will not

start switching again. Subsequently, VCC will drop again to the UVLO level, etc.

Operation only recomm ence s when the V CC voltage drops below a level of approximately

4.5 V (practically when the Vmains has been disconnected for a short perio d).

The output voltage (VOVP) at which the OVP function trips, can be set by the

demagnetization resistor RDEM:

where Ns is the number of secondary turns an d Naux is the number of auxiliary turns of the

transformer.

Current IOVP(DEM) is internally trimmed.

The value of the demagnetization resistor (RDEM) can be adjusted to the turns ratio of the

transformer, thus making an accurate OVP possible.

7.10 Valley switching (see Figure 7)

A new cycle starts when the power switch is switched on. After the ‘on-time’ (which is

determined by the ‘sense’ voltage and the internal control voltage), the switch is opened

and the secondary stroke starts.

After the secondary stroke, the drain voltage shows an oscillation with a frequency of

approximately

where Lp is the primary self inductance of the transformer and Cd is the capacitance on

the drain node.

VOVP Ns

Naux

----------- IOVP DEM()

RDEM Vclamp DEM()pos()

+×[]×=

2π× LpCd

×()×()

---------------------------------------------------

Product data sheet Rev. 3.1 — 21 June 2012 9 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

As soon as the oscillator voltage is high again and the secondary stroke has ended, the

circuit waits for the lowest drain volt age befor e starting a new primary stro ke. This method

is called valley detection. Figure 7 shows the drain volt ag e together with the va lley signal,

the signal indicating the secondary stroke and the oscillator signal.

In an optimum design, the reflected secondary voltage on the primary side will force the

drain voltage to zero. Thus, zero voltage switching is very possible, preventing large

capacitive switching losses

and allowing high frequency operation, which results in small and cost effective inductors.

7.11 OverCurrent Protection (OCP)

The cycle-by-cycle peak drain current limit circuit us es the ex ternal s ource resist or to

measure the current accurately. This allows optimum size determination of the

transformer core (cost issue). The circuit is activated after the leading edge blanking time

tleb. The OCP protection circuit limits the ‘sense’ voltage to an internal level.

A: Start of new cycle at lowest drain voltage.

B: Start of new cycle in a classical PWM system at high drain voltage.

Fig 7. Signals for valley switching.

drain

secondary

stroke

mgu235

secondary

ringing

primary

stroke

valley

(2) (1)

secondary

stroke

oscillator

---CV

2f×××=





Product data sheet Rev. 3.1 — 21 June 2012 10 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

7.12 OverPower Protection (OPP)

During the primary stroke, the rectified mains input voltage is measured by sensing the

current drawn from pin DEM. This current is dependent on the mains volt age, according to

the following formula:

where:

The current information is used to adjust the peak drain current, which is measured via

pin Isense. The internal compensation is such that an almost mains in dependent maximum

output power can be realized.

The OPP curve is given in Figure 8.

7.13 Minimum and maximum ‘on-time’

The minimum ‘on-time’ of the SMPS is determined by the Leading Edge Blanking (LEB)

time. The IC limits the ‘on-time’ to 50 μs. When the system desires an ‘on-time’ longer

than 50 μs, a fault condition is assumed, and the IC will stop switching and enter the safe

restart mode.

7.14 Short winding protection

After the leading edge blanking time, the short wi nding protection circuit is also activated.

If the ‘sense’ voltage exce eds the short wind ing pro tection voltage Vswp, the converter will

stop switching. Once VCC drops below the UVLO level, capacitor CVCC will be recharged

and the supply will restart again. This cycle will be repeated until the short-circuit is

removed (safe restart mode).

The short winding protection will also protect in case of a secondary diode short-circuit.

Fig 8. OPP correction curve

IDEM Vaux

RDEM

---------------NV

mains

RDEM

-------------------------

≈≈

NNaux

-----------

mgu236

0.52 V

(typ)

0.3 V

(typ)

IDEM

Vsense(max)

-24 mA

(typ)

-100 mA

(typ)

Product data sheet Rev. 3.1 — 21 June 2012 11 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

7.15 Lock input

Pin LOCK is a general purpose (high-impedance) input pin, which can be used to switch

off the IC. As soon as the voltage on this pin is raised above 2.5 V, switching will stop

immediately. The voltage on the VCC pin will cycle between VCC(start) and VCC(UVLO), but

the IC will not start switching again until the latch function is reset. The latch is reset as

soon as the VCC drops below 4.5 V (typical value). The internal OVP and OTP will also

trigger this latch Figure 1.

The detection level of this input is related to the VCC(5V) pin voltage in the following way:

0.5 ×VCC(5V) ±4%. An internal Zener diode clamp of 5.6 V will protect this pin from

excessive voltages. No internal filtering is done on this input.

7.16 Overtemperature Protection (OTP)

An accurate temperature protection is provided in the circuit. When the junction

temperature exceeds the thermal shutdown temperature, the IC will stop switching. When

VCC drops to UVLO, capacitor CVCC will be recharged to the Vstart level, however the I C

will not start switching again. Subsequently, VCC will drop again to the UVLO level, etc.

Operation only recommences when the VCC voltage drops below a level of approximately

4.5 V (practically when the Vmains has been disconnected for a short perio d).

7.17 Sof t start-up

To prevent transformer rattle during hiccup, the transformer peak current is slowly

increased by the soft start function. This can be achieved by inserting a resistor and a

capacitor between pin Isense and the sense resistor (see Figure 9). An internal current

source charges the capacitor to V = ISS ×RSS, with a maximum of approximately 0.5 V.

The start level and the time constant of the increasing primary current level can be

adjusted externally by changing the values of RSS and CSS.

The charging current ISS will flow as long as the voltage on pin Isense is below

approximately 0.5 V. If the volta ge on pin Isense exceeds 0.5 V, the soft st art current source

will start limiting the current ISS. At the VCC(start) level, the ISS current source is completely

switched off.

Since the soft start current ISS is subtracted from pin VCC charging current, the RSS value

will affect the VCC charging current level by a ma ximu m of 60 μA (typical value).

Iprimary(max) Vocp ISS RSS

×()–

Rsense

--------------------------------------------

τRSS CSS

×=

Product data sheet Rev. 3.1 — 21 June 2012 12 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

7.18 5 V output

Pin VCC(5V) can be used for supplying external circuitry. The maximum output cu rrent must

be limited to 1 mA. If higher peak currents are required, an external RC combination

should limit the current drawn from this pin to 1 mA maximum.

The 5 V output voltage will be available as soon as the start-up voltage is reached. As the

high voltage supply can not supply the 5 V pin during start-up and/or shutdown, during

latched shutdown (via pin LOCK or other latched protection such as OVP or OTP), the

voltage is switched to zero.

7.19 Driver

The driver circuit to the gate of the power MOSFET has a current sourcing capability of

typically 170 mA and a current sink capability of typically 700 mA. This permits fast

turn-on and turn-off of the power MOSFET for efficient operation. A low driver source

current has been chosen to limit the ΔV/Δt at switch-on. This reduces Electro Magnetic

Interference (EMI) and als o limits the curren t spikes across Rsense.

Fig 9. Soft start-up

CSS

RSS

sense

Rsense

ISS

Vocp

start-up

mbl503

0.5 V

Product data sheet Rev. 3.1 — 21 June 2012 13 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

8. Limiting values

[1] All voltages are measured with respect to ground; positive currents flow into the chip; pin VCC may not be current driven. The voltage

ratings are valid provided other ratings are not violated; current ratings are valid provided the maximum pow er rating is not violated.

[2] Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ serie resistor.

[3] Equivalent to discharging a 200 pF capacitor through a 0.75 μH coil and a 10 Ω resistor.

9. Thermal characteristics

[1] With pin GND connected to sufficient copper area on the printed-circuit board.

Table 3. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).[1]

Symbol Parameter Conditions Min Max Unit

Voltages

VVCOadj voltage on pin VCOadj continuous −0.4 +5 V

Vsense voltage on pin Isense current limited −0.4 −V

VDRAIN voltage on pin DRAIN −0.4 +650 V

VCC supply voltage continuous −0.4 +20 V

VLOCK voltage on pin LOCK continuous −0.4 +7 V

VCTRL voltage on pin CTRL −0.4 +5 V

VDEM voltage on pin DEM current limite d −0.4 −V

Currents

Isense current on pin Isense −1+10mA

ISTDBY current on pin STDBY −1- mA

IDRIVER current on pin DRIVER d < 10 % −0.8 +2 A

IDRAIN current on pin DRAIN - +5 mA

ICC(5V) current on pin V CC(5V) −10 mA

ICTRL current on pin CTRL - +5 mA

IDEM current on pin DEM −250 +250 μΑ

General

Ptot total power dissipation Tamb < 70 °C - 0.75 W

Tstg storage temperature −55 +150 °C

Tjjunction temperature −20 +145 °C

ESD

Vesd electrostatic discharge voltage

pins 1 to 6 and pins 9 to 14 HBM class 1 [2] - 2000 V

pin 7 HBM class 1 [2] - 1500 V

on any other pin MM [3] - 400 V

Table 4. Thermal characteristics

Symbol Parameter Conditions Typ Unit

Rth(j-a) thermal resistance from junction to ambient in free air [1] 100 K/W

Product data sheet Rev. 3.1 — 21 June 2012 14 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

10. Characteristics

Table 5. Characteristics

Tamb =25

C; VCC = 15 V; all voltages are measured with respect to ground; currents are positive when flowing into the IC;

unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Start-up current source (pin DRAIN)

IDRAIN supply current from pin DRAIN VCC =0V; V

DRAIN > 100 V 1.0 1.2 1.4 mA

with auxiliary supply;

VDRAIN > 100 V - 100 300 μA

BVDSS breakdown voltage 650 - - V

M-level mains-dependent

operation-enabling level 60 - 100 V

Supply voltage management (pin VCC)

VCC(start) start-up voltage on VCC 10.3 11 11.7 V

VCC(UVLO) undervoltage lock-out on VCC 8.1 8.7 9.3 V

VCC(hys) hysteresis voltage on VCC VCC(start) −VCC(UVLO) 2.0 2.3 2.6 V

ICC(h) pin VCC charging current (high) VDRAIN > 100 V; VCC <3V −1.2 −1−0.8 mA

ICC(l) pin VCC charging current (low) VDRAIN > 100 V;

3V<V

CC <V

CC(UVLO)

−1.2 −0.75 −0.45 mA

ICC(restart) pin VCC restart current VDRAIN > 100 V;

VCC(UVLO) <V

CC <V

CC(start)

−650 −550 −450 μA

ICC(oper) supply current under normal

operation no load on pin DRIVER 1.1 1.3 1.5 mA

Demagnetization management (pin DEM)

Vth(DEM) demagnetization comparator

threshold voltage on pin DEM 50 100 150 mV

Iprot(DEM) protection current on pin DEM VDEM =50mV −50[1] -−10 nA

Vclamp(DEM)(neg) negative clamp voltage on pin DEM IDEM =−150 μA−0.5 −0.25 −0.05 V

Vclamp(DEM)(pos) positive clamp voltage on pin DEM IDEM =250μA 0.5 0.7 0.9 V

tsuppr suppression of transformer ringing

at start of secondary stroke 1.1 1.5 1.9 μs

Pulse width modulator

ton(min) minimum on-tim e - tleb -ns

ton(max) maximum on-time latched 40 50 60 μs

Oscillator

fosc(l) oscillator low fixed frequency VCTRL >1.5V 20 25 30 kHz

fosc(h) oscillator high fixed frequency VCTRL < 1 V 100 125 150 kHz

Vvco(start) peak vo ltage on pin Isense, where

frequency reduction starts see Figure 5 and Figure 6 -VCO

[1] −mV

Vvco(max) peak voltage on pin I sense, where

the frequency is equal to fosc(l)

-VCO

[1] −25 −mV

Product data sheet Rev. 3.1 — 21 June 2012 15 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

Duty cycle control (pin CTRL)

VCTRL(min) minimum voltage on pin CTRL for

maximum duty cycle -1.0 -V

VCTRL(max) maximum voltage on pin CTRL for

minimum duty cycle -1.5 -V

5 V output (pin VCC(5V))

VCC(5V) output voltage IO= 1 mA 4.75 5.0 5.25 V

ICC(5V) current capability of pin VCC(5V) −1.0 - - mA

LOCK input (pin LOCK)

VLOCK LOCK trip level 2.37 2.5 2.63 V

VCC(reset) voltage level on pin VCC which

resets the latch VLOCK <2.3V - 4.5 - V

RELLOCK,5V relation to 5 V outp ut (pin VCC(5V))V

LOCK =0.5×VCC(5V) −4- +4%

Valley switc h (pin DRAIN)

ΔV/Δtvalley valley recognition voltage change −85 - +85 V/μs

tvalley-swon delay from valley re cognition to

switch-on -150

[1] -ns

Overcurrent and short winding protection (pin Isense)

Vsense(max) maximum source voltage OCP ΔV/Δt=0.1V/μs 0.48 0.52 0.56 V

tPD propagation delay from detecting

Vsense(max) to switch-off ΔV/Δt=0.5V/μs−140 185 ns

Vswp short winding protection voltage 0.83 0.88 0.96 V

tleb blanking time for current and short

winding protection 300 370 440 ns

ISS soft start current Vsense <0.5V 45 60 75 μA

Overvoltage protection (pin DEM)

IOVP(DEM) OVP level on pin DEM set by resistor RDEM;

see Section 7.9 54 60 66 μA

Overpower protection (pin DEM)

IOPP(DEM) OPP current on pin DEM to start

OPP correction set by resistor RDEM;

see Section 7.12 −−24 −μA

IOPP50%(DEM) OPP current on pin DEM, where

maximum source voltage is limited

to 0.3 V

−−100 −μA

Standb y ou tpu t (pin STDBY)

VSTDBY standby output voltage 4.75 5.0 5.25 V

Isource source current capability VSTDBY =1V 20 22 24 μA

Isink sink current capability VSTDBY =1.2V 2 - mA

Table 5. Characteristics …continued

Tamb =25

C; VCC = 15 V; all voltages are measured with respect to ground; currents are positive when flowing into the IC;

unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 3.1 — 21 June 2012 16 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

[1] Guaranteed by design.

Driver (pin Driver)

Isource source current capability of driver VCC =9.5V; V

DRIVER =2V - −170 −88 mA

Isink sink current capability of driver VCC =9.5 V; V

DRIVER =2V - 300 - mA

VCC =9.5V;

VDRIVER =9.5V 400 700 - mA

Vo(driver)(max) maximum output voltage of driver VCC >12V - 11.5 12 V

Temperature protection

Tprot(max) maximum temperature protection

level 130 140 150 °C

Tprot(hys) hysteresis for the temperature

protection level [1] -8 -°C

Table 5. Characteristics …continued

Tamb =25

C; VCC = 15 V; all voltages are measured with respect to ground; currents are positive when flowing into the IC;

unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 3.1 — 21 June 2012 17 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

11. Application information

A converter with the TEA1552 consists of an input filter, a transformer with a third winding

(auxiliary), and an output stage with a feedback circuit.

Capacitor CVCC (at pin VCC) buffers the supp ly voltage of the IC, wh ich is power ed via th e

high voltage rectified mains during start-up and via the auxiliary winding during operation.

A sense resistor converts the primary current into a voltage at pin Isense. The value of this

sense resistor defines the maximum primary peak current.

Fig 10. Basic application

mbl498

TEA1552T

VCOadj

Isense

STDBY

DRIVER

HVS

DRAIN

DEM

CTRL

LOCK

VCC(5V)

GND

n.c.

VCC

Product data sheet Rev. 3.1 — 21 June 2012 18 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

Pin LOCK is used in this example for an additional external overtemperature protection.

If pin LOCK is not used, it must be tied to ground.

Fig 11. Configuration with controlled PFC.

mbl504

TEA1552T

VCOadj

Isense

STDBY

DRIVER

HVS

DRAIN

PFC

DEM

CTRL

LOCK

-t

VCC(5V)

GND

n.c.

VCC

RSS

RDEM

RCTRL

CCTRL

Rs2

CSS

Naux

Rsense

Rreg1

Rreg2

power

MOSFET

CVCC

Vmains

Product data sheet Rev. 3.1 — 21 June 2012 19 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

Fig 12. Typical waveforms.

VmC

start-up

sequence

normal

operation

normal

operation

overvoltage

protection

output

short-circuit

mbl505

(power

MOSFET)

VCC

M-level

Vgate

Product data sheet Rev. 3.1 — 21 June 2012 20 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

12. Package outline

Fig 13. Package outline SOT108-1 (SO14)

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10 1.45

1.25 0.25 0.49

0.36 0.25

0.19 8.75

8.55 4.0

3.8 1.27 6.2

5.8 0.7

0.6 0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT108-1

detail X

vMA

(A )

076E06 MS-012

pin 1 index

0.069 0.010

0.004 0.057

0.049 0.01 0.019

0.014 0.0100

0.0075 0.35

0.34 0.16

0.15 0.05

1.05

0.041

0.244

0.228 0.028

0.024 0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

99-12-27

03-02-19

0 2.5 5 mm

scale

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

Product data sheet Rev. 3.1 — 21 June 2012 21 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

13. Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note AN10365 “Surface mount reflow

soldering description”.

13.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to

Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both

the mechanical and the electrical connection. There is no single soldering method that is

ideal for all IC packages. Wave soldering is often preferred when through-hole and

Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not

suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

13.2 Wave and reflow soldering

W ave soldering is a joinin g technology in which the joint s are made by solder coming from

a standing wave of liquid solder. The wave soldering process is suitable for the following:

•Through-hole components

•Leaded or leadless SMDs, which are glued to the surface of the printed circu it board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solder lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature profile. Leaded packages,

packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

•Board specifications, including the board finish, solder masks and vias

•Package footprints, including solder thieves and orientation

•The moisture sensitivity level of the packages

•Package placement

•Inspection and repair

•Lead-free soldering versus SnPb soldering

13.3 Wave soldering

Key characteristics in wave soldering are:

•Process issues, such as application of adhesive and flux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

•Solder bath specifications, including temperature and impurities

Product data sheet Rev. 3.1 — 21 June 2012 22 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

13.4 Reflow soldering

Key characteristics in reflow soldering are:

•Lead-free ve rsus SnPb soldering; note th at a lead-free reflow process usua lly leads to

higher minimum peak temperatures (see Figure 14) than a SnPb process, thus

reducing the process window

•Solder paste printing issues including smearing, release, and adjusting the process

window for a mix of large and small components on one board

•Reflow temperature profile; this profile includes preheat, reflow (in which the board is

heated to the peak temperature) and cooling down. It is imperative that the peak

temperature is high enoug h for the solder to make reliable solder joint s (a solder paste

characteristic). In addition, the peak temperature must be low enough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on package thickness and volume and is classified in accordance with

Table 6 and 7

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 14.

Table 6. SnPb eutectic process (from J-STD-020C)

Package thickness (mm) Package reflow temperature (°C)

Volume (mm3)

< 350 ≥ 350

< 2.5 235 220

≥ 2.5 220 220

Table 7. Lead-free process (from J-STD-020C)

Package thickness (mm) Package reflow temperature (°C)

Volume (mm3)

< 350 350 to 2000 > 2000

< 1.6 260 260 260

1.6 to 2.5 260 250 245

> 2.5 250 245 245

Product data sheet Rev. 3.1 — 21 June 2012 23 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

For further information on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.

14. Abbreviations

15. Revision history

MSL: Moisture Sensitivity Level

Fig 14. Temperature profiles for large and small components

001aac844

temperature

time

minimum peak temperature

= minimum soldering temperature

maximum peak temperature

= MSL limit, damage level

peak

temperature

Table 8. Abbreviations

Acronym Description

BiCMOS Bipolar Complementary Metal-Oxide Semiconductor

DMOS Diffusion Metal-Oxide Semiconductor

ESR Equivalent Series Resistance

EZ-HV SOI Easy High Voltage Silicon-On-Insulator

FET Field-Effect Transistor

PWM Pulse Width Modulation

SMPS Switched Mode Power Supply

SOPS Self-Oscillating Power Supply

Table 9. Revision history

Document ID Release date Data sheet status Change notice Supersedes

TEA1552 v.3.1 20120621 Product data sheet - TEA1552 v.3

Modifications: •Data sheet title changed.

•Table 1 “ Ordering information” on page 2 updated.

TEA1552 v.3 20120418 Product data sheet - TEA1552 v.2

TEA1552 v.2 20020827 Product specification - TEA1552 v.1

TEA1552 v.1 20020703 Product specification - -

Product data sheet Rev. 3.1 — 21 June 2012 24 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

16. Legal information

16.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of device (s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

16.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short dat a sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full dat a

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conf lict with the short data sheet, the

full data sheet shall pre vail.

Product specificatio n — The information and data provided in a Product

data sheet shall define the specification of the product as agr eed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to off er functions and qualities beyond those described in the

Product data sheet.

16.3 Disclaimers

Limited warr a nty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information. NXP Se miconductors takes no

responsibility for the content in this document if provided by an inf ormation

source outside of NXP Semiconductors.

In no event shall NXP Semiconductors be liable for any indirect, incidental ,

punitive, special or consequ ential damages (including - wit hout limitatio n - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liabili ty towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors pro duct can reasonably be expected

to result in perso nal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconducto rs products in such equipment or

applications and ther efore such inclu sion and/or use is at the cu stomer’s own

risk.

Applications — Applications that are described herein for any of these

products are for il lustrative purposes only. NXP Semiconductors makes no

representation or warranty tha t such application s will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and ope ration of their applications

and products using NXP Semiconductors product s, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suit able and fit for the custome r’s applications and

products planned, as well as fo r the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

NXP Semiconductors does not accept any liabili ty related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessa ry

testing for th e customer’s applications and pro ducts using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by cust omer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanent ly and irreversibly affect

the quality and reliability of the device.

Te rms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individua l agreement. In case an individual

agreement is concluded only the ter ms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Not hing in this document may be interpret ed or

construed as an of fer t o sell product s that is open for accept ance or t he grant,

conveyance or implication of any license under any copyri ghts, paten ts or

other industrial or intellectual property rights.

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contain s data from the objective specification for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] dat a sheet Production This document contains the product specification.

Product data sheet Rev. 3.1 — 21 June 2012 25 of 26

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for aut omo tive use. It i s neit her qua lif ied nor tested

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automot ive specifications and standard s, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

product for such automotive applications, use and specifications, and (b)

whenever cust omer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconduct ors for an y

liability, damages or failed product claims result ing from customer design an d

use of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specif ications.

Translations — A non-English (translated) versio n of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

16.4 Trademarks

Notice: All refe renced brands, produc t names, service names and trademarks

are the property of their respect i ve ow ners.

GreenChip — is a trademark of NXP B.V.

17. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors TEA1552

HV start-up flyback controller for DCM or QR mode

For more information, please visit: http://www.nxp.co m

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 21 June 2012

Document identifier: TEA1552

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

18. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

3.1 Typical application . . . . . . . . . . . . . . . . . . . . . . 2

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

7 Functional description . . . . . . . . . . . . . . . . . . . 4

7.1 Start-up, mains enabling operation level and

undervoltage lock-out (see Figure 11 and 12) . 5

7.2 Supply management. . . . . . . . . . . . . . . . . . . . . 5

7.3 Current mode control . . . . . . . . . . . . . . . . . . . . 5

7.4 Oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

7.5 VCO adjustment. . . . . . . . . . . . . . . . . . . . . . . . 6

7.6 Cycle skipping . . . . . . . . . . . . . . . . . . . . . . . . . 7

7.7 Standby output . . . . . . . . . . . . . . . . . . . . . . . . . 7

7.8 Demagnetization. . . . . . . . . . . . . . . . . . . . . . . . 8

7.9 OverVoltage Protection (OVP) . . . . . . . . . . . . . 8

7.10 Valley switching (see Figure 7). . . . . . . . . . . . . 8

7.11 OverCurrent Protection (OCP) . . . . . . . . . . . . . 9

7.12 OverPower Protection (OPP) . . . . . . . . . . . . . 10

7.13 Minimum and maximum ‘on-time’. . . . . . . . . . 10

7.14 Short winding protection. . . . . . . . . . . . . . . . . 10

7.15 Lock input. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

7.16 Overtemperature Protection (OTP). . . . . . . . . 11

7.17 Soft start-up . . . . . . . . . . . . . . . . . . . . . . . . . . 11

7.18 5 V output . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

7.19 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 13

9 Thermal characteristics . . . . . . . . . . . . . . . . . 13

10 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 14

11 Application information. . . . . . . . . . . . . . . . . . 17

12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 20

13 Soldering of SMD packages . . . . . . . . . . . . . . 21

13.1 Introduction to soldering . . . . . . . . . . . . . . . . . 21

13.2 Wave and reflow soldering . . . . . . . . . . . . . . . 21

13.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 21

13.4 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 22

14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 23

15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 23

16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 24

16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 24

16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

16.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 24

16.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 25

17 Contact information . . . . . . . . . . . . . . . . . . . . 25

18 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26