This is information on a product in full production.
July 2015 DocID17772 Rev 7 1/37
VN5770AKP-E
Quad smart power solid state relay for complete H-bridge
configurations
Datasheet
-
production data
Features
•ECOPACK
®
: lead free and RoHS compliant
•Automotive Grade: compliance with AEC
guidelines
•General features
– Inrush current management by active
power limitation on the high-side switches
– Very low standby current
– Very low electromagnetic susceptibility
– Compliance with European directive
2002/95/EC
•Protection
– High-side drivers undervoltage shutdown
– Overvoltage clamp
– Output current limitation
– High and low-side overtemperature
shutdown
– Short circuit protection
– ESD pr otection
•Diagnostic functions
– Proportional load current sense
– Thermal shutdown indication on both the
high and low -sid e swit ch es
Applications
•DC motor driving in full or half bridge
configuration
•All types of resistive, inductive and capacitive
loads
Description
The VN5770AKP-E is a device formed by three
monolithic chips housed in a standard SO-28
package: a double high-side and two low-side
switches. The double high-side is made using
STMicroelectronics
®
VIPower
®
M0-5 technology,
while the low-s id e swit ch es ar e full y pro tected
VIPower M0-3 OMNIFET II. This devic e is
suitable to drive a DC motor in a bridge
configuration as well as to be used as a quad
switch for any low voltage application.
The dual high-side switches integrate built in non
latching thermal shutdown with thermal
hysteresis. An output current limiter protects the
device in overload condition. In case of long
overload duration, the device limits the dissipated
power to a safe level up to thermal shutdown
intervention. An analog current sense pin delivers
a current proportional to the load current
(according to a known ratio) and indicates
overtemperature shutdown of the relevant
high-side switch through a voltage flag.
The low-side switches have built in non latching
thermal shutdown with thermal hysteresis, linear
current limitation and overvoltage clamping.
Fault feedback for overtemperature shutdown of
the low-side switch is indicated by the relevant
input pin current consumption going up to the fault
sink current flag.
Type R
DS(on)
I
OUT
(typ) V
CC
VN5770AKP-E 280 mΩ
(1)
1. Total resistance of one side in bridge configuration
8.5 A 36 V
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www.st.com
Contents VN5770AKP-E
2/37 DocID17772 Rev 7
Contents
1 Block diagram and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Elect rical characteristics for dual high-side switch . . . . . . . . . . . . . . . . . . 10
4 Electrical characteristics curves for dual high-side switch . . . . . . . . 14
4.1 Elect rical characteristics for low-side switches . . . . . . . . . . . . . . . . . . . . . 16
4.2 Elect rical characteristics curves for low-side switches . . . . . . . . . . . . . . . 18
5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1 Maximum demagnetization energy (V
CC
= 13.5 V) . . . . . . . . . . . . . . . . . 24
6 Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.1 SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.1 SO-28 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.2 SO-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
8 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
DocID17772 Rev 7 3/37
VN5770AKP-E List of tables
3
List of tables
Table 1. Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Dual high-side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Low-side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 6. Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 7. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 8. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Current sense (8V<VCC<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 10. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 11. Off. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. On. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 13. Dynamic (T
j
= 25°C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 14. Switching (T
j
= 25 °C, unless otherwise specified). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 15. Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 16. Protection and diagnostics (-40 °C < Tj < 150 °C, unless otherwise specified) . . . . . . . . . 17
Table 17. Thermal calculations in clockwise and anti-clockwise operation in steady-state mode . . . 26
Table 18. Thermal resistances definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 19. Single pulse thermal impedance definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 20. Thermal calculations in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 21. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 22. SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 23. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 24. SO-28 carrier tape dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 25. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 26. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
List of figures VN5770AKP-E
4/37 DocID17772 Rev 7
List of figures
Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 4. Output voltage drop limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. On-state resistance vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. On-state resistance vs V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 14. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 15. Turn-on voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. I
LIMH
vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 17. Turn-off voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 18. Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 19. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 20. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 21. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 22. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 23. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 24. Output characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 25. Step response current limit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26. Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 27. Static drain-source on resistance vs I
D
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 28. Static drain-source on resistance vs input voltage (part 1). . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 29. Static drain-source on resistance vs input voltage (part 2). . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 30. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 31. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 32. Current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 33. Typical application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 34. Recommended motor operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 35. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 36. Maximum turn off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 37. SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 38. Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 39. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 26
Figure 40. SO-28 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . 27
Figure 41. SO-28 LSD thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . 28
Figure 42. Thermal fitting model of an H-bridge in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 43. SO-28 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 44. SO-28 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 45. Reel for SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 46. SO-28 carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 47. SO-28 schematic drawing of leader and trailer tape. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
DocID17772 Rev 7 5/37
VN5770AKP-E Block diagram and pin descriptions
36
1 Block diagram and pin descriptions
Figure 1. Block diagram
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Block diagram and pin descriptions VN5770AKP-E
6/37 DocID17772 Rev 7
Figure 2. Configuration diagram (top view)
Table 1. Pin descriptions
No Name Function
1, 3, 25, 28 DRAIN 3 Drain of switch 3 (low-side switch)
2 INPUT 3 Input of switch 3 (low-side switch)
4, 11 N.C. Not connected
5, 10, 19, 24 V
CC
Drain of switches 1 and 2 (high-side switches) and power supply
voltage
6 GND Ground of switches 1 and 2 (high-side switches)
7 INPUT 1 Input of switch 1 (high-side switches)
8 INPUT 2 Input of switch 2 (high-side switch)
9CURRENT
SENSE Analog current sense pin, it delivers a current proportional to the
load current
12, 14, 15, 18 DRAIN 4 Drain of switch 4 (low-side switch)
13 INPUT 4 Input of switch 4 (low-side switch)
16, 17 SOURCE 4 Source of switch 4 (low-side switch)
20, 21 SOURCE 2 Source of switch 2 (hig h-side switch )
22, 23 SOURCE 1 Source of switch 1 (hig h-side switch )
26, 27 SOURCE 3 Source of switch 3 (low-side switch)
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DocID17772 Rev 7 7/37
VN5770AKP-E Block diagram and pin descriptions
36
Table 2. Thermal data
Symbol Parameter Max value Unit
R
thj-case
Thermal resistance junction-lead (high-side switch) 10 °C/W
R
thj-case
Thermal resistance junction-lead (low-side switch) 7 °C/W
R
thj-amb
Thermal resistance junction-ambient See Figure 39 °C/W
Absolute maximum ratings VN5770AKP-E
8/37 DocID17772 Rev 7
2 Absolute maximum ratings
Stressing the device above the rating listed in Table 3 and Table 4 may cause permanent
damage to the device. These are stress ratings only and operation of the device at these or
any other conditions above those indicated in the Operating sections of this specification is
not implied. Exposure to the conditions in Section 2.1: Absolute maximum ratings for
extended periods may affect device reliability.
2.1 Absolute maximum ratings
Table 3. Dual high-side switch
Symbol Parameter Value Unit
V
CC
DC supply voltage 41 V
-V
CC
Reverse DC supply voltage 0.3 V
-I
GND
DC reverse ground pin current 200 mA
I
OUT
DC output current Internally limited A
-I
OUT
Reverse DC output current -12 A
I
IN
DC input current -1 to 10 mA
I
CSD
DC current sense disable input current -1 to 10 mA
V
CSENSE
Current sense maximum voltage V
CC
-41
+V
CC
V
V
E
MAX
Maximum switching energy (single pulse)
(L = 3.7 mH; R
L
= 0 Ω; V
bat
= 13.5 V; T
jstart
= 150 °C;
I
OUT
= I
limL
(Typ.)) 32 mJ
V
ESD
Electrostatic discharge (Human Body Model: R = 1.5 KΩ;
C = 100 pF)
– INPUT
– CURRENT SENSE
– OUTPUT
–V
CC
4000
2000
5000
5000
V
V
V
V
V
ESD
Charge device model (CDM-AEC-Q100-011) 750 V
T
j
Junction operating temperature -40 to 150 °C
T
stg
Storage temperature -55 to 150 °C
DocID17772 Rev 7 9/37
VN5770AKP-E Absolute maximum ratings
36
Table 4. Low-side switch
Symbol Parameter Value Unit
V
DSn
Drain-source voltage (V
INn
= 0 V) Internally clamped V
V
INn
Input voltage Internally clamped V
I
INn
Input current +/-20 mA
R
IN MINn
Minimum input series impedance 220 Ω
I
Dn
Drain current Internally limited A
I
Rn
Reverse DC output current -12 A
V
ESD1
Electrostatic discharge (R = 1.5 KΩ, C = 100 pF) 4000 V
V
ESD2
Electrostatic discharge on output pins only
(R = 330 Ω, C = 150 pF) 16500 V
P
tot
Total dissipation at T
c
= 25 °C 4 W
T
j
Operating junction temperature Internally limited °C
T
c
Case operating temperature Internally limited °C
T
stg
Storage temperature -55 to 150 °C
Ele ctrical characteristics VN5770AKP-E
10/37 DocID17772 Rev 7
3 Electrical characteristics
3.1 Electrical characteristics for dual high-side switch
Values specified in this section are for 8 V < V
CC
< 36 V; -40 °C < T
j
< 150 °C, unless
otherwise specified (for each channel).
Table 5. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CC
Operati ng supply
voltage 4.5 13 36 V
V
USD
Undervoltage shutdown 3.5 4.5 V
V
USDhyst
Undervoltage shutdown
hysteresis 0.5 V
R
ON
On-state resistance
I
OUT
= 3 A; T
j
= 25 °C 160 mΩ
I
OUT
= 3 A; T
j
= 150 °C 320 mΩ
I
OUT
= 3 A; V
CC
= 5 V; T
j
= 25 °C 210 mΩ
V
clamp
Clamp Voltage I
S
= 20 mA 41 46 52 V
I
S
Supply current
Off-state; V
CC
= 13 V; T
j
= 25 °C;
V
IN
= V
OUT
= V
SENSE
= 0 V 2
(1)
1. PowerMOS leakage included
5
(1)
µA
On-state; V
CC
= 13 V; V
IN
= 5 V ;
I
OUT
= 0 A 36mA
I
L(off)
Of f-state outp ut
current
(2)
2. For each channel
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T
j
= 25 °C 03µA
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T
j
= 125 °C 05µA
V
F
Output - V
CC
diode
voltage
(2)
-I
OUT
= 3 A; T
j
= 150 °C 0.7 V
Table 6. Switching (V
CC
= 13 V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
Turn-on delay time R
L
= 4.3 Ω (see Figure 3)— 15 — µs
t
d(off)
Turn-off delay time R
L
= 4.3 Ω (see Figure 3)— 10 — µs
(dV
OUT
/dt)
on
Turn-on voltage
slope R
L
= 4.3 Ω —See Figure 15 —V/µs
(dV
OUT
/dt)
off
T urn-of f volt age s lope R
L
= 4.3 Ω —See Figure 17 —V/µs
W
ON
Switching energy
losses duri ng t
won
R
L
= 4.3 Ω (see Figure 3) — 0.16 — mJ
W
OFF
Switching energy
losses duri ng t
woff
R
L
= 4.3 Ω (see Figure 3) — 0.08 — mJ
DocID17772 Rev 7 11/37
VN5770AKP -E Electri cal chara ct er istics
36
Table 7. Logic input
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL
Input low level voltage 0.9 V
I
IL
Low level input current V
IN
= 0.9 V 1 µA
V
IH
Input hi gh level voltage 2.1 V
I
IH
High level input current V
IN
= 2.1 V 10 µA
V
I(hyst)
Input hysteresis voltage 0.25 V
V
ICL
Input cl amp voltage I
IN
= 1 m A 5.5 7 V
I
IN
= -1 mA -0.7 V
Table 8. Protection and diagnostics
(1)
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
DC Short circuit current V
CC
= 13 V 6 8.5 12 A
5 V < V
CC
< 36 V 12 A
I
limL
Short circuit current
during thermal cycling V
CC
= 13 V; T
R
< T
j
< T
TSD
3.5 A
T
TSD
Shutdown temp erat ure 150 175 200 °C
T
R
Reset temperature T
RS
+ 1 T
RS
+ 5 °C
T
RS
Thermal reset of
STATUS 135 °C
T
HYST
Thermal hysteresis
(T
TSD
-T
R
)7°C
V
DEMAG
Turn-off output voltage
clamp I
OUT
= 1 A; V
IN
= 0;
L = 20 mH V
CC
-41 V
CC
-46 V
CC
-52 V
V
ON
Output voltage drop
limitation
I
OUT
= 0.03 A;
T
j
= -40 °C to 150 °C
(see Figure 4)25 mV
Ele ctrical characteristics VN5770AKP-E
12/37 DocID17772 Rev 7
Figure 3. Switching time waveforms
Table 9. Current sense (8V<V
CC
<16V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
K
0
I
OUT
/I
SENSE
I
OUT
= 0.08 A;
V
SENSE
= 0.5 V;
T
j
= -40°C to 50°C 850 1450 2120
K
1
I
OUT
/I
SENSE
I
OUT
= 0.35 A; V
SENSE
= 0.5V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 840
980 1360
1360 2000
1740
K
2
I
OUT
/I
SENSE
I
OUT
= 3A; V
SENSE
= 4V;
T
j
= -40°C to 150°C 1200 1270 1350
K
3
I
OUT
/I
SENSE
I
OUT
= 4A; V
SENSE
= 4V;
T
j
= -40°C to 150°C 1200 1270 1350
I
SENSE0
Analog sense current
I
OUT
= 0A; V
SENSE
= 0V;
V
IN
= 0V; T
j
= -40°C to 150°C 01µA
I
OUT
= 0A; V
SENSE
= 0V;
V
IN
= 5V; T
j
= -40°C to 150°C 02µA
V
SENSE
Max analog sense output
voltage I
OUT
= 5A; R
SENSE
= 3.9 KΩ 5V
V
SENSEH
Analog sense output voltage
in overtemperature condition V
CC
= 13V; R
SENSE
= 3.9 KΩ9V
I
SENSEH
Analog sense output current
in overtemperature condition V
CC
= 13V 8 mA
t
DSENSE2H
Delay r espon se time from
rising edge o f INPU T pin
V
SENSE
<4 V; 0.35 A<I
out
<5 A;
I
SENSE
= 90% of I
SENSE
max
(see Figure 5)70 300 µs
t
DSENSE2L
Delay r espon se time from
falling edge of INPUT pin
V
SENSE
<4 V; 0.35 A<I
out
<5 A;
I
SENSE
= 10% of I
SENSE
max
(see Figure 5)100 250 µs
T
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DocID17772 Rev 7 13/37
VN5770AKP -E Electri cal chara ct er istics
36
Figure 4. Output voltage drop limitation
Figure 5. Current sense delay characteristics
Table 10. Truth table
Conditions Input Output Sense
Nor mal opera tion L
HL
H0
Nominal
Overtemperature L
HL
L0
V
SENSEH
Undervoltage L
HL
L0
0
Short circuit to GN D L
HL
L0
0
Short circuit to V
CC
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14/37 DocID17772 Rev 7
4
Electrica l characteristics curves for dual high-side switch
Figure 6. Off-state output current Figure 7. High level inp ut current
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DocID17772 Rev 7 15/37
VN5770AKP-E Electrical characteristics curves for dual high-side switch
36
Figure 12. On-state resistance vs T
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Figure 13. On-state resistance vs V
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Electrical characteristics curves for dual high-side switch VN5770AKP-E
16/37 DocID17772 Rev 7
4.1 Electrical characteristics for low-side switches
Values specified in this section are for -40 °C < T
j
< 150 °C, unless otherwise specified
Table 11. Off
Symbol Parameter Test conditions Min Typ Max Unit
V
CLAMP
Drain-source clamp
voltage V
IN
= 0 V; I
D
= 1.5 A 40 45 55 V
V
CLTH
Drain-source clamp
threshold v oltage V
IN
= 0 V; I
D
= 2 mA 36 V
V
INTH
Input threshold voltage V
DS
= V
IN
; I
D
= 1 m A 0.5 2.5 V
I
ISS
Supply current from
input pin V
DS
= 0 V; V
IN
= 5 V 100 150 µA
V
INCL
Input-source clamp
voltage I
IN
= 1 mA 6 6.8 8 V
I
IN
= -1 mA -1.0 -0.3 V
I
DSS
Zero input voltage
drain current
(V
IN
= 0V)
V
DS
= 13 V; V
IN
= 0 V; T
j
= 25 °C 30 µA
V
DS
= 25 V; V
IN
= 0 V 75 µA
Table 12. On
Symbol Param eter Test conditions Min Typ Max Unit
R
DS(on)
Static drain-source on
resistance V
IN
= 5 V ; I
D
= 3 A; T
j
= 25 °C — — 120 mΩ
V
IN
= 5 V ; I
D
= 3 A — — 240 mΩ
Table 13. Dynamic (T
j
= 25°C, unless otherwise specified)
Symbol Parameter Test conditions Min Typ Max Unit
g
fs
Forward
transconductance V
DD
= 13 V; I
D
= 1.5 A — 2.5 — S
C
OSS
Out put capacitance V
DS
= 13 V; f = 1 MHz; V
IN
= 0 V — 150 — pF
Table 14. Switching (T
j
= 25 °C, unless otherwise specified)
Symbol Parameter Test conditions Min Typ Max Unit
t
d(on)
Turn-on delay time
V
DD
= 15 V; I
D
= 3 A; V
gen
= 5 V ;
R
gen
= R
IN MINn
= 220 Ω
—200400ns
t
r
Rise time — 1.2 2.5 µs
t
d(off)
Turn-off delay time — 600 1350 ns
t
f
Fall time — 400 1000 ns
t
d(on)
Turn-on delay time
V
DD
= 15 V; I
D
= 3 A
V
gen
= 5 V; R
gen
= 2.2 KΩ
—0.802.5 µs
t
r
Rise time — 3.7 7.5 µs
t
d(off)
Turn-off delay time — 2.6 7.5 µs
t
f
Fall time — 2.3 7.0 µs
DocID17772 Rev 7 17/37
VN5770AKP-E Electrical characteristics curves for dual high-side switch
36
(dI/dt)
on
Turn-on current slope V
DD
= 15 V; I
D
= 3 A; V
gen
= 5 V ;
R
gen
= R
IN MINn
= 220 Ω—3.0 A/µs
Q
i
Total input charge V
DD
= 12 V; I
D
= 3 A; V
IN
= 5 V ;
I
gen
= 2.13 mA —9.0 nC
Table 15. Source drain diode
Symbol Parameter Test conditions Min Typ Max Unit
V
SD(1)
1. Pulsed: pulse duration = 300μs, duty cycle 1.5%
Forward on voltage I
SD
= 1.5 A; V
IN
= 0 V — 0.8 — V
t
rr
Reverse recovery time
I
SD
= 1.5 A; dI/dt = 12 A/ms;
V
DD
= 30 V; L = 200 μH
—400— ns
Q
rr
Reverse recovery
charge —200—nC
I
RRM
Reverse recovery
current —1.0— A
Table 16. Protection and diagnostics (-4 0 °C < T
j
< 150 °C, unless otherwise specified)
Symbol Parameter Test conditions Min Typ Max Unit
I
lim
Drain current limit V
IN
= 5 V; V
DS
= 13 V 6 8.5 12 A
t
dlim
Step re sponse current
limit V
IN
= 5 V; V
DS
= 13 V 10 µs
T
jsh
Overtemperature
shutdown 150 175 200 °C
T
jrs
Overtemperature reset 135 °C
I
gf
Fault sink current V
IN
= 5 V; V
DS
= 13 V; T
j
= T
jsh
10 15 20 mA
E
as
Single pulse
avalanche energy
Starting T
j
= 25 °C; V
DD
= 24 V;
V
IN
= 5 V; R
gen
= R
IN M INn
= 220 Ω;
L = 24 mH 100 mJ
Table 14. Switching (T
j
= 25 °C, unless otherwise specified) (continued)
Symbol Parameter Test conditions Min Typ Max Unit
Electrical characteristics curves for dual high-side switch VN5770AKP-E
18/37 DocID17772 Rev 7
4.2 Electrical characteristics curves for low-side switches
Figure 18. Static drain source on r esistance Figure 19. Derating curve
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DocID17772 Rev 7 19/37
VN5770AKP-E Electrical characteristics curves for dual high-side switch
36
Figure 24. Output characteristics Figure 25. Step response current limit
Figure 26. Source -drain diode forward
characteristics Figure 27. Static drain-source on resistance vs
I
D
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20/37 DocID17772 Rev 7
Figure 30. Normalized input threshold voltage
vs temperature Figure 31. Normalized on resistance vs
temperature
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DocID17772 Rev 7 21/37
VN5770AKP-E Application information
36
5 Application information
Figure 33. Typical application schematic
Note: Mostly motor bridge drivers use a reverse battery protection diode (D) inside supply rail.
This diode prevents a reverse current flow back to Vbatt in case the bridge gets disabled via
the logic inputs while motor inductance still carries energy. In order to prevent a hazardous
overvoltage at circuit supply terminal (Vcc), a blocking capacitor (C) is needed to limit the
voltage overshoot. As basic orientation, 50 µF per 1 A load current in recommended. In
alternative, also a Zener protection (Z) is suitable. Even if a reverse polarity diode is not
present, it is recommended to use a capacitor or zener at Vcc because a similar problem
appears in case supply terminal of the module has intermittent electrical contact to the
battery or gets disconnected while motor is operating.
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22/37 DocID17772 Rev 7
Figure 34. Recommended motor operation
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DocID17772 Rev 7 23/37
VN5770AKP-E Application information
36
Figure 35. Waveforms
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Application information VN5770AKP-E
24/37 DocID17772 Rev 7
5.1 Maximum demagnetization energy (V
CC
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Figure 36. Maximum turn off current versus load inductance
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DocID17772 Rev 7 25/37
VN5770AKP-E Package and thermal data
36
6 Package and thermal data
6.1 SO-28 thermal data
Figure 37. SO-28 PC board
Note: Layout condition of R
th
and Z
th
measurements (PCB FR4 area= 58 mm x 58 mm, PCB
thickness = 2 mm, Cu thickness = 35 mm, Copper areas: from minimum pad layout to
16 cm
2
).
Figure 38. Chipset configuration
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Package and thermal data VN5770AKP-E
26/37 DocID17772 Rev 7
Figure 39. Auto and mutual Rthj-amb vs PCB copper area in open box free air
condition
Note: See Figure 38. For more detailed information see Table 17 and Table 18.
Note: Values dependent on PCB heatsink area.
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Table 17. Thermal calculations in clockwise and anti-clockwise operation in steady-
state mode
HS
1
HS
2
LS
3
LS
4
T
jHS12
T
jLS3
T
jLS4
ON OFF OFF ON P
dHS1
x
R
thHS
+ P
dLS4
x
R
thHSLS
+ T
amb
P
dHS1
x
R
thHSLS
+
P
dLS4
x
R
thLSLS
+ T
amb
P
dHS1
x
R
thHSLS
+
P
dLS4
x
R
thLS
+ T
amb
OFF ON ON OFF P
dHS2
x
R
thHS
+ P
dLS3
x
R
thHSLS
+ T
amb
P
dHS2
x
R
thHSLS
+
P
dLS3
x
R
thLS
+ T
amb
P
dHS2
x
R
thHSLS
+
P
dLS3
x
R
thLSLS
+ T
amb
Table 18. Thermal resistances definitions
Parameter Definition
R
thHS
= R
thHS1
= R
thHS2
High-si de chip th ermal resistance junction to ambie nt (HS
1
or HS
2
in ON-state)
R
thLS
= R
thLS3
= R
thLS4
Low-side chip thermal resistance junction to ambient
R
thHSLS
= R
thHS1LS4
= R
thHS2LS3
Mutual thermal resistance junction to ambient between high-
side and low-side chips
R
thLSLS
= R
thLS3LS4
Mutual thermal resistance junction to ambient between low-
side chips
DocID17772 Rev 7 27/37
VN5770AKP-E Package and thermal data
36
x
Note: Values dependent on PCB heatsink area.
Note: Calculation is valid in any dynamic operating condition. Pd values set by user.
Figure 40. SO-28 HSD thermal impedance junction ambient single pulse
Table 19. Single pulse thermal impedance definitions
Parameter Definition
Z
thHS
High-side chip thermal impedance junction to ambient
Z
thLS
= Z
thLS3
= Z
thLS4
Low-side chip thermal impedance junction to ambient
Z
thHSLS
= Z
thHS12LS3
= Z
thHS12LS4
Mutual thermal impedance junction to ambient between
high-side and low-side chips
Z
thLSLS
= Z
thLS3LS4
Mutual thermal impedance junction to ambient between low-
side chips
Table 20. Thermal calcu latio ns in transie nt mode
Parameter Definition
T
jHS12
Z
thHS
x P
dHS12
+ Z
thHSLS
x (P
dLS3
+ P
dLS4
) + T
amb
T
jLS3
Z
thHSLS
x P
dHS12
+ Z
thLS
x P
dLS3
+ Z
thLSLS
x P
dLS4
+ T
amb
T
jLS4
Z
thHSLS
x P
dHS12
+ Z
thLSLS
x P
dLS3
+ Z
thLS
x P
dLS4
+ T
amb
=7+
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Package and thermal data VN5770AKP-E
28/37 DocID17772 Rev 7
Figure 41. SO-28 LSD thermal impedance junction ambient single pulse
Equation 1: pulse calculation formula
Figure 42. Thermal fitting model of an H-bridge in SO-28
=7+
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THδ
R
TH
δZ
THtp
1δ–()+⋅=
where δt
p
T⁄=
DocID17772 Rev 7 29/37
VN5770AKP-E Package and thermal data
36
Note: A blank space means that the value is the same as the previous one.
Table 21. Thermal parameters
Area/island (cm
2
)Footprint126
R1 = R7 (°C/W) 1
R2 = R8 (°C/W) 1.8
R3 = R11 = R17 (°C/W) 3.5
R4 (°C/W) 13.5
R5 = R13 = R19 (°C/W) 10.5
R6 = R14 = R20 (°C/W) 62.28 52.28 44.28 32.28
R9 = R15 (°C/W) 0.24
R10 = R16 (°C/W) 1.2
R12 (°C/W) 15.2
R18 (°C/W) 15.5
R21 = R22 = R23 (°C/W) 150
R24 (°C/W) 150 52.28 44.28 32.28
C1 = C7 (W·s/°C) 0.0008
C2 = C8 (W·s/°C) 0.001
C3 = C11 = C17 (W·s/°C) 0.008
C5 = C13 = C19 (W·s/°C) 0.2
C6 = C14 = C20 (W·s/°C) 1.6 1.61 1 .7 3.25
C9 = C15 (W·s/°C) 0.00015
C10 = C16 (W·s/°C) 0.0005
Package information VN5770AKP-E
30/37 DocID17772 Rev 7
7 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
7.1 SO-28 package information
Figure 43. SO-28 package outline
Table 22. SO-28 mechanical data
Ref.
Dimensions
Millimeters
Min. Typ. Max.
A2.35 2.65
A1 0.10 0.30
B0.33 0.51
C0.23 0.32
D
(1)
17.70 18.10
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DocID17772 Rev 7 31/37
VN5770AKP-E Package information
36
E7.40 7.60
e1.27
H 10.0 10.65
h0.25 0.75
L0.40 1.27
k0° 8°
ddd 0.10
1. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side.
Table 22. SO-28 mechanical data
Ref.
Dimensions
Millimeters
Min. Typ. Max.
Package information VN5770AKP-E
32/37 DocID17772 Rev 7
7.2 SO-28 packing information
Figure 44. SO-28 tube s hipment (no suffix)
Figure 45. Reel for SO-28
Table 23. Reel dimensions
Description Value
(1)
1. All dimensions are in mm.
Base quantity 1000
Bulk quantity 1000
A (ma x ) 330
B (min) 1.5
C (+0.5, -0.2) 13
D (min) 20.2
N100
W1 (+2/ -0) 24.4
W2 (ma x) 30.4
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5"1($'5
$
/
8
8
%
"
#
DocID17772 Rev 7 33/37
VN5770AKP-E Package information
36
Figure 46. SO-28 carrier tape
Table 24. SO-28 carrier tape dimensions
Description Value
(1)
1. All dimensions are in mm.
A
0
10.90 ± 0.1
B
0
18.55 ± 0.1
K
0
3.0 ± 0.1
K
1
2.6 ± 0.1
F 11.5 ± 0.1
P
1
12.0 ± 0.1
D1 1.5 ± 0.1
W 24.0 ± 0 .3
("1($'5
Package information VN5770AKP-E
34/37 DocID17772 Rev 7
Figure 47. SO-28 schematic drawing of leader and trailer tape
DocID17772 Rev 7 35/37
VN5770AKP-E Order codes
36
8 Order codes
Table 25. Device summary
Package Order codes
Tube Tape and reel
SO-28 VN5770AKP-E VN5770AKPTR-E
Revision history VN5770AKP-E
36/37 DocID17772 Rev 7
9 Revision history
Table 26. Document revision history
Date Revision Changes
11-Nov-2010 1 Initial release.
04-Jan-2012 2 Table 9: Current sense (8V<VCC<16V) - K
0
values modified
20-Feb-2012 3 Update Figure 2: Configuration diagram (top view) and Figure 33:
Typical application schematic
02-Oct-2012 4 Table 9: Current sense (8V<VCC<16V):
–K
0
: updated values
23-Sep-2013 5 Updated Disc laimer
Fixed order code value on the cover page and Table 25: Device
summary
25-Feb-2015 6 Updated:
–Section 7.1: SO-28 package information;
– Tape dimen sions in Figure 8: Order codes on page 35.
21-Jul-2015 7 Updated Section 7.2: SO-28 packing information
DocID17772 Rev 7 37/37
VN5770AKP-E
37
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