VN5770AKP-E Quad smart power solid state relay for complete H-bridge configurations Datasheet - production data - Thermal shutdown indication on both the high and low-side switches Applications * DC motor driving in full or half bridge configuration * All types of resistive, inductive and capacitive loads 62 GRXEOHLVODQG *$3*36 Description Features Type RDS(on) VN5770AKP-E 280 m(1) IOUT (typ) VCC 8.5 A 36 V 1. Total resistance of one side in bridge configuration * ECOPACK(R): lead free and RoHS compliant * Automotive Grade: compliance with AEC guidelines * General features - Inrush current management by active power limitation on the high-side switches - Very low standby current - Very low electromagnetic susceptibility - Compliance with European directive 2002/95/EC * Protection - High-side drivers undervoltage shutdown - Overvoltage clamp - Output current limitation - High and low-side overtemperature shutdown - Short circuit protection - ESD protection * Diagnostic functions - Proportional load current sense July 2015 This is information on a product in full production. The VN5770AKP-E is a device formed by three monolithic chips housed in a standard SO-28 package: a double high-side and two low-side switches. The double high-side is made using STMicroelectronics(R) VIPower(R) M0-5 technology, while the low-side switches are fully protected VIPower M0-3 OMNIFET II. This device is suitable to drive a DC motor in a bridge configuration as well as to be used as a quad switch for any low voltage application. The dual high-side switches integrate built in non latching thermal shutdown with thermal hysteresis. An output current limiter protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to a safe level up to thermal shutdown intervention. An analog current sense pin delivers a current proportional to the load current (according to a known ratio) and indicates overtemperature shutdown of the relevant high-side switch through a voltage flag. The low-side switches have built in non latching thermal shutdown with thermal hysteresis, linear current limitation and overvoltage clamping. Fault feedback for overtemperature shutdown of the low-side switch is indicated by the relevant input pin current consumption going up to the fault sink current flag. DocID17772 Rev 7 1/37 www.st.com Contents VN5770AKP-E Contents 1 Block diagram and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 4 5 4.1 Electrical characteristics for low-side switches . . . . . . . . . . . . . . . . . . . . . 16 4.2 Electrical characteristics curves for low-side switches . . . . . . . . . . . . . . . 18 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 24 Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.1 7 Electrical characteristics for dual high-side switch . . . . . . . . . . . . . . . . . . 10 Electrical characteristics curves for dual high-side switch . . . . . . . . 14 5.1 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 7.1 SO-28 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 7.2 SO-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 2/37 DocID17772 Rev 7 VN5770AKP-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Dual high-side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Low-side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Current sense (8V<VCC<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Dynamic (Tj = 25C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Switching (Tj = 25 C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Protection and diagnostics (-40 C < Tj < 150 C, unless otherwise specified) . . . . . . . . . 17 Thermal calculations in clockwise and anti-clockwise operation in steady-state mode . . . 26 Thermal resistances definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Single pulse thermal impedance definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Thermal calculations in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 SO-28 carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 DocID17772 Rev 7 3/37 3 List of figures VN5770AKP-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. 4/37 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Static drain-source on resistance vs ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Static drain-source on resistance vs input voltage (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . 19 Static drain-source on resistance vs input voltage (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . 19 Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Recommended motor operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Maximum turn off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 26 SO-28 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . 27 SO-28 LSD thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . 28 Thermal fitting model of an H-bridge in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 SO-28 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 SO-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Reel for SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 SO-28 carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 SO-28 schematic drawing of leader and trailer tape. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 DocID17772 Rev 7 VN5770AKP-E 1 Block diagram and pin descriptions Block diagram and pin descriptions Figure 1. Block diagram 9FF 9FF FODPS 8QGHUYROWDJH *1' &ODPS ,1387 6285&( 'ULYHU &ODPS ,1387 /RJLF &XUUHQWOLPLWHU 'ULYHU 9GVOLPLWHU 6285&( &XUUHQWOLPLWHU 2YHUWHPS 3RZHUOLPLWDWLRQ 2YHUWHPS 9'6OLPLWHU 3RZHUOLPLWDWLRQ . &6(16( . ,1387 ,'6 ,'6 2YHUYROWDJH &ODPS '5$,1 *DWH &RQWURO 6285&( 2YHU 7HPSHUDWXUH /LQHDU &XUUHQW /LPLWHU 2YHUYROWDJH &ODPS ,1387 '5$,1 *DWH &RQWURO 6285&( 2YHU 7HPSHUDWXUH /LQHDU &XUUHQW /LPLWHU *$3*&)7 DocID17772 Rev 7 5/37 36 Block diagram and pin descriptions VN5770AKP-E Table 1. Pin descriptions No Name Function 1, 3, 25, 28 DRAIN 3 Drain of switch 3 (low-side switch) 2 INPUT 3 Input of switch 3 (low-side switch) 4, 11 N.C. Not connected 5, 10, 19, 24 VCC Drain of switches 1 and 2 (high-side switches) and power supply voltage 6 GND Ground of switches 1 and 2 (high-side switches) 7 INPUT 1 Input of switch 1 (high-side switches) 8 INPUT 2 Input of switch 2 (high-side switch) 9 CURRENT SENSE 12, 14, 15, 18 DRAIN 4 Drain of switch 4 (low-side switch) 13 INPUT 4 Input of switch 4 (low-side switch) 16, 17 SOURCE 4 Source of switch 4 (low-side switch) 20, 21 SOURCE 2 Source of switch 2 (high-side switch) 22, 23 SOURCE 1 Source of switch 1 (high-side switch) 26, 27 SOURCE 3 Source of switch 3 (low-side switch) Analog current sense pin, it delivers a current proportional to the load current Figure 2. Configuration diagram (top view) '5$,1 ,1387 '5$,1 1& 9&& *1' ,1387 ,1387 &6(16( 9&& 1& '5$,1 ,1387 '5$,1 '5$,1 6285&( 6285&( '5$,1 9&& 6285&( 6285&( 6285&( 6285&( 9&& '5$,1 6285&( 6285&( '5$,1 *$3*36 6/37 DocID17772 Rev 7 VN5770AKP-E Block diagram and pin descriptions Table 2. Thermal data Symbol Parameter Max value Unit Rthj-case Thermal resistance junction-lead (high-side switch) 10 C/W Rthj-case Thermal resistance junction-lead (low-side switch) 7 C/W Rthj-amb Thermal resistance junction-ambient See Figure 39 C/W DocID17772 Rev 7 7/37 36 Absolute maximum ratings 2 VN5770AKP-E Absolute maximum ratings Stressing the device above the rating listed in Table 3 and Table 4 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in Section 2.1: Absolute maximum ratings for extended periods may affect device reliability. 2.1 Absolute maximum ratings Table 3. Dual high-side switch Symbol Parameter Unit VCC DC supply voltage 41 V -VCC Reverse DC supply voltage 0.3 V -IGND DC reverse ground pin current 200 mA IOUT DC output current Internally limited A -IOUT Reverse DC output current -12 A DC input current -1 to 10 mA DC current sense disable input current -1 to 10 mA VCC-41 +VCC V V 32 mJ IIN ICSD VCSENSE Current sense maximum voltage EMAX Maximum switching energy (single pulse) (L = 3.7 mH; RL = 0 ; Vbat = 13.5 V; Tjstart = 150 C; IOUT = IlimL(Typ.)) VESD Electrostatic discharge (Human Body Model: R = 1.5 K; C = 100 pF) - INPUT - CURRENT SENSE - OUTPUT - VCC 4000 2000 5000 5000 VESD Charge device model (CDM-AEC-Q100-011) 750 V Junction operating temperature -40 to 150 C Storage temperature -55 to 150 C Tj Tstg 8/37 Value DocID17772 Rev 7 V V V V VN5770AKP-E Absolute maximum ratings Table 4. Low-side switch Symbol Parameter Value Unit VDSn Drain-source voltage (VINn = 0 V) Internally clamped V VINn Input voltage Internally clamped V IINn Input current +/-20 mA 220 Internally limited A -12 A RIN MINn Minimum input series impedance IDn Drain current IRn Reverse DC output current VESD1 Electrostatic discharge (R = 1.5 K, C = 100 pF) 4000 V VESD2 Electrostatic discharge on output pins only (R = 330 , C = 150 pF) 16500 V 4 W Ptot Total dissipation at Tc = 25 C Tj Operating junction temperature Internally limited C Tc Case operating temperature Internally limited C -55 to 150 C Tstg Storage temperature DocID17772 Rev 7 9/37 36 Electrical characteristics VN5770AKP-E 3 Electrical characteristics 3.1 Electrical characteristics for dual high-side switch Values specified in this section are for 8 V < VCC < 36 V; -40 C < Tj < 150 C, unless otherwise specified (for each channel). Table 5. Power section Symbol Parameter VCC Operating supply voltage VUSD VUSDhyst Test conditions Min. 4.5 13 36 V Undervoltage shutdown 3.5 4.5 V Undervoltage shutdown hysteresis 0.5 V 160 m IOUT = 3 A; Tj = 25 C RON Vclamp IS IL(off) VF Typ. Max. Unit On-state resistance Clamp Voltage IOUT = 3 A; Tj = 150 C 320 m IOUT = 3 A; VCC = 5 V; Tj = 25 C 210 m 46 52 V Off-state; VCC = 13 V; Tj = 25 C; VIN = VOUT = VSENSE = 0 V 2(1) 5(1) A On-state; VCC = 13 V; VIN = 5 V; IOUT = 0 A 3 6 mA IS = 20 mA Supply current Off-state output current(2) Output - VCC diode voltage(2) 41 VIN = VOUT = 0 V; VCC = 13 V; Tj = 25 C 0 3 A VIN = VOUT = 0 V; VCC = 13 V; Tj = 125 C 0 5 A 0.7 V -IOUT = 3 A; Tj = 150 C 1. PowerMOS leakage included 2. For each channel Table 6. Switching (VCC = 13 V) Symbol Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 4.3 (see Figure 3) -- 15 -- s td(off) Turn-off delay time RL = 4.3 (see Figure 3) -- 10 -- s Turn-on voltage slope RL = 4.3 -- See Figure 15 -- V/s (dVOUT/dt)off Turn-off voltage slope RL = 4.3 -- See Figure 17 -- V/s (dVOUT/dt)on 10/37 Parameter WON Switching energy losses during twon RL = 4.3 (see Figure 3) -- 0.16 -- mJ WOFF Switching energy losses during twoff RL = 4.3 (see Figure 3) -- 0.08 -- mJ DocID17772 Rev 7 VN5770AKP-E Electrical characteristics Table 7. Logic input Symbol Parameter Test conditions VIL Input low level voltage IIL Low level input current VIH Input high level voltage IIH High level input current VI(hyst) Input hysteresis voltage VICL Input clamp voltage Min. VIN = 0.9 V Typ. Max. Unit 0.9 V 1 A 2.1 V VIN = 2.1 V 10 0.25 IIN = 1 mA V 5.5 IIN = -1 mA A 7 -0.7 V V Table 8. Protection and diagnostics(1) Symbol Parameter IlimH DC Short circuit current IlimL Short circuit current during thermal cycling TTSD Shutdown temperature Reset temperature TRS Thermal reset of STATUS VDEMAG VON VCC = 13 V Min. Typ. Max. Unit 6 8.5 12 A 12 A 5 V < VCC < 36 V TR THYST Test conditions VCC = 13 V; TR < Tj < TTSD 3.5 150 175 A 200 TRS + 1 TRS + 5 135 Thermal hysteresis (TTSD-TR) Turn-off output voltage clamp IOUT = 1 A; VIN = 0; L = 20 mH Output voltage drop limitation IOUT = 0.03 A; Tj = -40 C to 150 C (see Figure 4) C C C 7 C VCC-41 VCC-46 VCC-52 V 25 mV 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles DocID17772 Rev 7 11/37 36 Electrical characteristics VN5770AKP-E Table 9. Current sense (8V<VCC<16V) Symbol Parameter Test conditions Min. Typ. Max. Unit 850 1450 2120 840 980 1360 2000 1360 1740 K0 IOUT/ISENSE IOUT = 0.08 A; VSENSE = 0.5 V; Tj = -40C to 50C K1 IOUT/ISENSE IOUT = 0.35 A; VSENSE = 0.5V; Tj = -40C to 150C Tj = 25C to 150C K2 IOUT/ISENSE IOUT = 3A; VSENSE = 4V; Tj = -40C to 150C 1200 1270 1350 K3 IOUT/ISENSE IOUT = 4A; VSENSE = 4V; Tj = -40C to 150C 1200 1270 1350 Analog sense current ISENSE0 IOUT = 0A; VSENSE = 0V; VIN = 0V; Tj = -40C to 150C 0 1 A IOUT = 0A; VSENSE = 0V; VIN = 5V; Tj = -40C to 150C 0 2 A IOUT = 5A; RSENSE = 3.9 K 5 VSENSE Max analog sense output voltage VSENSEH Analog sense output voltage V = 13V; RSENSE = 3.9 K in overtemperature condition CC 9 V ISENSEH Analog sense output current V = 13V in overtemperature condition CC 8 mA V tDSENSE2H Delay response time from rising edge of INPUT pin VSENSE<4 V; 0.35 A<Iout<5 A; ISENSE = 90% of ISENSE max (see Figure 5) 70 300 s tDSENSE2L Delay response time from falling edge of INPUT pin VSENSE<4 V; 0.35 A<Iout<5 A; ISENSE = 10% of ISENSE max (see Figure 5) 100 250 s Figure 3. Switching time waveforms 9287Q G9287GW RII G9287GW RQ T 9,1Q WG RQ WG RII W ("1($'5 12/37 DocID17772 Rev 7 VN5770AKP-E Electrical characteristics Figure 4. Output voltage drop limitation 6CC 6OU T 7M R& 7M R& 7M R& 6ON )OU T 9RQ5RQ 7 ("1($'5 Table 10. Truth table Conditions Input Output Sense Normal operation L H L H 0 Nominal Overtemperature L H L L 0 VSENSEH Undervoltage L H L L 0 0 Short circuit to GND L H L L 0 0 Short circuit to VCC L H H H 0 < Nominal Negative output voltage clamp L L 0 Figure 5. Current sense delay characteristics ,1387 /2$'&855(17 6(16(&855(17 W'6(16(+ W'6(16(/ *$3*&)7 DocID17772 Rev 7 13/37 36 Electrical characteristics curves for dual high-side switch 4 VN5770AKP-E Electrical characteristics curves for dual high-side switch Figure 6. Off-state output current Figure 7. High level input current ,LK X$ ,ORII X$ 6IN 6 /FF 3TATE 6CC 6 6IN 6OUT 6 7F & 7F & ("1($'5 ("1($'5 Figure 8. Input clamp voltage Figure 9. Input low level 9LFO 9 9LO 9 LI N M! 7F & 7F & ("1($'5 ("1($'5 Figure 10. Input high level Figure 11. Input hysteresis voltage 9LK\VW 9 9LK 9 7F & 14/37 ("1($'5 DocID17772 Rev 7 7F & ("1($'5 VN5770AKP-E Electrical characteristics curves for dual high-side switch Figure 12. On-state resistance vs Tcase Figure 13. On-state resistance vs VCC 5RQ P2KP 5RQ P2KP )OUT ! 6CC 6 )OUT ! 7F & 7F & 7F & 7F & 7F & Figure 14. Undervoltage shutdown 9XVG 9 ("1($'5 9FF 9 ("1($'5 Figure 15. Turn-on voltage slope G9RXWGW RQ 9PV 6CC 6 2)/H M 7F & Figure 16. ILIMH vs Tcase ("1($'5 7F & ("1($'5 Figure 17. Turn-off voltage slope G9RXWGW RII 9PV ,OLPK $ 6CC 6 6CC 6 2)/H M 7F & ("1($'5 DocID17772 Rev 7 7F & ("1($'5 15/37 36 Electrical characteristics curves for dual high-side switch 4.1 VN5770AKP-E Electrical characteristics for low-side switches Values specified in this section are for -40 C < Tj < 150 C, unless otherwise specified Table 11. Off Symbol Parameter Test conditions Min Typ Max Unit 45 55 V VCLAMP Drain-source clamp voltage VIN = 0 V; ID = 1.5 A 40 VCLTH Drain-source clamp threshold voltage VIN = 0 V; ID = 2 mA 36 VINTH Input threshold voltage VDS = VIN; ID = 1 mA V 0.5 2.5 V 100 150 A 6.8 8 V -0.3 V IISS Supply current from input pin Input-source clamp voltage IIN = 1 mA 6 VINCL IIN = -1 mA -1.0 Zero input voltage drain current (VIN = 0V) VDS = 13 V; VIN = 0 V; Tj = 25 C 30 A IDSS VDS = 25 V; VIN = 0 V 75 A VDS = 0 V; VIN = 5 V Table 12. On Symbol RDS(on) Parameter Test conditions Static drain-source on VIN = 5 V; ID = 3 A; Tj = 25 C resistance VIN = 5 V; ID = 3 A Min Typ Max Unit -- -- 120 m -- -- 240 m Table 13. Dynamic (Tj = 25C, unless otherwise specified) Symbol gfs COSS Parameter Test conditions Min Typ Max Unit Forward transconductance VDD = 13 V; ID = 1.5 A -- 2.5 -- S Output capacitance VDS = 13 V; f = 1 MHz; VIN = 0 V -- 150 -- pF Table 14. Switching (Tj = 25 C, unless otherwise specified) Symbol td(on) tr td(off) tf td(on) tr td(off) tf 16/37 Parameter Test conditions Min Typ Max Unit -- 200 400 ns -- 1.2 2.5 s -- 600 1350 ns Fall time -- 400 1000 ns Turn-on delay time -- 0.80 2.5 s -- 3.7 7.5 s -- 2.6 7.5 s -- 2.3 7.0 s Turn-on delay time Rise time Turn-off delay time Rise time Turn-off delay time VDD = 15 V; ID = 3 A; Vgen = 5 V; Rgen = RIN MINn = 220 VDD = 15 V; ID = 3 A Vgen = 5 V; Rgen = 2.2 K Fall time DocID17772 Rev 7 VN5770AKP-E Electrical characteristics curves for dual high-side switch Table 14. Switching (Tj = 25 C, unless otherwise specified) (continued) Symbol Parameter (dI/dt)on Turn-on current slope Qi Total input charge Test conditions Min Typ Max Unit VDD = 15 V; ID = 3 A; Vgen = 5 V; Rgen = RIN MINn = 220 -- 3.0 A/s VDD = 12 V; ID = 3 A; VIN = 5 V; Igen = 2.13 mA -- 9.0 nC Min Typ Max Unit -- 0.8 -- V -- 400 -- ns -- 200 -- nC -- 1.0 -- A Table 15. Source drain diode Symbol VSD(1) Parameter Test conditions Forward on voltage ISD = 1.5 A; VIN = 0 V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 1.5 A; dI/dt = 12 A/ms; VDD = 30 V; L = 200 H 1. Pulsed: pulse duration = 300s, duty cycle 1.5% Table 16. Protection and diagnostics (-40 C < Tj < 150 C, unless otherwise specified) Symbol Parameter Test conditions Min Typ 6 8.5 Ilim Drain current limit VIN = 5 V; VDS = 13 V tdlim Step response current limit VIN = 5 V; VDS = 13 V Tjsh Overtemperature shutdown 150 Tjrs Overtemperature reset 135 Igf Fault sink current VIN = 5 V; VDS = 13 V; Tj = Tjsh 10 Eas Single pulse avalanche energy Starting Tj = 25 C; VDD = 24 V; VIN = 5 V; Rgen = RIN MINn = 220 ; L = 24 mH 100 DocID17772 Rev 7 Max Unit 12 10 175 A s 200 C C 15 20 mA mJ 17/37 36 Electrical characteristics curves for dual high-side switch 4.2 VN5770AKP-E Electrical characteristics curves for low-side switches Figure 18. Static drain source on resistance Figure 19. Derating curve 5GV RQ PRKPV 4J # 6IN6 4J# 4J# ("1($'5 ,G $ ("1($'5 Figure 20. Transconductance Figure 21. Transfer characteristics ,GRQ $ *IV 6 6DS 6 4J # 4J# 4J# 6DS 6 4J# 4J # 4J # Figure 22. Input voltage vs input charge 6D S6 )D ! ("1($'5 Figure 23. Capacitance variations & S) 9LQ 9 9LQ 9 ("1($'5 ,G $ F -(Z 6IN6 4J Q& 18/37 ("1($'5 DocID17772 Rev 7 9GV 9 ("1($'5 VN5770AKP-E Electrical characteristics curves for dual high-side switch Figure 24. Output characteristics Figure 25. Step response current limit 7GOLP XVHF ,G $ 6IN 6 6IN6 6IN6 2GOH M 6IN 6 9GV 9 Figure 26. Source-drain diode forward characteristics 9VG P9 9GG 9 ("1($'5 ("1($'5 Figure 27. Static drain-source on resistance vs ID 5GV RQ PRKPV 6IN 6 6IN6 4J# 4J# 4J # ,G $ ("1($'5 ,G $ ("1($'5 Figure 28. Static drain-source on resistance vs Figure 29. Static drain-source on resistance vs input voltage (part 1) input voltage (part 2) 5GV RQ PRKPV 5GV RQ PRKPV 4J# )D! 4J # 4J# )D! )D! 4J # )D! )D! )D! )D! 4J# 4J # 9LQ 9 ("1($'5 DocID17772 Rev 7 9LQ 9 ("1($'5 19/37 36 Electrical characteristics curves for dual high-side switch Figure 30. Normalized input threshold voltage vs temperature VN5770AKP-E Figure 31. Normalized on resistance vs temperature 9LQWK 9 5RQ P2KP 6D S6IN )D M! )OUT ! 6CC 6 7F & Figure 32. Current limit vs junction temperature ,OLP $ 6CC 6 6IN 6 7F & 20/37 7F & ("1($'5 DocID17772 Rev 7 ("1($'5 ("1($'5 VN5770AKP-E 5 Application information Application information Figure 33. Typical application schematic ' 9EDWW 9 9FF & = 9] 9!9 ,QSXW 6RXUFH ,QSXW &RQWURO &XUUHQW6HQVH 0 6RXUFH 0LFUR 'UDLQ ,QSXW &RQWURO 0RWRULQGXFXFWDQFH 6RXUFH 'UDLQ HQHUJ\UHFLUFXODWLRQ ,0 ,QSXW &RQWURO 6RXUFH *1' ("1($'5 Note: Mostly motor bridge drivers use a reverse battery protection diode (D) inside supply rail. This diode prevents a reverse current flow back to Vbatt in case the bridge gets disabled via the logic inputs while motor inductance still carries energy. In order to prevent a hazardous overvoltage at circuit supply terminal (Vcc), a blocking capacitor (C) is needed to limit the voltage overshoot. As basic orientation, 50 F per 1 A load current in recommended. In alternative, also a Zener protection (Z) is suitable. Even if a reverse polarity diode is not present, it is recommended to use a capacitor or zener at Vcc because a similar problem appears in case supply terminal of the module has intermittent electrical contact to the battery or gets disconnected while motor is operating. DocID17772 Rev 7 21/37 36 Application information VN5770AKP-E &O RF NZ LVH R $F SH WLY UD WLR H P Q RW RU V WR S WR S LYH P RW RU V 3D VV ZL VH &R RS XQW HU HU DW FO LR RF Q N RW RU V LYH P 3D VV &O RF NZ LVH RS HU D WR S WLR Q Figure 34. Recommended motor operation )NPUT ,QSXW ,QSXW ,QSXW ,QSXW 9] )O\EDFNFODPSHG E\=HQHUGLRGH= )O\EDFNHQHUJ\FKDUJHG )O\EDFNVSLNHGXULQJFURVV LQWRFDSDFLWRU& FXUUHQWSURWHFWLRQWLPH 9FF W ,0 W ,0 'HDGWLPHWRDYRLGFURVVFRQGXFWLRQ ("1($'5 22/37 DocID17772 Rev 7 VN5770AKP-E Application information Figure 35. Waveforms 1250$/23(5$7,21 ,1387 &6B',6 /2$'&855(17 6(16(&855(17 81'(592/7$*( 986'K\VW 9&& 986' ,1387 &6B',6 /2$'&855(17 6(16(&855(17 6+257729&& ,1387 &6B',6 /2$'92/7$*( /2$'&855(17 6(16(&855(17 1RPLQDO 1RPLQDO 29(5/2$'23(5$7,21 7M 75 776' 756 ,1387 &6B',6 ,/,0+ ,/,0/ /2$'&855(17 96(16(+ 6(16(&855(17 WKHUPDOF\FOLQJ FXUUHQW SRZHU OLPLWDWLRQ OLPLWDWLRQ 6+257('/2$' 1250$//2$' *$3*36 DocID17772 Rev 7 23/37 36 Application information 5.1 VN5770AKP-E Maximum demagnetization energy (VCC = 13.5 V) Figure 36. Maximum turn off current versus load inductance ,/0$; $ $ % & $ 6LQJOH3XOVHDW7-VWDUW & % 5HSHWLWLYHSXOVHDW7-VWDUW & & 5HSHWLWLYH3XOVHDW7-VWDUW & / P+ 9,1,/ 'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ W 1RWH 9DOXHVDUHJHQHUDWHGZLWK5/ ,QFDVHRIUHSHWLWLYHSXOVHV7MVWDUW DWWKHEHJLQQLQJRIHDFKGHPDJQHWL]DWLRQ RIHYHU\SXOVHPXVWQRWH[FHHGWKHWHPSHUDWXUH VSHFLILHGDERYHIRUFXUYHV%DQG& *$3*36 24/37 DocID17772 Rev 7 VN5770AKP-E Package and thermal data 6 Package and thermal data 6.1 SO-28 thermal data Figure 37. SO-28 PC board Note: Layout condition of Rth and Zth measurements (PCB FR4 area= 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 mm, Copper areas: from minimum pad layout to 16 cm2). Figure 38. Chipset configuration /2:6,'( &+,3 FKDQQHO 5WK$% +,*+6,'( &+,3 FKDQQHOV 5WK$ 5WK% 5WK$& /2:6,'( &+,3 FKDQQHO 5WK& 5WK%& DocID17772 Rev 7 *$3*36 25/37 36 Package and thermal data VN5770AKP-E Figure 39. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition 5WK U&: 5WK$ 5WK% 5WK& 5WK$% 5WK$& 5WK%& &X$UHD UHIHUWR3&%OD\RXW *$3*36 Note: See Figure 38. For more detailed information see Table 17 and Table 18. Table 17. Thermal calculations in clockwise and anti-clockwise operation in steadystate mode HS1 HS2 LS3 LS4 TjHS12 TjLS3 TjLS4 ON OFF OFF ON PdHS1 x RthHSLS + PdHS1 x RthHS + PdLS4 x PdHS1 x RthHSLS + RthHSLS + Tamb PdLS4 x RthLSLS + Tamb PdLS4 x RthLS + Tamb OFF ON ON OFF PdHS2 x RthHS + PdLS3 x PdHS2 x RthHSLS + RthHSLS + Tamb PdLS3 x RthLS + Tamb PdHS2 x RthHSLS + PdLS3 x RthLSLS + Tamb Table 18. Thermal resistances definitions Parameter Note: 26/37 Definition RthHS = RthHS1 = RthHS2 High-side chip thermal resistance junction to ambient (HS1 or HS2 in ON-state) RthLS = RthLS3 = RthLS4 Low-side chip thermal resistance junction to ambient RthHSLS = RthHS1LS4 = RthHS2LS3 Mutual thermal resistance junction to ambient between highside and low-side chips RthLSLS = RthLS3LS4 Mutual thermal resistance junction to ambient between lowside chips Values dependent on PCB heatsink area. DocID17772 Rev 7 VN5770AKP-E Package and thermal data x Table 19. Single pulse thermal impedance definitions Parameter Note: Definition ZthHS High-side chip thermal impedance junction to ambient ZthLS = ZthLS3 = ZthLS4 Low-side chip thermal impedance junction to ambient ZthHSLS = ZthHS12LS3 = ZthHS12LS4 Mutual thermal impedance junction to ambient between high-side and low-side chips ZthLSLS = ZthLS3LS4 Mutual thermal impedance junction to ambient between lowside chips Values dependent on PCB heatsink area. Table 20. Thermal calculations in transient mode Parameter Note: Definition TjHS12 ZthHS x PdHS12 + ZthHSLS x (PdLS3 + PdLS4) + Tamb TjLS3 ZthHSLS x PdHS12 + ZthLS x PdLS3 + ZthLSLS x PdLS4 + Tamb TjLS4 ZthHSLS x PdHS12 + ZthLSLS x PdLS3 + ZthLS x PdLS4 + Tamb Calculation is valid in any dynamic operating condition. Pd values set by user. Figure 40. SO-28 HSD thermal impedance junction ambient single pulse =7+ U&: )RRWSULQW FP FP FP )RRWSULQW FP +6' FP +V/V' FP WLPH VHF DocID17772 Rev 7 *$3*36 27/37 36 Package and thermal data VN5770AKP-E Figure 41. SO-28 LSD thermal impedance junction ambient single pulse =7+ U&: )RRWSULQW FP FP FP )RRWSULQW FP /6' FP FP /V/V' WLPH VHF Equation 1: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tp T Figure 42. Thermal fitting model of an H-bridge in SO-28 28/37 DocID17772 Rev 7 *$3*36 VN5770AKP-E Package and thermal data Table 21. Thermal parameters 2 Area/island (cm ) Note: Footprint R1 = R7 (C/W) 1 R2 = R8 (C/W) 1.8 R3 = R11 = R17 (C/W) 3.5 R4 (C/W) 13.5 R5 = R13 = R19 (C/W) 10.5 R6 = R14 = R20 (C/W) 62.28 R9 = R15 (C/W) 0.24 R10 = R16 (C/W) 1.2 R12 (C/W) 15.2 R18 (C/W) 15.5 R21 = R22 = R23 (C/W) 150 R24 (C/W) 150 C1 = C7 (W*s/C) 0.0008 C2 = C8 (W*s/C) 0.001 C3 = C11 = C17 (W*s/C) 0.008 C5 = C13 = C19 (W*s/C) 0.2 C6 = C14 = C20 (W*s/C) 1.6 C9 = C15 (W*s/C) 0.00015 C10 = C16 (W*s/C) 0.0005 1 2 6 52.28 44.28 32.28 52.28 44.28 32.28 1.61 1.7 3.25 A blank space means that the value is the same as the previous one. DocID17772 Rev 7 29/37 36 Package information 7 VN5770AKP-E Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 7.1 SO-28 package information Figure 43. SO-28 package outline ' % GGG F $ $ K[ & 6($7,1* 3/$1( PP *$*(3/$1( 3,1 ,'(17,),&$7,21 N $ ( + & / H *$3*36 Table 22. SO-28 mechanical data Dimensions Ref. Millimeters Min. 30/37 Typ. Max. A 2.35 2.65 A1 0.10 0.30 B 0.33 0.51 C 0.23 0.32 D(1) 17.70 18.10 DocID17772 Rev 7 VN5770AKP-E Package information Table 22. SO-28 mechanical data Dimensions Ref. Millimeters Min. E Typ. 7.40 e Max. 7.60 1.27 H 10.0 10.65 h 0.25 0.75 L 0.40 1.27 k 0 8 ddd 0.10 1. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side. DocID17772 Rev 7 31/37 36 Package information 7.2 VN5770AKP-E SO-28 packing information Figure 44. SO-28 tube shipment (no suffix) %DVH4W\ %XON4W\ 7XEHOHQJWK $ % & & % $OOGLPHQVLRQVDUHLQPP $ *$3*36 Figure 45. Reel for SO-28 "DDFTT)PMFBU 4MPU-PDBUJPO NNNJO 8 " / % $ 8 *GQSFTFOU UBQFTMPUJODPSF GPSUBQFTUBSU NNNJOXJEUIY NNNJOEFQUI # 5"1($'5 Table 23. Reel dimensions Description Value(1) Base quantity 1000 Bulk quantity 1000 A (max) 330 B (min) 1.5 C (+0.5, -0.2) 13 D (min) 20.2 N 100 W1 (+2/ -0) 24.4 W2 (max) 30.4 1. All dimensions are in mm. 32/37 DocID17772 Rev 7 VN5770AKP-E Package information Figure 46. SO-28 carrier tape ("1($'5 Table 24. SO-28 carrier tape dimensions Description Value(1) A0 10.90 0.1 B0 18.55 0.1 K0 3.0 0.1 K1 2.6 0.1 F 11.5 0.1 P1 12.0 0.1 D1 1.5 0.1 W 24.0 0.3 1. All dimensions are in mm. DocID17772 Rev 7 33/37 36 Package information VN5770AKP-E Figure 47. SO-28 schematic drawing of leader and trailer tape 34/37 DocID17772 Rev 7 VN5770AKP-E 8 Order codes Order codes Table 25. Device summary Order codes Package SO-28 Tube Tape and reel VN5770AKP-E VN5770AKPTR-E DocID17772 Rev 7 35/37 36 Revision history 9 VN5770AKP-E Revision history Table 26. Document revision history 36/37 Date Revision Changes 11-Nov-2010 1 Initial release. 04-Jan-2012 2 Table 9: Current sense (8V<VCC<16V) - K0 values modified 20-Feb-2012 3 Update Figure 2: Configuration diagram (top view) and Figure 33: Typical application schematic 02-Oct-2012 4 Table 9: Current sense (8V<VCC<16V): - K0: updated values 23-Sep-2013 5 Updated Disclaimer Fixed order code value on the cover page and Table 25: Device summary 25-Feb-2015 6 Updated: - Section 7.1: SO-28 package information; - Tape dimensions in Figure 8: Order codes on page 35. 21-Jul-2015 7 Updated Section 7.2: SO-28 packing information DocID17772 Rev 7 VN5770AKP-E IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. 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