1
®
FN7332.6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004-2005, 2007. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
EL5104, EL5105, EL5204, EL5205, EL5304
700MHz Slew-Enhanced VFAs
The EL5104, EL5105, EL5204, EL5205, and EL5304
represent high speed voltage feedback amplifiers based on
the current feedback amplifier architecture. This gives the
typical high slew rate benefits of a CFA family along with the
stability and ease of use associated with the VFA type
architecture. This family is available in single, dual, and triple
versions, with 200MHz, 400MH z, and 700MHz versions.
This family operates on single 5V or ±5V supplies from
minimum supply current. The EL5104 and EL5204 also
feature an output enable function, which can be use d to put
the output in to a high-impedance mode. This enables the
outputs of multiple amplifiers to be tied together for use in
multiplexing applications.
Features
• Specified for 5V or ±5V applications
• Power-down to 17µA
• -3dB bandwidth = 700MHz
• ±0.1dB bandwidth = 45MHz
• Low supply current = 9.5mA
• Slew rate = 7000V/µs
• Low offset volta g e = 10 mV ma x
• Output current = 160mA
•A
VOL = 1400
• Diff gain/phase = 0.01%/0.02°
• Pb-free plus anneal available (RoHS compliant)
Applications
• Video amplifiers
• PCMCIA applications
•A/D drivers
• Line drivers
• Portable computers
• High speed communications
• RGB applications
• Broadcast equipment
• Active filtering
Data Sheet May 3, 2007
2FN7332.6
May 3, 2007
Pinouts EL5104
(6 LD SOT-23)
TOP VIEW
EL5104
(8 LD SOIC)
TOP VIEW
EL5105
(5 LD SOT-23, SC-70)
TOP VIEW
EL5204
(10 LD MSOP)
TOP VIEW
EL5205
(8 LD SOIC, MSOP)
TOP VIEW
EL5304
(16 LD QSOP)
TOP VIEW
1
2
3
6
4
5
+-
OUT
VS-
IN+
VS+
ENABLE
IN-
1
2
3
4
8
7
6
5
-
+
NC
IN-
IN+
VS-
ENABLE
VS+
OUT
NC
1
2
3
5
4
+-
OUT
VS-
IN+
VS+
IN-
1
2
3
4
10
9
8
7
5 6
OUT
IN-
IN+
VS-
VS+
OUT
IN-
IN+
CE CE
-
+
7
-
+
1
2
3
4
8
7
6
5
-
+
-
+
OUTA
INA-
INA+
VS-
VS+
OUTB
INB-
INB+
1
2
3
4
16
15
14
13
5
6
7
12
11
10
8 9
-
+
-
+
-
+
INA+
CEA
VS-
CEB
INA-
OUTA
VS+
OUTB
INB+
NC
CEC
INC+
INB-
NC
OUTC
INC-
Ordering Information
PART NUMBER PART MARKING TAPE & REEL PACKAGE PKG. DWG. #
EL5104IS 5104IS - 8 Ld SOIC (150 mil) MDP0027
EL5104IS-T7 5104IS 7” 8 Ld SOIC (150 mil) MDP0027
EL5104IS-T13 5104IS 13” 8 Ld SOIC (150 mil) MDP0027
EL5104ISZ (Note) 5104ISZ - 8 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5104ISZ-T7 (Note) 5104ISZ 7” 8 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5104ISZ-T13 (Note) 5104ISZ 13” 8 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5104IW-T7 n 7” (3k pcs) 6 Ld SOT- 23 MDP0038
EL5104IW-T7A n 7” (250 pcs) 6 Ld SOT- 23 MDP0038
EL5104IWZ-T7 (Note) BAEA 7” (3k pcs) 6 Ld SOT-23 (Pb-Free) MDP0038
EL5104IWZ-T7A (Note) BAEA 7” (250 pcs) 6 Ld SOT-23 (Pb-Free) MDP0038
EL5105IC C - 5 Ld SC-70 (1.25mm) P5.049
EL5105IC-T7 C 7” (3k pcs) 5 Ld SC-70 (1.25mm) P5.049
EL5105IC-T7A C 7” (250 pcs) 5 Ld SC-70 (1.25mm) P5.049
EL5105IW-T7 f 7” (3k pcs) 5 Ld SOT-23 MDP0038
EL5105IW-T7A f 7” (250 pcs) 5 Ld SOT-23 MDP0038
EL5105IWZ-T7 (Note) BBMA 7” (3k pcs) 5 Ld SOT- 23 (Pb-Free) MDP0038
EL5104, EL5105, EL5204, EL5205, EL5304
3FN7332.6
May 3, 2007
EL5105IWZ-T7A (Note) BBMA 7” (250 pcs) 5 Ld SOT-23 (Pb-Free) MDP0038
EL5204IY BTAAA - 10 Ld MSOP (3.0mm) MDP0043
EL5204IY-T7 BTAAA 7” 10 Ld MSOP (3.0mm) MDP0043
EL5204IY-T13 BTAAA 13” 10 Ld MSOP (3.0mm) MDP0043
EL5204IYZ (Note) BAAAF - 10 Ld MSOP (3.0mm) (Pb-Free) MDP0043
EL5204IYZ-T7 (Note) BAAAF 7” 10 Ld MSOP (3.0mm) (Pb-Free) MDP0043
EL5204IYZ-T13 (Note) BAAAF 13” 10 Ld MSOP (3.0mm) (Pb-Free) MDP0043
EL5205IS 5205IS - 8 Ld SOIC (150 mil) MDP0027
EL5205IS-T7 5205IS 7” 8 Ld SOIC (150 mil) MDP0027
EL5205IS-T13 5205IS 13” 8 Ld SOIC (150 mil) MDP0027
EL5205ISZ (Note) 5205ISZ - 8 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5205ISZ-T7 (Note) 5205ISZ 7” 8 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5205ISZ-T13 (Note) 5205ISZ 13” 8 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5205IY BVAAA - 8 Ld MSOP (3.0mm) MDP0043
EL5205IY-T7 BVAAA 7” 8 Ld MSOP (3.0mm) MDP0043
EL5205IY-T13 BVAAA 13” 8 Ld MSOP (3.0mm) MDP0043
EL5205IYZ (Note) BAAAG - 8 Ld MSOP (3.0mm) (Pb-free) MDP0043
EL5205IYZ-T7 (Note) BAAAG 7” 8 Ld MSOP (3.0mm) (Pb-free) MDP0043
EL5205IYZ-T13 (Note) BAAAG 13” 8 Ld MSOP (3.0mm) (Pb-free) MDP0043
EL5304IU 5304IU - 16 Ld QSOP (150 mil) MDP0040
EL5304IU-T7 5304IU 7” 16 Ld QSOP (150 mil) MDP0040
EL5304IU-T13 5304IU 13” 16 Ld QSOP (150 mil) MDP0040
EL5304IUZ (Note) 5304IUZ - 16 Ld QSOP (150 mil) (Pb-Free) MDP0040
EL5304IUZ-T7 (Note) 5304IUZ 7” 16 Ld QSOP (150 mil) (Pb-Free) MDP0040
EL5304IUZ-T13 (Note) 5304IUZ 13” 16 Ld QSOP (150 mil) (Pb-Free) MDP0040
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Ordering Information (Continued)
PART NUMBER PART MARKING TAPE & REEL PACKAGE PKG. DWG. #
EL5104, EL5105, EL5204, EL5205, EL5304
4FN7332.6
May 3, 2007
Absolute Maximum Ratings (TA = +25°C) Thermal Information
Supply Voltage between VS+ and GND. . . . . . . . . . . . . . . . . . 13.2V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±4V
Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80mA
VS+ to VS- Maximum Slew Rate . . . . . . . . . . . . . . . . . . . . . . . 1V/µs
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . .+150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
DC Electrical Specifications VS = ±5V, GND = 0V, TA = +25°C, VCM = 0V, VOUT = 0V, VENABLE = GND or OPEN, Unless Otherwise
Specified.
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
VOS Offset Voltage EL5104, EL5105, EL5204, EL5205 -10 3 10 mV
EL5304 -18 5 18 mV
TCVOS Offset Voltage Temperature Coefficient Measured from TMIN to TMAX 10 µV/°C
IB Input Bias Current VIN = 0V 8 30 µA
IOS Input Offset Current VIN = 0V 4 15 µA
TCIOS Input Bias Current Temperature
Coefficient Measured from TMIN to TMAX 50 nA/°C
PSRR Power Supply Rejection Ratio 60 70 dB
CMRR Common Mode Rejection Ratio VCM from -3V to +3V 56 62 dB
CMIR Common Mode Input Range Guaranteed by CMRR test -3 +3 V
RIN Input Resistance Common mode 50 120 kΩ
CIN Input Capacitance SO package 1 pF
IS,ON Supply Current - Enabled Per amplifier 8.5 9.5 11 mA
IS,OFF Supply Current - Shut Down VS+, per amplifier +1 0 +25 µA
VS-, per amplifier -25 17 -1 µA
PSOR Power Supply Operating Range 4 13.2 V
AVOL Open Loop Gain RL = 1kΩ to GND 55 65 dB
RL = 150Ω to GND 60 dB
VOP Positive Output Voltage Swing RL = 150Ω to 0V 3.6 3.8 V
VON Negative Output Voltage Swing RL = 150Ω to 0V -3.8 -3.6 V
IOUT Output Current RL = 10Ω to 0V ±90 ±160 mA
VIH-EN ENABLE Pin Voltage for Power Up (VS+)
-5 (VS+)
-3 V
VIL-EN ENABLE Pin Voltage for Shut Down (VS+)
-1 VS+V
EL5104, EL5105, EL5204, EL5205, EL5304
5FN7332.6
May 3, 2007
Closed Loop AC Electrical Specifications VS = +5V, GND = 0V, TA = +25°C, VCM = +1.5V, VOUT = +1.5V, VCLAMP = +5V,
VENABLE = 0V, AV = +1, RF = 0Ω, RL = 150Ω to GND pin, unless otherwise specified.
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
BW -3dB Bandwidth (VOUT = 200mVP-P)V
S = ±5V, AV = 1, RF = 0Ω700 MHz
SR Slew Rate RL = 100Ω, VOUT = -3V to +3V 2000 3000 7000 V/µs
tR, tFRise Time, Fall Time ±0.1V step 0.4 ns
OS Overshoot ±0.1V step 10 %
tPD Propagation Delay ±0.1V step 0.4 ns
tS0.1% Settling Time VS = ±5V, RL = 500Ω, AV = 1, VOUT = ±2.5V 7 ns
dG Differential Gain AV = 2, RL = 150Ω, VINDC = -1 to +1V 0.01 %
dP Differential Phase AV = 2 , RL = 150Ω, VINDC = -1 to +1V 0.02 °
eNInput Noise Voltage f = 10kHz 10 nV/√Hz
iNInput Noise Current f = 10kHz 54 pA/√Hz
tDIS Disable Time 180 ns
tEN Enable Time 650 ns
IEN Enable Pin Current Enabled, VEN = 0V -1 1 µA
Disabled, VEN = 5V 1 25 µA
EL5104, EL5105, EL5204, EL5205, EL5304
6FN7332.6
May 3, 2007
Typical Performance Curves
FIGURE 1. GAIN vs FREQUENCY (-3dB BANDWIDTH) FIGURE 2. PHASE vs FREQUENCY
FIGURE 3. 0.1dB BANDWIDTH FIGURE 4. GAIN BANDWIDTH PRODUCT
FIGURE 5. GAIN BANDWIDTH PRODUCT vs SUPPLY
VOLTAGES FIGURE 6. GAIN vs FREQUENCY FOR VARIOUS +AV
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G 10G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
VS=±5V
AV=+1
RF=0
RL=500Ω
-3dB BW @ 925MHz
-240
-180
-120
-60
0
60
120
180
240
100k 1M 10M 100M 1G
FREQUENCY (Hz)
PHASE (°)
VS=±5V
AV=+1
RF=0
RL=500Ω
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
1 10 100
FREQUENCY (MHz)
NORMALIZED GAIN (dB)
0.1dB BW @ 39MHz
VS=±5V
AV=+1
RF=0
RL=500Ω
20
30
40
50
60
70
0 1 10 100
FREQUENCY (MHz)
GAIN (dB)
VS=±5V
RL=500Ω
GAIN=40dB or 100
FREQ.=2.64MHz
GAIN BW PRODUCT=2.64x100=264MHz
50
100
150
200
250
300
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGES (±V)
GAIN-BANDWIDTH PRODUCT (MHz)
VS=±5V
RL=500Ω
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
AV=+1
RF=0
VS=±5V
RL=500Ω
AV=+5
RF=1.6k, RG=402
AV=+2
RF=RG=255Ω
EL5104, EL5105, EL5204, EL5205, EL5304
7FN7332.6
May 3, 2007
FIGURE 7. GAIN vs FREQUENCY FOR VARIOUS ±Vs FIGURE 8. GAIN vs FREQUENCY FOR VARIOUS RL (AV=+1)
FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS RL (AV=+2) FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS RL (AV=+5)
FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS CL (AV=+1) FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS CL (AV=+2)
Typical Performance Curves (Continued)
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G 10G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
AV=+1
RF=0
RL=500ΩVS=±6V
VS=±5V
VS=±4V
VS=±3V
VS=±2V -5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G 10G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
RL=1kΩ
VS=±5
RF=0
AV=+1
RL=500Ω
RL=50Ω
RL=75Ω
RL=150Ω
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
RL=1kΩ
VS=±5
RF=255Ω
AV=+2
RL=500Ω
RL=150Ω
RL=75Ω
RL=50Ω
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
RL=500Ω
RL=150Ω
RL=75Ω
RL=50Ω
RL=1kΩ
VS=±5
RF=1600Ω
AV=+5
CL=12pF
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G 10G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
VS=±5
RF=0
AV=+1
CL=22pF
CL=5.6pF
CL=3.3pF
CL=12pF
CL=0pF
RL=500Ω
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
VS=±5
RF=255Ω
AV=+2
RL=500Ω
CL=33pF
CL=22pF
CL=0pF
CL=15pF
CL=8.2pF
EL5104, EL5105, EL5204, EL5205, EL5304
8FN7332.6
May 3, 2007
FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS CL (AV=+5) FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS RF (AV=+1)
FIGURE 15. GAIN vs FREQUENCY FOR VARIOUS RF (AV = +2) FIGURE 16. GAIN vs FREQUENCY FOR VARIOUS RF (AV = +5)
FIGURE 17. GAIN vs FREQUENCY FOR VARIOUS CIN(-)
(AV = +2) FIGURE 18. GAIN vs FREQUENCY FOR VARIOUS CIN(-)
(AV = +5)
Typical Performance Curves (Continued)
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
VS=±5
RF=1600Ω
AV=+5
RL=500Ω
CL=100pF
CL=68pF
CL=39pF
CL=22pF
CL=0pF
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G 10G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
VS=±5
RL=500Ω
AV=+1 RF=100Ω
RF=0
RF=50Ω
RF=25Ω
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
VS=±5
RL=500Ω
AV=+2 RF=604Ω
RF=50Ω
RF=511Ω
RF=402Ω
RF=255Ω
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
VS=±5
RL=500Ω
AV=+5 RF=6kΩ
RF=1kΩ
RF=100Ω
RF=4kΩ
RF=2kΩ
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
CIN=3.9pF
CIN=2.7pF
CIN=1pF
CIN=2.2pF
CIN=0pF
VS=±5
RF=RG=255Ω
AV=+2
RL=500Ω
-5
-4
-3
-2
-1
0
1
2
3
4
5
100k 1M 10M 100M 1G
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
CIN=2.2pF
CIN=0pF
VS=±5
RG=402Ω
AV=+5
RL=1600Ω
CL=15pF
CIN=1.5pF
CIN=4.7pF
CIN=3.3pF
EL5104, EL5105, EL5204, EL5205, EL5304
9FN7332.6
May 3, 2007
FIGURE 19. OPEN LOOP GAIN AND PHASE vs FREQUENCY FIGURE 20. ZOUT vs FREQUENCY
FIGURE 21. CMRR vs FREQUENCY FIGURE 22. PSRR vs FREQUENCY
FIGURE 23. MAX OUTPUT VOLTAGE SWING vs FREQUENCY FIGURE 24. GROUP DELAY vs FREQUENCY
Typical Performance Curves (Continued)
OPEN LOOP GAIN (dB)
70
50
30
10
-10
-30
FREQUENCY (Hz)
1k 10k 100k 1M 100M 1G10M
AV=+2
VS=±5V
FREQUENCY (Hz)
10k 100k 1M 10M 100M
ZOUT (Ω)
100
10
1
0.1
0.01
AV=+5
VS=±5V
FREQUENCY (Hz)
1k 10k 100k 1M 100M 1G10M
CMRR (dB)
-10
-30
-50
-70
-90
-110
VS+
AV=+1
VS=±5V
VS-
PSRR (dB)
10
-10
-30
-50
-70
-90
FREQUENCY (Hz)
1k 10k 100k 1M 100M 1G10M
0
1
2
3
4
5
6
7
8
9
10
100k 1M 10M 100M 1G
FREQUENCY (Hz)
MAX OUTPUT VOLTAGE SWING (VP-P)
VS=±5V
AV=+2
RF=RG=402Ω
RL=500Ω
RL=150Ω
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
100k 1M 10M 100M 1G
FREQUENCY (Hz)
GROUP DELAY (ns)
VS=±5V
AV=+1
RF=0
RL=500Ω
EL5104, EL5105, EL5204, EL5205, EL5304
10 FN7332.6
May 3, 2007
FIGURE 25. INPUT AND OUTPUT ISOLATION FIGURE 26. CHANNEL TO CHANNEL ISOLATION
FIGURE 27. HARMONIC DISTORTION vs FREQUENCY FIGURE 28. TOTAL HARMONIC DISTORTION vs OUTPUT
VOLTAGES
FIGURE 29. TURN-ON TIME FIGURE 30. TURN-OFF TIME
Typical Performance Curves (Continued)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
100k 1M 10M 100M 1G
FREQUENCY (Hz)
ISOLATION (dB)
VS=±5V
AV=+1
RF=0
CHIP DISABLED
INPUT TO OUTPUT
OUTPUT TO INPUT
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
100k 1M 10M 100M 1G
FREQUENCY (Hz)
GAIN (dB)
B IN TO A OUT
A IN TO B OUT
VS=±5V
AV=+1
RF=0
RL=500Ω
This was done on the
NOTE:
EL5205 (dual op amp).
-110
-100
-90
-80
-70
-60
-50
-40
100k 1M 10M 100M
FUNDAMENTAL FREQUENCY (Hz)
HARMONIC DISTORTION (dBc)
VS =±5V
AV=+1
RF=0
RL=500Ω
VOUT=2VP-P
3rd H.D.
2ndH.D.
T.H.D
-100
-90
-80
-70
-60
-50
-40
-30
-20
012345678
OUTPUT VOLTAGES (VP-P)
THD (dBc)
VS =±5V
AV=+5
RG=402Ω
RF=1600Ω
RL=500Ω
CL=15pF FIN = 10MHz
FIN = 1MHz
-3
-2
-1
0
1
2
3
4
5
6
-600 -400 -200 0 200 400 600 800 1000 1200 1400 1600
TIME (ns)
AMPLITUDE (V)
OUTPUT SIGNAL
ENABLE SIGNAL
Vs =±5V
AV=+1
RF=0
RL=500Ω
VOUT=2VP-P
-3
-2
-1
0
1
2
3
4
5
6
-600 -400 -200 0 200 400 600 800 1000 1200 1400 1600
TIME (ns)
AMPLITUDE (V)
OUTPUT SIGNAL
DISABLE SIGNAL
Vs =±5V
AV=+1
RF=0
RL=500Ω
VOUT=2VP-P
EL5104, EL5105, EL5204, EL5205, EL5304
11 FN7332.6
May 3, 2007
FIGURE 31. EQUIVALENT NOISE VOLTAGE vs FREQUENCY FIGURE 32. SMALL SIGNAL STEP RESPONSE_RISE & F ALL
TIME
FIGURE 33. LARGE SIGNAL STEP RESPONSE_RISE & FALL
TIME FIGURE 34. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 35. SLEW RATE vs SUPPLY VOLTAGES FIGURE 36. THIRD ORDER IMD INTERCEPT (IP3)
Typical Performance Curves (Continued)
VS=±5V
FREQUENCY (Hz)
NOISE VOLTAGE (nV/√Hz)
1K
100
10
1
10 100 1k 10k 100k -0.3
-0.2
-0.1
0.0
0.1
0.2
0.3
0.4
0.5
-20 0 20 40 60 80 100 120 140 160 180
TIME (ns)
AMPLITUDE (V)
TRISE=852ps
TFALL = 860ps
Vs =±5V
AV=+1
RF=0
RL=500Ω
VOUT=400mV
-3
-2
-1
0
1
2
3
4
5
-20 0 20 40 60 80 100 120 140 160 180
TIME (ns)
AMPLITUDE (V)
TRISE=958ps
TFALL = 944ps
Vs =±5V
AV=+1
RF=0
RL=500Ω
VOUT=4.0VP-P
0
2
4
6
8
10
12
1.01.52.02.53.03.54.04.55.05.56.0
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
NOTE:
The curve showed positive current.
AV=+1
RF=0
RL=500Ω
The negative current was the same.
1000
1500
2000
2500
3000
3500
4000
4500
5000
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGES (±V)
SLEW RATE (V/µs)
POSITIVE SLEW RATE
NEGATIVE SLEW RATE
AV=+2
RF=RG=255Ω
RL=500Ω
VOUT=4VP-P
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
0.8 0.9 1.0 1.1 1.2
FREQUENCY (MHz)
AMPLITUDE (dBm)
f1=4dBm
@ 0.95MHz
2f1-f2=-72.7dBm
@ 0.85MHz
Delta IM=(4)-(-73)=77dB
IP3=4+(77/2)=42.5dBm
Vs =±5V
AV=+5
RF=1600Ω
RL=100Ω
CL=15pF f2=4.1dBm
@ 1.05MHz
2f2-f1=-73dBm
@ 1.15MHz
EL5104, EL5105, EL5204, EL5205, EL5304
12 FN7332.6
May 3, 2007
FIGURE 37. THIRD ORDER IMD INTERCEPT vs FREQUENCY
FIGURE 38. P ACKAGE POWER DISSIP ATION vs AMBIENT
TEMPERATURE FIGURE 39. PACKAGE POWER DISSIP A TION vs AMBIENT
TEMPERATURE
Typical Performance Curves (Continued)
10
15
20
25
30
35
40
45
50
55
60
110100
FREQUENCY (MHz)
IP3 (dBm)
Vs =±5V
AV=+5
RF=1600Ω
RL=100Ω
CL=15pF
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
POWER DISSIPA TION (W)
1.4
1.2
1
0.4
0.2
0
0.8
0.6
1.087W
543mW
1.136W
SOT23-5/6
θJA=230°C/W
1.116W SO8
θJA=110°C/W
MSOP8/10
θJA=115°C/W
QSOP16
θJA=112°C/W
AMBIENT TEMPERATURE (°C)
0 25 100 125 15050 75 85
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
POWER DISSIPA TION (W)
1
0.8
0.4
0.2
0
0.6
AMBIENT TEMPERATURE (°C)
0 25 100 125 15050 75 85
791mW
SOT23-5/6
θJA=256°C/W
781mW
607mW
488mW
QSOP16
θJA=158°C/W
SO8
θJA=160°C/W
MSOP8/10
θJA=206°C/W
EL5104, EL5105, EL5204, EL5205, EL5304
13 FN7332.6
May 3, 2007
EL5104, EL5105, EL5204, EL5205, EL5304
Mini SO Package Family (MSOP)
1(N/2)
(N/2)+1
N
PLANE
SEATING
N LEADS
0.10 C
PIN #1
I.D.
E1E
b
DETAIL X
3° ±3°
GAUGE
PLANE
SEE DETAIL "X"
c
A
0.25
A2
A1 L
0.25 C A B
D
A
M
B
e
C
0.08 C A B
M
H
L1
MDP0043
MINI SO PACKAGE FAMILY
SYMBOL
MILLIMETERS
TOLERANCE NOTESMSOP8 MSOP10
A1.101.10 Max. -
A1 0.10 0.10 ±0.05 -
A2 0.86 0.86 ±0.09 -
b 0.33 0.23 +0.07/-0.08 -
c0.180.18 ±0.05 -
D 3.00 3.00 ±0.10 1, 3
E4.904.90 ±0.15 -
E1 3.00 3.00 ±0.10 2, 3
e0.650.50 Basic -
L0.550.55 ±0.15 -
L1 0.95 0.95 Basic -
N 8 10 Reference -
Rev. D 2/07
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
14 FN7332.6
May 3, 2007
EL5104, EL5105, EL5204, EL5205, EL5304
Small Outline Package Family (SO)
GAUGE
PLANE
A2
A1 L
L1
DETAIL X 4° ±4°
SEATING
PLANE
eH
b
C
0.010 BMCA
0.004 C
0.010 BMCA
B
D
(N/2)
1
E1
E
NN (N/2)+1
A
PIN #1
I.D. MARK
h X 45°
A
SEE DETAIL “X”
c
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
SYMBOL
INCHES
TOLERANCE NOTESSO-8 SO-14
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -
A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 -
A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -
b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -
c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 -
D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3
E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -
E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3
e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic -
L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -
L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -
h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -
N 8 14 16 16 20 24 28 Reference -
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
15 FN7332.6
May 3, 2007
EL5104, EL5105, EL5204, EL5205, EL5304
SOT-23 Package Family
e1
N
A
D
E
4
321
E1
0.15 DC
2X 0.20 C
2X
e
B0.20 MDC A-B
b
NX
6
2 3
5
SEATING
PLANE
0.10 C
NX
1 3
C
D
0.15 A-BC
2X
A2
A1
H
c
(L1)
L
0.25
0° +3°
-0°
GAUGE
PLANE
A
MDP0038
SOT-23 PACKAGE FAMILY
SYMBOL
MILLIMETERS
TOLERANCESOT23-5 SOT23-6
A 1.45 1.45 MAX
A1 0.10 0.10 ±0.05
A2 1.14 1.14 ±0.15
b 0.40 0.40 ±0.05
c 0.14 0.14 ±0.06
D 2.90 2.90 Basic
E 2.80 2.80 Basic
E1 1.60 1.60 Basic
e 0.95 0.95 Basic
e1 1.90 1.90 Basic
L 0.45 0.45 ±0.10
L1 0.60 0.60 Reference
N 5 6 Reference
Rev. F 2/07
NOTES:
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
2. Plastic interlead protrusions of 0.25mm maximum per side are not
included.
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
6. SOT23-5 version has no center lead (shown as a dashed line).
16 FN7332.6
May 3, 2007
EL5104, EL5105, EL5204, EL5205, EL5304
Quarter Size Outline Plastic Packages Family (QSOP)
0.010 CAB
SEATING
PLANE
DETAIL X
EE1
1(N/2)
(N/2)+1
N
PIN #1
I.D. MARK
b
0.004 C
c
A
SEE DETAIL "X"
A2
4°±4°
GAUGE
PLANE
0.010
L
A1
D
B
H
C
e
A
0.007 CAB
L1
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
SYMBOL
INCHES
TOLERANCE NOTESQSOP16 QSOP24 QSOP28
A 0.068 0.068 0.068 Max. -
A1 0.006 0.006 0.006 ±0.002 -
A2 0.056 0.056 0.056 ±0.004 -
b 0.010 0.010 0.010 ±0.002 -
c 0.008 0.008 0.008 ±0.001 -
D 0.193 0.341 0.390 ±0.004 1, 3
E 0.236 0.236 0.236 ±0.008 -
E1 0.154 0.154 0.154 ±0.004 2, 3
e 0.025 0.025 0.025 Basic -
L 0.025 0.025 0.025 ±0.009 -
L1 0.041 0.041 0.041 Basic -
N 16 24 28 Reference -
Rev. F 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
17
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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For information regarding Intersil Corporation and its products, see www.intersil.com
FN7332.6
May 3, 2007
EL5104, EL5105, EL5204, EL5205, EL5304
Small Outline Transistor Plastic Packages (SC70-5)
D
e1
E
E1
C
L
C
C
L
eb
C
L
A2
AA1
C
L
0.20 (0.008) M
0.10 (0.004) C
C
-C-
SEATING
PLANE
45
123
VIEW C
VIEW C
L
R1
R
4X θ1
4X θ1
GAUGE PLANE
L1
SEATING
αL2
C
PLANE
c
BASE METAL
WITH
c1
b1
PLATING
b
P5.049
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.031 0.043 0.80 1.10 -
A1 0.000 0.004 0.00 0.10 -
A2 0.031 0.039 0.80 1.00 -
b 0.006 0.012 0.15 0.30 -
b1 0.006 0.010 0.15 0.25
c 0.003 0.009 0.08 0.22 6
c1 0.003 0.009 0.08 0.20 6
D 0.073 0.085 1.85 2.15 3
E 0.071 0.094 1.80 2.40 -
E1 0.045 0.053 1.15 1.35 3
e 0.0256 Ref 0.65 Ref -
e1 0.0512 Ref 1.30 Ref -
L 0.010 0.018 0.26 0.46 4
L1 0.017 Ref. 0.420 Ref. -
L2 0.006 BSC 0.15 BSC
α0o8o0o8o-
N5 55
R 0.004 - 0.10 -
R1 0.004 0.010 0.15 0.25
Rev. 2 9/03
NOTES:
1. Dimensioning and tolerances per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO-203AA.
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only.
