1PS2038B 01/10/01
Logic Block Diagram
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Product Features:
Common Features:
• PI74FCT16543T, PI74FCT162543T and PI74FCT162H543T
are high-speed,
low power devices with high current drive.
•VCC = 5V ±10%
• Hysteresis on all inputs
• Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
PI74FCT16543T Features:
• High output drive: IOH = –32 mA; IOL = 64 mA
• Power off disable outputs permit “live insertion”
• Typical VOLP (Output Ground Bounce) < 1.0V
at VCC = 5V, TA = 25°C
PI74FCT162543T Features:
• Balanced output drivers: ±24 mA
• Reduced system switching noise
• Typical VOLP (Output Ground Bounce) < 0.6V
at VCC = 5V, TA = 25°C
PI74FCT162H543T Features:
•Bus Hold retains last active state during 3-state
• Eliminates the need for external pull-up resistors
Product Description:
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-
duced in the Company’s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16543T, PI74FCT162543T and PI74FCT162H543T are 16-
bit latched transceivers organized with two sets of eight
D-type latches with separate input and output controls for each set.
For data flow from A to B, for example, the A-to-B Enable
(xCEAB) input must be LOW in order to enter data from xAx or to
take data from xBx, as indicated in the Truth Table. With xCEAB
LOW, a LOW signal makes the A-to-B latches transparent; a
subsequent LOW-to-HIGH transition of the xLEAB signal puts the
A latches in the storage mode and their outputs no longer change the
A inputs. With xCEAB and xOEAB both LOW, the 3-state B output
buffers are active and reflect the data present at the output of the A
latches. Control of data from B to A is similar, but uses the xCEBA,
xLEBA, and xOEBA inputs.
The PI74FCT16543T output buffers are designed with a Power-Off
disable allowing “live insertion”of boards when used as backplane
drivers.
The PI74FCT162543T has ±24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
The PI74FCT162H543T has “Bus Hold” which retains the input’s
last state whenever the input goes to high-impedance preventing
“floating” inputs and eliminating the need for pull-up/down
resistors.
PI74FCT16543T
PI74FCT162543T
PI74FCT162H543T
Fast CMOS 16-Bit
Latched Transceivers
1
B
0
D
C
1
A
0
TO 7 OTHER CHANNELS
D
C
1
LEAB
1
CEAB
1
OEAB
1
LEBA
1
CEBA
1
OEBA
2
B
0
D
C
2
A
0
TO 7 OTHER CHANNELS
D
C
2
LEAB
2
CEAB
2
OEAB
2
LEBA
2
CEBA
2
OEBA
PI74FCT16543/162543/162H543T
16-BIT LATCHED TRANSCEIVERS
2PS2038B 01/10/01
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1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
25
26
27
28
32
31
30
29
1
OEAB
1
LEAB
1
CEAB
GND
1
A
0
1
A
1
VCC
1
A
2
1
A
3
1
A
4
GND
1
A
5
1
A
6
1
A
7
2
A
0
2
A
1
2
A
2
GND
2
A
3
2
A
4
2
A
5
V
CC
2
A
6
2
A
7
GND
2
CEAB
2
LEAB
2
OEAB
1
OEBA
1
LEBA
1
CEBA
GND
1
B
0
1
B
1
VCC
1
B
2
1
B
3
1
B
4
GND
1
B
5
1
B
6
1
B
7
2
B
0
2
B
1
2
B
2
GND
2
B
3
2
B
4
2
B
5
V
CC
2
B
6
2
B
7
GND
2
CEBA
2
LEBA
2
OEBA
Product Pin Description
Pin Name Description
xOEAB A-to-B Output Enable Input (Active LOW)
xOEBA B-to-A Output Enable Input (Active LOW)
xCEAB A-to-B Enable Input (Active LOW)
xCEBA B-to-A Enable Input (Active LOW)
xLEAB A-to-B Latch Enable Input (Active LOW)
xLEBA B-to-A Latch Enable Input (Active LOW)
xAx A-to-B Data Inputs or B-to-A 3-State Outputs(1)
xBx B-to-A Data Inputs or B-to-A 3-State Outputs(1)
GND Ground
VCC Power
Latch Output
Inputs Status Buffers
XCEAB XLEAB XOEAB XAX TO XBXXBX
H X X Storing High Z
X H X Storing X
X X H X High Z
L L L Transparent Current A Inputs
L H L Storing Previous* A Inputs
Truth Table(1)
Notes:
1. *Before xLEAB LOW-to-HIGH Transistion
H = High Voltage Level
L = Low Voltage Level
X = Don’t Care or Irrelevant
Z = High Impedance
2. A-to-B data flow shown. B-to-A flow control is the same,
except using xCEBA, xLEBA, and xOEBA.
Note: 1.For the PI74FCT162H543T, these pins have “Bus
Hold.” All other pins are standard, outputs, or I/Os.
Product Pin Configuration
56-PIN
V56
A56
PI74FCT16543/162543/162H543T
16-BIT LATCHED TRANSCEIVERS
3PS2038B 01/10/01
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DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 10%)
Parameters Description Test Conditions(1) Min. Typ(2) Max. Units
VIH Input HIGH Voltage Guaranteed Logic HIGH Level 2.0 V
VIL Input LOW Voltage Guaranteed Logic LOW Level 0.8 V
IIH Input HIGH Current Standard Input, VCC = Max. VIN = VCC 1µA
IIH Input HIGH Current Standard I/O, VCC = Max. VIN = VCC 1µA
IIH Input HIGH Current Bus Hold Input(4), VCC = Max. VIN = VCC ±100 µA
IIH Input HIGH Current Bus Hold I/O(4), VCC = Max. VIN = VCC ±100 µA
IIL Input LOW Current Standard Input, VCC = Min. VIN = GND –1 µA
IIL Input LOW Current Standard I/O, VCC = Min. VIN = GND –1 µA
IIL Input LOW Current Bus Hold Input(4), VCC = Min. VIN = GND ±100 µA
IIL Input LOW Current Bus Hold I/O(4), VCC = Min. VIN = GND ±100 µA
IBHH Bus Hold Bus Hold Input(4), VCC = Min. VIN = 2.0V –50 µA
IBHL Sustain Current VIN = 0.8V +50
IOZH(5) High-Impedance VCC = Max. VOUT = 2.7V 1 µA
IOZL(5) Output Current VCC = Max. VOUT = 0.5V –1 µA
(3-STATE OUTPUTS)
VIK Clamp Diode Voltage VCC = Min., IIN = –18 mA –0.7 –1.2 V
IOS Short Circuit Current VCC = Max.(3), VOUT = GND –80 –140 –200 mA
IOOutput Drive Current VCC = Max.(3), VOUT = 2.5V –50 –180 mA
VHInput Hysteresis 100 mV
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature.................................................................... –65°C to +150°C
Ambient Temperature with Power Applied ....................................–40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) ..............–0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only)........... –0.5V to +7.0V
DC Input Voltage ............................................................................ –0.5V to +7.0V
DC Output Current.....................................................................................120 mA
Power Dissipation ..........................................................................................1.0W
Note:
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Pins with Bus Hold are identified in the pin description.
5. This specification does not apply to bi-directional functionalities with Bus Hold.
PI74FCT16543/162543/162H543T
16-BIT LATCHED TRANSCEIVERS
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PI74FCT16543T Output Drive Characteristics (Over the Operating Range)
Parameters Description Test Conditions(1) Min. Typ(2) Max. Units
VOH Output HIGH Voltage VCC = Min., VIN = VIH or VIL IOH = –3.0 mA 2.5 3 .5 V
IOH = –15.0 mA 2.4 3.5
IOH = –32.0 mA 2.0 3.0
VOL Output LOW Voltage VCC = Min., VIN = VIH or VIL IOL = 64 mA 0.2 0.55 V
IOFF Power Down Disable VCC = 0V, VIN or VOUT ≤≤
≤≤
≤ 4.5V — — ±100 µA
PI74FCT162543T/162H543T Output Drive Characteristics (Over the Operating Range)
Parameters Description Test Conditions(1) Min. Typ(2) Max. Units
VOH Output HIGH Voltage VCC = Min., VIN = VIH or VIL IOH = –24.0 mA 2.4 3.3 V
VOL Output LOW Voltage VCC = Min., VIN = VIH or VIL IOL = 24 mA 0.3 0.55 V
IODL Output LOW Current VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) 60 115 150 mA
IODH Output HIGH Current VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) –60 –115 –150 mA
Notes:
1. For Max. or Min.conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
Capacitance (TA = 25°C, f = 1 MHz)
Parameters(4) Description Test Conditions Typ Max. Units
CIN Input Capacitance VIN = 0V 4.5 6 pF
COUT Output Capacitance VOUT = 0V 5.5 8 pF
PI74FCT16543/162543/162H543T
16-BIT LATCHED TRANSCEIVERS
5PS2038B 01/10/01
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Power Supply Characteristics
Parameters Description Test Conditions(1) Min. Typ(2) Max. Units
ICC Quiescent Power VCC = Max. VIN = GND or VCC 0.1 500 µA
Supply Current
∆ICC Supply Current per VCC = Max. VIN = 3.4V(3) 0.5 1.5 mA
Input @ TTL HIGH
ICCD Supply Current per VCC = Max., Outputs Open VIN = VCC 60 100 µA/
Input per MHz(4) xCEAB & xOEAB = GND VIN = GND MHz
xCEBA = VCC
One Bit Toggling
50% Duty Cycle
ICTotal Power Supply VCC = Max., VIN = VCC 0.6 1.5(5) mA
Current(6) Outputs Open VIN = GND
fI = 10 MHZ
50% Duty Cycle
xLEAB, xCEAB, and VIN = 3.4V 0.9 2.3(5)
xOEAB = GND VIN = GND
xCEBA = VCC
One Bit Toggling
VCC = Max., VIN = VCC 2.4 4.5(5)
Outputs Open VIN = GND
fI = 2.5 MHZ
50% Duty Cycle
xLEAB, xCEAB, and VIN = 3.4V 6.4 16.5(5)
xOEAB = GND VIN = GND
xCEBA = VCC
16 Bits Toggling
Notes:
1. For Max. or Min. conditions , use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. IC =IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fI = Input Frequency
NI = Number of Inputs at fI
All currents are in milliamps and all frequencies are in megahertz.
PI74FCT16543/162543/162H543T
16-BIT LATCHED TRANSCEIVERS
6PS2038B 01/10/01
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PI74FCT16543T Switching Characteristics over Operating Range
16543T 16543AT 16543CT 16543DT 16543ET
Com. Com. Com. Com. Com.
Parameters Description Conditions
(1)
Min Max Min Max Min Max Min Max Min Max Unit
t
PLH
Propagation Delay C
L
= 50 pF 2.5 8.5 2.5 6.5 2.5 5.3 2.5 4.4 1.5 3.4 ns
t
PHL
Transparent Mode R
L
= 500Ω
xAx to xBx or xBx to xAx
t
PLH
Propagation Delay 2.5 12.5 2.5 8.0 2.5 7.0 2.5 5.0 1.5 3.7 ns
t
PHL
xLEBA to xAx, xLEAB to xBx
t
PZH
Output Enable Time 2.0 12.0 2.0 9.0 2.0 8.0 2.0 5.4 1.5 4.8 ns
t
PZL
xOEBA or xOEAB to
xAx or xBx
t
PHZ
Output Disable Time
(3)
2.0 9.0 2.0 7.5 2.0 6.5 2.0 4.3 1.5 4.0 ns
t
PLZ
xOEBA or xOEAB to xAx or xBx
t
SU
Setup Time HIGH or LOW 3.0 — 2.0 — 2.0 — 2.0 — 1.0 — ns
xAx or xBx to xLEAB or xLEBA
t
H
Hold Time HIGH or LOW 2.0 — 2.0 — 2.0 — 1.5 — 1.0 — ns
xAx or xBx to xLEAB or xLEBA
t
W
xLEAB or xLEBA Pulse Width 5.0 — 5.0 — 5.0 — 3.0 — 3.0 — 3.0 ns
LOW
(3)
t
SK
(o) Output Skew
(4)
— 0.5 — 0.5 — 0.5 — 0.5 — 0.5 ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
4. Skew between any two outputs, of the same package, switching in the same direction.
This parameter is guaranteed by design.
PI74FCT162543T Switching Characteristics over Operating Range
162543T 162543AT 162543CT 162543DT 162543ET
Com. Com. Com. Com. Com.
Parameters Description Conditions
(1)
Min Max Min Max Min Max Min Max Min Max Unit
t
PLH
Propagation Delay C
L
= 50 pF 2.5 8.5 2.5 6.5 2.5 5.3 2.5 4.4 1.5 3.4 ns
t
PHL
Transparent Mode R
L
= 500Ω
xAx to xBx or xBx to xAx
t
PLH
Propagation Delay 2.5 12.5 2.5 8.0 2.5 7.0 2.5 5.0 1.5 3.7 ns
t
PHL
xLEBA to xAx, xLEAB to xBx
t
PZH
Output Enable Time 2.0 12.0 2.0 9.0 2.0 8.0 2.0 5.4 1.5 4.8 ns
t
PZL
xOEBA or xOEAB to xAx or xBx
t
PHZ
Output Disable Time
(3)
2.0 9.0 2.0 7.5 2.0 6.5 2.0 4.3 1.5 4.0 ns
t
PLZ
xOEBA or xOEAB to xAx or xBx
t
SU
Setup Time HIGH or LOW 3.0 — 2.0 — 2.0 — 2.0 — 1.0 — ns
xAx or xBx to xLEAB or xLEBA
t
H
Hold Time HIGH or LOW 2.0 — 2.0 — 2.0 — 1.5 — 1.0 — ns
xAx or xBx to xLEAB or xLEBA
t
W
xLEAB or xLEBA Pulse Width 5.0 — 5.0 — 5.0 — 3.0 — 3.0 — 3.0 ns
LOW
(3)
t
SK
(o) Output Skew
(4)
— 0.5 — 0.5 — 0.5 — 0.5 — 0.5 ns
PI74FCT16543/162543/162H543T
16-BIT LATCHED TRANSCEIVERS
7PS2038B 01/10/01
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PI74FCT162H543T Switching Characteristics over Operating Range
162H543T 162H543AT 162H543CT 162H543DT 162H543ET
Com. Com. Com. Com. Com.
Parameters Description Conditions
(1)
Min Max Min Max Min Max Min Max Min Max Unit
t
PLH
Propagation Delay C
L
= 50 pF 2.5 8.5 2.5 6.5 2.5 5.3 2.5 4.4 1.5 3.4 ns
t
PHL
Transparent Mode R
L
= 500Ω
xAx to xBx or xBx to xAx
t
PLH
Propagation Delay 2.5 12.5 2.5 8.0 2.5 7.0 2.5 5.0 1.5 3.7 ns
t
PHL
xLEBA to xAx, xLEAB to xBx
t
PZH
Output Enable Time 2.0 12.0 2.0 9.0 2.0 8.0 2.0 5.4 1.5 4.8 ns
t
PZL
xOEBA or xOEAB to
xAx or xBx
t
PHZ
Output Disable Time
(3)
2.0 9.0 2.0 7.5 2.0 6.5 2.0 4.3 1.5 4.0 ns
t
PLZ
xOEBA or xOEAB to xAx or xBx
t
SU
Setup Time HIGH or LOW 3.0 — 2.0 — 2.0 — 2.0 — 1.0 — ns
xAx or xBx to xLEAB or xLEBA
t
H
Hold Time HIGH or LOW 2.0 — 2.0 — 2.0 — 1.5 — 1.0 — ns
xAx or xBx to xLEAB or xLEBA
t
W
xLEAB or xLEBA Pulse Width 5.0 — 5.0 — 5.0 — 3.0 — 3.0 — 3.0 ns
LOW
(3)
t
SK
(o) Output Skew
(4)
— 0.5 — 0.5 — 0.5 — 0.5 — 0.5 ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
