DS04-27232-3Ea
FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©2005-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2005.11
ASSP For Power Management Applications
(DC/DC Converter for DSC/Camcorder)
4
-c h
DC/DC Converter IC
MB39A102
■DESCRIPTION
The MB39A102 is a 4-channel DC/DC conv erter IC using pulse width modulation (PWM). This IC is ideal for up
conversion, down conversion, and up/down conversion.
4ch is built in TSSOP-30P/BCC-32P package. Each channel can be controlled, and soft-start.
This is an ideal power supply for high-performance portable devices such as digital still cameras.
■FEATURES
• Supports fo r down-conversion and up/down Zeta conversion (CH1 to CH3)
• Supports for up-conversion and up/down Sepic conversion (CH4)
• Power supply voltage range : 2.5 V to 11 V
• Reference voltage : 2.0 V ± 1 %
• Error amplifier threshold voltage : 1.24 V ± 1.5 %
• Built-in totem-pole type output for MOS FET
• Built-in soft-start circuit without load dependence
• High-frequency operation capability : 1.5 MHz (Max)
• External short-circuit detection capability by −INS terminal
■PACKAGES
30-pin plastic TSSOP 32-pad plastic BCC
(FPT-30P-M04) (LCC-32P-M15)
MB39A102
2
■PIN ASSIGNMENTS
(Continued)
(TOP VIEW)
(FP T -3 0 P -M04)
CS2
−INE2
FB2
DTC2
VCC
CTL
VREF
RT
CT
GND
CSCP
DTC3
FB3
−INE3
CS3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CS1
−INE1
FB1
DTC1
VCCO
OUT1
OUT2
OUT3
OUT4
GNDO
−INS
DTC4
FB4
−INE4
CS4
MB39A102
3
(Continued)
(TOP VIE W)
(Penetration diagram from surface)
(LCC-32P-M15)
N.C. 1 32
DTC2
31 29 2830 27 26
VCC 2
CTL 3
VREF 4
RT 5
CT 6
GND 7
CSCP 8
N.C.
DTC1
VCCO
OUT1
OUT2
OUT3
OUT4
GNDO
−INS
DTC4910
DTC3
FB2FB3
−INE2−INE3
CS2CS3
CS1CS4
−INE1−INE4
FB1FB4
11 12 13 14 15 16
25
24
23
22
21
20
19
18
17
MB39A102
4
■PIN DESCRIPTION
Block Pin No. Symbol I/O Descriptions
TSSOP BCC
CH1
27 25 DTC1 I Dead time control terminal
28 26 FB1 O Error amplifier output terminal
29 27 −INE1 I Error amplifier inverted input terminal
30 28 CS1 Soft-start capacitor connection terminal
25 23 OUT1 O Output terminal
CH2
4 32 DTC2 I Dead time control terminal
3 31 FB2 O Error amplifier output terminal
230−INE2 I Error amplifier inverted input terminal
129CS2 Soft-start capacitor connection terminal
24 22 OUT2 O Output terminal
CH3
12 10 DTC3 I Dead time control terminal
13 11 FB3 O Error amplifier output terminal
14 12 −INE3 I Error amplifier inverted input terminal
15 13 CS3 Soft-start capacitor connection terminal
23 21 OUT3 O Output terminal
CH4
19 17 DTC4 I Dead time control terminal
18 16 FB4 O Error amplifier output terminal
17 15 −INE4 I Error amplifier inverted input terminal
16 14 CS4 Soft-start capacitor connection terminal
22 20 OUT4 O Output terminal
OSC 96 CT Triangular wave frequency setting capacitor
connection terminal
85 RT Triangular wave frequency setting resistor
connection terminal
Control
6 3 CTL I Power supply and control terminal
11 8 CSCP Short-circuit detection circuit capacitor connection
terminal
20 18 −INS I Short-circuit detection comparator inverted input
terminal
Power
26 24 VCCO Output bloc k power supply terminal
52VCCPower supply terminal
7 4 VREF O Reference voltage output terminal
21 19 GNDO Output block ground terminal
10 7 GND Ground terminal
MB39A102
5
■BLO C K DIAGR AM
VCCO
OUT1
OUT2
OUT3
OUT4
GNDO
VCC
CTL
−INE1
CS1
FB1
DTC1
−INE2
CS2
FB2
DTC2
−INE3
CS3
FB3
DTC3
−INE4
CS4
−INS
CSCP
FB4
DTC4
VREF
Pch
CH1
CH2
CH3
CH4
Error
Amp1 PWM
Comp.1 Drive1
12 µA
1.24 V
−
+
+−
+
+
IO = 130 mA
at VCCO = 4 V
Pch
Error
Amp2 Drive2
12 µA−
+
+−
+
+
IO = 130 mA
at VCCO = 4 V
Pch
Error
Amp3 Drive3
12 µA−
+
+−
+
+
IO = 130 mA
at VCCO = 4 V
VREF
Nch
Error
Amp4
SCP
Comp.
Drive4
SCP
OSC
UVLO
RT CT VREF
2.0 V
VREF VR1 Power
ON/OFF
CTL
bias
GND
12 µA
83 kΩ
1 V
0.9 V
0.4 V
−
+
+
−
+
−
+
+
IO = 130 mA
at VCCO = 4 V
29
30
28
27
2
1
3
4
14
15
13
12
17
16
18
19
20
11
8 9 7 10
6
5
21
22
23
24
25
26
VREF
1.24 V
VREF
1.24 V
VREF
1.24 V
PWM
Comp.2
PWM
Comp.3
PWM
Comp.4
Threshold voltage
accuracy ±1.5% L priority
Threshold voltage
accuracy ±1.5%
L priority
Threshold voltage
accuracy ±1.5%
L priority
Threshold voltage
accuracy ±1.5%
L priority
L priority
L priority
H:
at SCP
H:UVLO
release
Accuracy
±1%
Error Amp Reference
Error Amp Power Supply
SCP Comp. Power Supply
L priority
L priority
1.24 V
H : ON (Power/ ON)
L : OFF (Standby mode)
VTH = 1.4 V
MB39A102
6
■ABSOLUTE MAXIMUM RATINGS
* : The packages are mounted on the epoxy board (10 cm × 10 cm).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■RECOMMENDED OPERATING CONDITIONS
* : See “■ SETTING THE TRIANGULAR OSCILLATION FREQUENCY”.
Note : Pin numbers referred after this part are present on TSSOP-30P PKG.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
representatives beforehand.
Parameter Symbol Condition Rating Unit
Min Max
Power supply voltage VCC VCC, VCCO terminals 12 V
Output current IOOUT1 to OUT4 terminals 20 mA
Output peak current IOP OUT1 to OUT4 terminals
Duty ≤ 5% (t = 1/fOSC×Duty) 400 mA
Power dissipation PDTa ≤ +25 °C (TSSOP-30P) 1390* mW
Ta ≤ +25 °C (BCC-32P) 980* mW
Storage temperature TSTG −55 +125 °C
Parameter Symbol Condition Value Unit
Min Typ Max
Power supply voltage VCC VCC, VCCO terminals 2.5 4 11 V
Reference voltage output current IREF VREF terminal −10mA
Input voltage VINE −INE1 to −INE4 terminals 0 VCC − 0.9 V
−INS terminal 0 VREF V
VDTC DTC1 to DTC4 terminals 0 VREF V
Control input voltage VCTL CTL terminal 0 11 V
Output current IOOUT1 to OUT4 terminals −15 +15 mA
Osci llati on fre que nc y fOSC * 100 500 1500 kHz
Timing capacitor CT39 100 560 pF
Timing resistor RT11 24 130 kΩ
Soft-start capacitor CSCS1 to CS4 terminals 0.1 1.0 µF
Short detection capacitor CSCP 0.1 1.0 µF
Referenc e vo ltag e outpu t
capacitor CREF 0.1 1.0 µF
Operating ambient temperature Ta −30 +25 +85 °C
MB39A102
7
■ELECTRICAL CHARACTERISTICS (VCC = VCCO = 4 V, Ta = +25 °C)
(Continued)
Parameter Symbol Pin No Conditions Value Unit
Min Typ Max
Reference
voltage
block [R ef]
Output voltage VREF 71.98 2.00 2.02 V
Output voltage
temperature
variation
∆VREF/
VREF 7Ta = −30 °C to +85 °C 0.5* %
Input sta bil it y Line 7 VCC = 2.5 V to 11 V −10 +10 mV
Load sta bil it y Load 7 VR EF = 0 mA to −1 mA −10 +10 mV
Under
voltage lockout
protection circuit
block [UVL O ]
Threshold
voltage VTH 25 VCC = 1.7 1.8 1.95 V
Hysteresis
width VH25 0.05 0.1 0.2 V
Short comparator
dete ction blo ck
[SCP]
Threshold
voltage VTH 11 0.65 0.70 0.75 V
Input so urce
current ICSCP 11 −1.4 −1.0 −0.6 µA
Reset voltage VRST 25 VREF = 1.5 1.7 1.9 V
Triangular
wave oscillator
block [OSC]
Oscillation
frequency fOSC 22, 23, 24, 25 CT = 100 pF, RT = 24 kΩ450 500 550 kHz
Frequency
temperature
variation
∆fOSC/
fOSC 22, 23, 24, 25 Ta = −30 °C to +85 °C1* %
Soft-
start
block
[CS]
Charge current ICS 1, 15, 16, 30 CS1 to CS4 = 0 V −16 −12 −8µA
Error amplifier block
[Error Amp1 to Error Amp4]
Threshold
voltage VTH 3, 13, 18, 28 FB1 to FB4 = 0.65 V 1.222 1.240 1.258 V
Input bias
current IB2, 14, 17, 29 −INE1 to −INE4 = 0 V −120 −30 nA
Voltage gain AV3, 13 , 18, 28 DC 100* dB
Frequency
bandwidth BW 3, 13, 18, 28 AV = 0 dB 1.6* MHz
Output voltage VOH 3, 13, 18, 28 1.7 1.9 V
VOL 3, 13, 18, 28 40 200 mV
Output source
current ISOURCE 3, 13, 18, 28 FB1 to FB4 = 0.65 V −2−1mA
Output sink
current ISINK 3, 13, 18, 28 FB1 to FB4 = 0.65 V 150 200 µA
MB39A102
8
(Continued) (VCC = VCCO = 4 V, Ta = +25 °C)
*: Standard design value.
Parameter Symbol Pin No. Conditions Value Unit
Min Typ Max
PWM comparator
block
[PWM Comp.1 to
PWM Comp.4]
Threshold voltage VT0 22, 23, 24, 25 Duty cycle = 0 %0.3 0.4 V
VT100 22, 23, 24, 25 Duty cycle = 100 %0.9 1.0 V
Input current IDTC 4, 12, 19, 27 DTC1 to DTC4 = 0.4 V −2.0 −0.6 µA
Output block
[Drive1 to Drive4]
Output source
current ISOURCE 22, 23, 24, 25 Duty ≤ 5 %
(t = 1/fOSC×Duty)
OUT1 to OUT4 = 0 V −130 −75 mA
Output sink current ISINK 22, 23, 24, 25 Duty ≤ 5 %
(t = 1/fOSC×Duty)
OUT1 to OUT4 = 4 V 75 120 mA
Output ON
resistance ROH 22, 23, 24, 25 OUT1 to OUT4 = −15 mA 18 27 Ω
ROL 22, 23, 24, 25 OUT1 to OUT4 = 15 mA 18 27 Ω
Short detection
comparator
block
[SCP Comp.]
Threshold voltage VTH 25 0.97 1.00 1.03 V
Input bias current IB20 −INS = 0 V −29 −24 −21 µA
Control block
[CTL]
CTL input voltage VIH 6 IC Active mode 1.7 11 V
VIL 6 IC Standby mode 0 0.8 V
Input current ICTLH 6CTL = 3 V 5 30 60 µA
ICTLL 6CTL = 0 V 1µA
General
Standby current ICCS 5CTL = 0 V 02µA
ICCSO 26 CTL = 0 V 02µA
Power supply
current ICC 5CTL = 3 V 2.1 4.5 mA
MB39A102
9
■TYPICAL CHARACTERISTICS
(Continued)
Ta = +25 °C
CTL = 3 V
5
4
3
2
1
0024681012
Ta = +25 °C
CTL = 3 V
VREF= 0 mA
5
4
3
2
1
0024681012
VCC = 4 V
CTL = 3 V
VREF= 0 mA
2.05
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
1.96
1.95
−40 −20 0 20 40 60 80 100
Ta = +25 °C
VCC = 4 V
VREF= 0 mA
CTL = 3 V
5
4
3
2
1
0024681012
Ta = +25 °C
VCC = 4 V
200
180
160
140
120
100
80
60
40
20
0024681012
Power supply current ICC (m A)
Reference voltage VREF (V)
Power Supply Current vs. Power Supply Voltage Reference Voltage vs. Power Supply Voltage
Power supply voltage VCC (V) Power supply voltage VCC (V)
Reference Voltage vs. CTL terminal Voltage
Reference voltag e VREF (V)
Operating ambient temperature Ta (°C)
Reference voltage VREF (V)
Reference Voltage vs. Operating Ambient Temperature
CTL terminal voltage VCTL (V)
CTL terminal current ICTL (µA)
CTL terminal Current vs. CTL terminal Voltage
CTL terminal voltage VCTL (V)
MB39A102
10
(Continued)
Ta = +25 °C
VCC = 4 V
CTL = 3 V
CT = 39 pF
10000
1000
100
10
CT = 100 pF
CT = 220 pFCT = 560 pF
1 10 100 1000
Ta = +25 °C
VCC = 4 V
CTL = 3 V
RT = 11 kΩ
RT = 24 kΩ
RT = 56 kΩRT = 130 kΩ
10000
1000
100
10 10 100 1000 10000
1.20
0 200 400 600 800 1000 1200
0.30
0.20
0.70
0.90
0.40
0.60
0.80
1.00
1.10
0.50
1400 1600
Ta = +25 °C
VCC = 4 V
CTL = 3 V
RT = 24 kΩUpper
Lower
VCC = 4 V
CTL = 3 V
RT = 24 kΩ
CT = 100 pF
1.20
1.10
1.00
0.90
0.80
0.70
0.60
0.50
0.40
0.30
0.20
−40 −20 0 20 40 60 80 100
Upper
Lower
VCC = 4 V
CTL = 3 V
RT = 24 kΩ
CT = 100 pF
560
540
520
500
480
460
440
−40 −20 0 20 40 60 80 100
Triangular Wave Upper and Lower Limit Voltage
vs. Operating Ambient Temperature
Triangular wave upper and
lower limit voltage VCT (V)
Operating ambient temperature Ta ( °C)
Triangular Wave Oscillation Frequency
vs. Timing Resistor
Triangula r wav e oscil la tio n
frequency fOSC (kHz)
Timing resistor RT (kΩ)
Triangular Wave Oscillation Frequency
vs. Timing Capacitor
Triang ula r wav e oscillat ion
frequency fOSC (kHz)
Timing capacitor CT (pF)
Triang ular Wave Osc illat ion Frequenc y
vs. Operating ambient Temperature
Triangular wave oscillation
frequency fOSC (kHz)
Operating ambient temperature Ta ( °C)
Triangular wave upper and
lower limit voltage VCT (V)
Triangular Wave Upper and Lower Limit Voltage
vs. Triangular Wave Oscillation Frequency
Triangular wave oscillation frequency fOSC (kHz)
MB39A102
11
(Continued)
−
+
+
+29
30 28
1 µF
IN
10 kΩ
2.4 kΩ
240 kΩ
OUT
10 kΩ
1.5 V 1.24 V
40
30
20
10
0
−10
−20
−30
−40
180
90
0
−90
−180
100 1 k 10 k 100 k 1 M 10 M
ϕAV
Ta = +25 °C
VCC = 4 V
−INE1
CS1
1600
1400
1200
1000
800
600
400
200
0
1390
−40 −20 0 20 40 60 80 100
1000
800
600
400
200
0
980
−40 −20 0 20 40 60 80 100
Error Amplifier Voltage Gain, Phase vs. Frequency
Error amplifier voltage gain AV (dB)
Phase φ (d eg)
Frequency f (Hz)
Power Dissipation vs.
Operating Ambient Temperature
(TSSOP-30P)
Power diss ipa tio n PD (mW)
Operating ambient temperature Ta ( °C)
Power Dissipation vs.
Operating Ambient Temperature
(BCC-32P)
Power dissipation PD (mW)
Operating ambient temperature Ta ( °C)
Error Am p1
the same as other channels
MB39A102
12
■FUNCTIONS
1. DC/DC Conver ter Functions
(1) Reference voltage block (Ref)
The reference voltage circuit generates a temperature-compensated reference voltage (2.0 V Typ) from the
voltage supplied from the VCC terminal (pin 5). The voltage is used as the ref erence voltage for the IC’ s internal
circuitry.
The reference voltage can supply a load current of up to 1 mA to an external device through the VREF terminal
(pin 7).
(2) Triangular-wave oscillator block (OSC)
The tr iangular wave oscillator incor porates a timing capacitor an d a timing resistor connected respectively to
the CT terminal (pin 9) and RT terminal (pin 8) to generate triangular oscillation wa vef orm amplitude of 0.4 V to
0.9 V.
The triangular waveforms are input to the PWM comparator in the IC.
(3) Error amplifier block (Error Amp1 to Error Amp4)
The erro r am plifi er dete cts the DC/DC converte r ou tput voltage and ou tpu ts P WM contro l s ign als. In additi on,
an arbi trar y loop gain can be set by connectin g a feedback resistor and capacitor fro m the output ter minal to
inverted input terminal of the error amplifier, enabling stable phase compensation to the system.
Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the
CS1 terminal (pin 30) to CS4 terminal (pin 16) while are the non-inverted input terminal f or Error Amp . The use
of Er ror Am p for soft-start detect ion m akes it pos sible for a system to o perate on a fixed soft -start time tha t is
independent of the output load on the DC/DC conv erter.
(4) PWM comparator block (PWM Comp.1 to PWM Comp.4)
The PWM comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/
output voltage.
The out put tra nsis tor turns on w hil e the erro r ampl if ier ou tput voltag e and DTC voltage rema in h igh er tha n the
triangular wave voltage.
(5) Output block (Drive1 to Drive4)
The output block is in the totem pole configuration, capable of driving an external P-channel MOS FET (channels
1 to 3), and N-channel MOS FET (channel 4).
MB39A102
13
2. Channel Control Functi on
The main or each channel is turned on and off depending on the v oltage lev els at the CTL terminal (pin 6), CS1
terminal (pin 30), CS2 terminal (pin 1), CS3 terminal (pin 15), and CS4 terminal (pin 16).
Channel On/Off Setting Conditions
*: Undefined
3. Protective Functions
(1) Timer-latch short-circuit protection circuit (SCP, SCP Comp.)
The short-circuit detection comparator in each channel detects the output voltage lev el of Error Amp, and if any
channel output voltage of Error Amp reaches the short-circuit detection voltage, the timer circuits are actuated
to start charging the external capacitor CSCP connected to the CSCP terminal (pin 11).
When the capacitor (CSCP) voltage reaches about 0.7 V, the circuit is turned off the output transistor and sets the
dead time to 100 %.
In additi on, the shor t- circuit detect ion from extern al input is capa ble by using −INS ter minal (pin 20) on short-
circuit detection comparator (SCP Comp.) .
To release the actuated protection circuit, either the power supply turn off and on again or set the CTL terminal
(pin 6) to the “L” lev el to low er the VREF terminal (pin 7) voltage to 1.5 V (Min) or less. (See “■SETTING TIME
CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT”.)
(2) Under voltage lockout protection circuit (UVLO)
The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned
on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such
malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect
to the power supply voltage, turn s off the output transistor, and se ts the dead time to 10 0% while hol ding the
CSCP terminal (pin 11) at the “L” level.
The circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the
under voltage lockout protection circuit.
■PR OTECTION CIRCUIT OPERATING FUNCTION TABLE
This table refers to output condition when protection circuit is operating.
CTL CS1 CS2 CS3 CS4 Power CH1 CH2 CH3 CH4
L**** OFF OFF OFF OFF OFF
H GND GND GND GND ON OFF OFF OFF OFF
HHigh-Z GND GND GND ON ON OFF OFF OFF
HGNDHigh-Z GND GND ON OFF ON OFF OFF
HGNDGNDHigh-Z GND ON OFF OFF ON OFF
H GND GND GND High-Z ON OFF OFF OFF ON
HHigh-Z High-Z High-Z High-Z ON ON ON ON ON
Operating circuit OUT1 OUT2 OUT3 OUT4
Short-c irc uit pr otecti on ci rcui t H H H L
Under voltage lockout protection circuit H H H L
MB39A102
14
■SETTING THE OUTPUT VOLTAGE
■SETTING THE TRIANGULAR OSCILLATION FREQUENCY
The triangular oscillation frequency is determined by the timing capacitor (CT) connected to the CT terminal (pin
9), and the timing resistor (RT) connected to the RT terminal (pin 8).
Moreover , it shifts more greatly than the calculated values according to the constant of timing resistor (RT) when
the triangular wave oscillation frequency exceeds 1 MHz. Therefore, set it referring to “T riangular Wave Oscillation
Frequency vs. Timing Resistor” and “Triangular Wa ve Oscillation F requency vs. Timing Capacitor” in “■ TYP-
ICAL CHARACTERISTICS”.
Triangular oscillation frequency : fOSC
−
+
+
V
O
R1
R2 −INEx
CSx
Error
Amp
1.24 V
V
O
(V) =(R1 + R2)
1.24
R2
x : Each chann el N o.
• CH1 to CH4
fOSC (kHz) := 1200000
CT (pF) × RT (kΩ)
MB39A102
15
■SETTING THE SOFT-START TIME
To prevent r ush cur rents w hen the IC i s tur ned on, you can set a soft-sta rt by connec ting s oft-sta rt c apaci tors
(CS1 to CS4 ) to the CS1 terminal (pin 30) to the CS4 terminal (pin 16), respectively.
Setting each CTL x from “H” to “L” switches to char ge the exter nal soft-start capaci tors (CS1 to CS4) c onnec ted
to the CS1 terminal (pin 30) to CS4 terminal (pin 16) at 12 µA.
The erro r amplifier outp ut (FB1 to FB4) is deter mined by compar ison betwee n the lower one of the potential s
at two non-inverted input terminals (1.24 V, CS terminal voltages) and the inverted input terminal voltage (−INE1
to−INE4).
The FB terminal voltage during the soft-start period (CS terminal voltage < 1.24 V) is therefore determined by
comparison between the −INE terminal and CS terminal voltages. The DC/DC con verter output voltage rises in
proportion to the CS terminal voltage as the soft-start capacitor connected to the CS terminal is charged.
The soft-start time is obtained from the following formula:
Soft-start time: ts (time to output 100%)
ts (s) := 0.103 × CSX (µF)
−
+
+
VO
R1
R2
−INEx
VREF
CSx
CSx
FBx
CTLx
Error Amp
UVLO
1.24 V
12 µA
x : Each channel No.
L priority
CH ON/OFF signal
L : ON, H : OFF
• Soft-Start Circuit
MB39A102
16
■TREATMENT WITHOUT USING CS TERMINAL
When not using the soft-start function, open the CS1 terminal (pin 30) , the CS2 terminal (pin 1) , the CS3
terminal (pin 15) , the CS4 terminal (pin 16) .
1
15
CS2
CS3
30
16
CS1
CS4
“OPEN”
“OPEN”
“OPEN”
“OPEN”
• Without Setting Soft-Start Time
MB39A102
17
■SETTING TIME CONST ANT FOR TIMER-LATCH SHORT -CIRCUIT PROTECTION CIRCUIT
Each channel uses the short-circuit detection comparator (SCP) to always compare the error amplifier′s output
level to the reference voltage.
While DC/DC conv erter load conditions are stab le on all channels, the short-circuit detection comparator output
remains at “L” level, and the CSCP terminal (pin 11) is held at “L” level.
If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage
to drop, the output of the short-circuit detection comparator on that channel goes to “H” le vel. This causes the
e x te rnal sh ort-cir cu it pr ot e ct i on ca p ac it o r CSCP connected to the CSCP terminal (pin 11) to be charged at 1 µA.
Short-circuit detection time (tCSCP)
tCSCP (s) := 0.70 × CSCP (µF)
When the capacitor CSCP is ch ar ged to the thresh old voltage ( VTH := 0.70 V), the latch is set and the extern al
FET is turned off (dead time is set to 100%). At this point, the latch input is closed and the CSCP terminal (pin
11) is held at “L” level.
In addition, the short-circuit detection from e xternal input is capable by using −INS terminal (pin 20) on the short-
circuit detection comparator (SCP Comp.) . The short-circuit detection operation starts when −INS terminal
voltage is less than threshold voltage (VTH := 1 V) .
When the power supply is turn on back or VREF terminal (pin 7) v oltage is less than 1.5 V (Min) by setting CTL
terminal (pin 6) to “L” level, the latch is released.
−
+
+
−
+
+
+
VO
R1
R2
−INEx
−INS
CSCP CTL
VREF
SR
CSCP
FBx
SCP
Comp.
SCP
UVLO
Latch
1 V
1.15 V
−
+
Error
Amp
1.24 V
83 kΩ
1 µA
VREF
20
11
x : Each channel No.
To each channel
Drive
• Timer-latch short-circuit protection circuit
MB39A102
18
■TREATMENT WITHOUT USING CSCP TERMINAL
When not using the timer-latch short-circuit protection circuit, connect the CSCP terminal (pin 11) to GND (pin
10) with the shortest distance.
10
11
GND
CSCP
• Treatment without using CSCP
MB39A102
19
■SETTING THE DEAD TIME
When the device is set f or step-up inverted output based on the step-up or step-up/down Zeta conversion, step-
up/down Sepic conversion or flyback conversion, the FB terminal voltage ma y reach and exceed the triangular
wave voltage due to load fluctuation. If this is the case, the output transistor is fixed to a full-ON state
(ON duty = 100 %). To prevent this, set the maximum duty of the output transistor. To set it, set the voltage at
the DTC terminal by applying a resistive voltage divider to the VREF voltage as shown below.
When t he DTC ter minal voltag e is higher than the t riangular wave voltage, the output transist or is tur ned on.
The ma ximum d uty c alculat ion for mula as sumin g that t r iangul ar wave ampli tude := 0.5 V and t r iangul ar wave
lower voltage := 0.4 V is given below.
When the DT C te r minal i s n ot used, con nec t it d irec tly to th e VRE F termi nal (pin 7) as shown be low (when no
dead time is set).
DUTY (ON) Max := Vdt − 0.4 V
0.5 V × 100 (%) , Vdt = Rb
Ra + Rb × VREF
7 VREF
DTCx Ra
Rb Vdt
x : Each channel No.
• When using DTC to set dead time
7 VREF
DTCx
x : Each channel No.
• When no dead time is set
MB39A102
20
■OPERATION EXPLANATION WHEN CTL TURNING ON AND OFF
When CTL is turned on, internal reference voltage VR and VREF generate. When VREF exceeds threshold
voltage (VTH) of UVLO (under voltage lockout protection circuit), UVLO are released, and the operation of output
Drive circuit of each channel becomes possible.
When CTL is off, VR and VREF fall. When VREF decr eases and UVLO fall below each reset voltage (VRST),
UVLO operates and output Drive circuit of each channel is forcibly done the operation stop, and makes the
output off state.
When period to reaching to 2.0 V by VREF voltage after UVLO are released by turning on CTL (refer to a in
“• Tim ing Chart”), and VRE F dec reases from 2. 0 V a fter tur ning off CTL and th e per io d until do the op eration
of UVLO (refer to a’ in “• Timing Chart” ), the bias voltage and the bias curre nt in IC do not re ach a prescr ibed
value because VREF which is the reference voltage does not reach 2.0 V, and the speed of response for IC has
decreased.
Note : Moreover, when it does the turning on and off of the input sudden change, the load sudden change, IC
cannot conform and the output might overshoot.
Therefore, impress the voltage to CTL terminal by which the VREF terminal voltage never stays in the above-
mentioned period.
Power
ON/OFF
CTL
VR
1.24 V
VREF
bias
CTL
VREF
UVLO
6
7
SCP
VCC
5
H : at SCP
H : UVLO release ErrorAmp Reference
To CH1 to CH4 output Drive circuit
H : Possible to operate
L : Forcibly stop
To CS1 to CS4 charge/
discharge circuit
H : Possible to charge
L : Forcibly discharge
• CTL Block Equivalent Circuit
MB39A102
21
1.5 V ± 0.2 V (Typ)
VR = 1.24 V (Typ)
aa'
VREF = 2.00 V (Typ)
VRST
VTH
Error Amp
Reference
voltage VR
Reference
voltage VREF
UVLO
CH1 to CH4
output Drive
circuit control
CTL terminal
voltage
Valid UVLO
Fixed full-off
Possible operate
UVLO release
Fixed full-off
• Timing Chart
MB39A102
22
■I/O EQUIVALENT CIRCUIT
5
10
+
−
1.24 V
7VREF
VCC
GND
77.3
kΩ
124
kΩ
ESD
protection
element
ESD
protection
element
ESD
protection
element
CTL
GND
67
kΩ
104
kΩ
6CSx
GND
VREF
(2.0 V)
RT
GND
VREF
(2.0 V)
8
+
−
0.7 V
CSCP
2 kΩ
GND
VREF
(2.0 V)
11 CT
GND
VREF
(2.0 V)
9
−INEx
GND
VCC
VREF
(2.0 V)
FBx
1.24 V
CSx −INS (1 V)
GND
VCC
83 kΩ
VREF
(2.0 V)
20
DTCx
GND
VCC
FBx CT OUTx
GNDO
VCCO 26
21
x : Each channel No.
〈〈Reference voltag e block 〉〉 〈〈Control block〉〉 〈〈Soft-start block〉〉
〈〈Short detection block〉〉 〈〈Tri ang ula r wave oscil lat or
block (RT) 〉〉
〈〈Triangular wave oscillator
block (CT) 〉〉
〈〈Error amplifier block (CH1 to CH4) 〉〉 〈〈Short detection comp arator block〉〉
〈〈PWM comparator block (CH1 to CH4) 〉〉 〈〈Output block (CH1 to CH4) 〉〉
MB39A102
23
■APPLICATION EXAMPLE
A
B
C
D
R13R14
3.3 kΩ12 kΩ
R15
C20
0.1 µFC21
0.047 µF
R16
2 kΩ
15 kΩ
R19R20
R25R26
2.4 kΩ43 kΩ
R21
C22
0.1 µFC23
0.047 µF
R22
2 kΩ
R24 20 kΩ
R30 20 kΩ
15 kΩ
2.4 kΩ43 kΩ
R31R32
3 kΩ22 kΩ
R27
C24
0.1 µFC25
0.047 µF
R28
2 kΩ
15 kΩ
R33
C26
0.1 µFC27
0.1 µF
C28
0.01 µF
R34
1 kΩ
15 kΩ
R23 33 kΩ
R29 33 kΩ
VIN
(2.5 V to 6 V)
R36
18 kΩ
R35
30 kΩ
−INE1
CS1
FB1
DTC1
−INE2
CS2
FB2
DTC2
−INE3
CS3
FB3
DTC3
−INE4
CS4
−INS
CSCP
FB4
DTC4
CH1
CH2
CH3
CH4
29
30
28
27
2
1
3
4
14
15
13
12
17
16
18
19
20
11
C
D
C2
0.1 µF
Q4
T2
D5
D6
D7
C13
1 µF
C16
4700 pF
C18
4.7
µF
R12
180 Ω
L3
10 µH
L4
15 µH
C19
10 µF
C17
1 µF
C14
2.2 µF
VO3-1
15 V, 10 mA
VO3-2
5 V, 50 mA
VO4
3.3 V, 500 mA
C15
2.2
µF
VC
VB
OUT3
OUT4
VCC
CTL
6
5
21
22
23
A
Q1
Q2 T1
D1
D2
D3
D4
B
C4
1 µF
C8
1 µF
C6
4.7 µF
C11
2.2 µF
C9
2.2 µF
VD
VG
VO1
2.5 V,
250 mA
VO2-1
15 V, 10 mA
VO2-2
5 V, 50 mA
VO2-3
−7.5 V, −5 mA
L2
22 µH
VCCO
OUT1
OUT2
24
25
26
Short detection signal
(L : at short)
C29
100 pF
C30
0.1 µF
R37
24 kΩ
RT CT VREF GND
8 9 7 10
f
OSC
Accuracy ±10%
C1
0.1 µF
C10
2.2 µF
GNDO
H : ON (Power ON)
L : OFF (Standby mode)
VTH = 1.4 V
MB39A102
24
■PARTS LIST
Note : SANYO : SANYO Electric Co., Ltd.
TDK : TDK Corporation
SUMIDA : SUMIDA Electric Co., Ltd.
ssm : SUSUMU Co., Ltd.
COMPONENT ITEM SPECIFICATION VENDOR PARTS NO.
Q1, Q2, Q4
Q5 Pch FET
NPN Tr VDS = −20 V, ID = −1.5 A
VCEO = 15 V, IC = 3 A SANYO
SANYO MCH3309
CPH3206
D1, D7
D2 to D6 Diode
Diode VF = 0.4 V (Max) , at IF = 1 A
VF = 0.55 V (Max) , at IF = 0.5 A SANYO
SANYO SBS004
SB05-05CP
L2
L3
L4
Inductor
Inductor
Inductor
22 µH
10 µH
15 µH
0.63 A, 160 mΩ
0.94 A, 67 mΩ
0.76 A, 120 mΩ
TDK
TDK
TDK
RLF5018T-220MR63
RLF5018T-100MR94
RLF5018T-150MR76
T1, T2 Transformer SUMIDA CLQ52 5388-T095
C1, C2
C4, C8, C13
C6
C9 to C11
C14, C15
C16
C17
C18
C19
C20, C22, C24
C21, C23, C25
C26, C27, C30
C28
C29
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
0.1 µF
1 µF
4.7 µF
2.2 µF
2.2 µF
4700 pF
1 µF
4.7 µF
10 µF
0.1 µF
0.047 µF
0.1 µF
0.01 µF
100 pF
50 V
25 V
10 V
16 V
16 V
50 V
25 V
10 V
6.3 V
50 V
50 V
50 V
50 V
50 V
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
C1608JB1H104K
C3216JB1E105K
C3216JB1A475M
C3216JB1C225K
C3216JB1C225K
C1608JB1H472K
C3216JB1E105K
3216JB1A475M
C3216JB0J106M
C1608JB1H104K
C1608JB1H473K
C1608JB1H104K
C1608JB1H103K
C1608CH1H101J
R12
R13
R14
R15, R21, R27
R16, R22, R28
R19, R25
R20, R26
R23, R29
R24, R30
R31
R32
R33
R34
R35
R36
R37
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
180 Ω
3.3 kΩ
12 kΩ
15 kΩ
2 kΩ
2.4 kΩ
43 kΩ
33 kΩ
20 kΩ
3 kΩ
22 kΩ
15 kΩ
1 kΩ
30 kΩ
18 kΩ
24 kΩ
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
RR0816P-181-D
RR0816P-332-D
RR0816P-123-D
RR0816P-153-D
RR0816P-202-D
RR0816P-242-D
RR0816P-433-D
RR0816P-333-D
RR0816P-203-D
RR0816P-302-D
RR0816P-223-D
RR0816P-153-D
RR0816P-102-D
RR0816P-303-D
RR0816P-183-D
RR0816P-243-D
MB39A102
25
■REFERENCE DATA
(Continued)
Ta = +25 °C
V
O
1 = 2.5 V, 250 mA
V
O
2-1 = 15 V, 10 mA
V
O
2-2 = 5 V, 50 mA
V
O
2-3 = −7.5 V, −5 mA
V
O
3-1 = 15 V, 10 mA
V
O
3-2 = 5 V, 50 mA
V
O
4 = 3.3 V, 500 mA
f
OSC
= 500 kHz
100
95
90
85
80
75
70
65
60
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
100
95
90
85
80
75
70
65
602.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
CH2
CH3
CH1
CH4
Ta = +25 °C
At VIN := 2.59 V
CH1stops by short-circuit
detecti on ope ra tio n
TOTAL efficiency η (%)
Input voltage VIN (V)
TOTAL Efficiency vs. Input Voltage
Note : Only concerned CH is ON
Include external SW Tr operating current
CH2 and CH3 are discontinuance.
Each CH efficiency η (%)
Input voltage VIN (V)
Each CH Efficiency vs. Input Voltage
MB39A102
26
(Continued)
Ta = +25 °C
VIN = 3.6 V
100
95
90
85
80
75
70
65
600 50 100 150 200 250 300
CH2 to CH4 : OFF
Ta = +25 °C
VIN = 3.6 V
VO2-1 = 10 mA
VO2-3 = −5 mA
VO3-1 = 10 mA
100
95
90
85
80
75
70
65
60 0 1020304050
CH1, 3, 4 : OFF
CH1, 2, 4 : OFF
CH2
CH3
Note : CH2 and CH3 are discontinuance mode.
Conversion efficiency η (%)
Load current lO2-2, IO3-2 (mA)
Conversion Efficiency vs. Load Current (CH2, CH3)
IO1 ≤ 20 mA : discontinuance mode
Conversion efficiency η (%)
Load current IO1 (mA)
Conversion Efficiency vs. Load Current (CH1)
MB39A102
27
(Continued)
Ta = +25 °C
VIN = 3.6 V
100
95
90
85
80
75
70
65
600 100 200 300 400 500 600
CH1 to CH3 : OFF
Conver sion effi ci enc y η (%)
Load current IO4 (mA)
Conversion Efficiency vs. Load Current (CH4)
IO4 ≤ 175 mA : discontinuance mode
MB39A102
28
(Continued)
VG (V)
4
2
0
VD (V)
t (µs)
Ta = +25 °C
VIN = 4 V
CTL = 5 V
4
2
0
012345678910
VB (V)
2
1
0
−1
VC (V)
t (µs)
Ta = +25 °C
VIN = 4 V
CTL = 5 V
10
5
0
012345678910
Switching Wave Form (CH1)
Switching Wave Form (CH4)
MB39A102
29
■USAGE PRECAUTION
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply ne gative voltages.
The use of negative voltages below –0.3 V may create parasitic transistors on LSI lines, which can cause
abnormal operation.
■ORDERING INFORMATION
Part number Package Remarks
MB39A102PFT 30-pin plastic TSSOP
(FPT-30P-M04)
MB39A102PV3 32-pad plastic BCC
(LCC-32P-M15)
MB39A102
30
■PACKAGE DIMENSIONS
(Continued)
30-pin plastic TSSOP
(FP T -3 0 P -M04)
Dimens ion s in mm (inc hes ).
Note: The values in parentheses are reference values.
C
2001 FUJITSU LIMITED F30007SC-1-1
7.80±0.10(.307±.004)
0.50(.020) 0.20±0.03
(.008±.001)
.173
–.004
+.008
–0.10
+0.20
4.40 6.40±0.10
(.252±.004)
0.10(.004)
7.00(.276) 0.3865(.0152)
0.3865(.0152)
0.90±0.05
(.035±.002)
"A"
0~8°
0.60±0.10
(.024±.004)
0.25(.010)
0.10±0.05
(.004±.002)
1.10(.043)
MAX
Details of "A" part
0.127±0.03
(.005±.001)
INDEX
0.10(.004)
MB39A102
31
(Continued)
32-pad plastic BCC
(LCC-32P-M15)
Dimens ion s in mm (inc hes ).
Note: The values in parentheses are reference values.
C
2005 FUJITSU LIMITED C32067S-c-1-1
0.05(.002)
1
5.00±0.10(.197±.004)
5.00±0.10
(.197±.004)
0.80(.031)MAX
0.075±0.025
(.003±.001)
(Mount height)
(Stand off)
0.50±0.10
(.020±.004)
0.50(.020)TYP
4.25(.167)TYP
3.00(.118)
REF
4.25(.167)
TYP 0.50(.020)
TYP
(.020±.004)
0.50±0.10
3.00(.118)REF
"A" "B""C"
2517
9
9
1
25 17
0.55±0.06
(.022±.002)
0.55±0.06
(.022±.002)
C0.2(.008)
(.022±.002)
0.55±0.06
(.022±.002)
0.55±0.06
0.55±0.06
(.022±.002)
0.30±0.06
(.012±.002)
Details of "B" part Details of "C" partDetails of "A" part
0.14(.006)
MIN
INDEX AREA
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,
Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
FUJITSU MICROELECTRONICS AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
Europe
FUJITSU MICROELECTRONICS EUROPE GmbH
Pittlerstrasse 47, 63225 Langen,
Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
206 KOSMO TOWER, 1002 Daechi-Dong,
Kangnam-Gu,Seoul 135-280
Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://www.fmk.fujitsu.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LTD.
151 Lorong Chuan, #05-08 New Tech Park,
Singapore 556741
Tel: +65-6281-0770 Fax: +65-6281-0220
http://www.fujitsu.com/sg/services/micro/semiconductor/
FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.
Rm.3102, Bund Center, No.222 Yan An Road(E),
Shanghai 200002, China
Tel: +86-21-6335-1560 Fax: +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road
Tsimshatsui, Kowloon
Hong Kong
Tel: +852-2377-0226 Fax: +852-2376-3269
http://cn.fujitsu.com/fmc/tw
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporat-
ing the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect
to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in
nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in
weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited Strategic Business Development Dept.
