Description
The A1172 is an ultra-sensitive, pole-independent Hall-effect
switch with a latched digital output. It features operation at
low supply currents and voltages, making it ideal for battery-
operated electronics. The 1.65 to 3.5 V operating supply
voltage and unique clocking algorithm reduce the average
operating power requirements to less than 15 W with a
2.75 V supply.
The A1172 has two push-pull output structures. Omnipolar
activation for the output function is available on each output
structure. As such, either a north or south pole of sufficient
strength turns the available outputs off or on. The A1172
contains two complementary outputs. Therefore, for a fixed
magnetic field, one output will be in a high voltage state and
one output will be in a low voltage state.
Improved stability is made possible through dynamic offset
cancellation using chopper stabilization, which reduces the
residual offset voltage normally caused by device overmolding,
temperature dependencies, and thermal stress. This device
1172-DS, Rev. 5
Features and Benefits
Micropower operation
Operation with either north or south pole—
no magnetic orientation required during assembly
1.65 to 3.5 V battery operation
Chopper stabilization
Superior temperature stability
Extremely low switchpoint drift
Insensitive to physical stress
Sol id state reliability
Small size: WLCSP ( 1 mm × 1 mm × 0.5 mm)
Complementary, push-pull outputs eliminate need for
pull-up resistor
Micropower Ultra-Sensitive Hall-Ef fect Switch
Continued on the next page…
Package: 4 pin WLCSP (suffix CG)
Functional Block Diagram
Not to scale
A1172
Dynamic Offset
Cancellation
VOUTPN
VOUTPS
VDD
Low-Pass
Filter
Clock
/
Logic
Latch
Latch
Amp
GND
Sample and Hold
Engineering samples available on a limited basis. Contact your local
sales or applications support office for additional information.
Micropower Ultra-Sensitive Hall-Ef fect Switch
A1172
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A1
B1
A2
B2
includes, on a single silicon chip, a Hall-voltage generator, a small-
signal amplifier, chopper stabilization, a latch, and a MOSFET
output.
The A1172 device offers magnetically optimized solutions, suitable
for most applications. The wafer level chip scale package (WLCSP)
is approximately only 1 mm by 1 mm by 0.5 mm. This package is
smaller than most plastic packages and reduces the printed circuit
board area consumed by micropower Hall-effect switches.
Description (continued)
Pin-out Diagram
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Units
Supply Voltage VDD 5V
Reverse Supply Voltage VRDD –0.3 V
Output Off Voltage VOUTx 5V
Reverse Output Voltage VROUTx –0.3 V
Output Current IOUTx(Sink) –1 mA
IOUTx(Source) 1mA
Magnetic Flux Density B Unlimited G
Operating Ambient Temperature TARange E –40 to 85 ºC
Maximum Junction Temperature TJ(max) 165 ºC
Storage Temperature Tstg –65 to 170 ºC
Terminal List Table
Name Number Function
VOUTPS A1 Push-pull output
VOUTPN A2 Inverted push-pull output
GND B1 Ground
VDD B2 Connects power supply to chip
Selection Guide
Part Number Package1Pb-free Packing*
A1172ECGLT24 bumped wafer-level chip-scale
package (WLCSP)
Pb-free chip with high-temperature solder
balls (RoHS compliant) 4000 pieces per reel
1Contact Allegro® for additional packing options.
2Allegro products sold in WLCSP package types are not intended for automotive applications.
(Bump-down view)
Micropower Ultra-Sensitive Hall-Ef fect Switch
A1172
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
OPERATING CHARACTERISTICS
Characteristic Symbol Test Conditions Min. Typ.1Max. Units
Electrical Characteristics valid over full operating voltage range and TA = 25°C
Supply Voltage Range2VDD Operating, TA= 25°C 1.65 – 3.5 V
Output On Voltage VOUT(SAT) NMOS on, IOUT = 1 mA, VDD = 2.75 V – 100 300 mV
VOUT(HIGH) PMOS on, IOUT = 1 mA, VDD = 2.75 V VDD–300 VDD–100 – mV
Period tPERIOD – 50 100 ms
Chopping Frequency fC– 200 – kHz
Supply Slew Rate3SR 20 – – V/ms
Supply Current
IDD(EN) Chip awake (enabled) – – 2.0 mA
IDD(DIS) Chip asleep (disabled) – – 8.0 μA
IDD(AV)
VDD = 1.80 V – 4 8 μA
VDD = 3.5 V – 6 12 μA
Magnetic Characteristics4 at TA = 25°C and 1.8 V ≤ VDD ≤ 3.5 V
Operate Point BOPS –3255G
BOPN –55 –32 – G
Release Point BRPS 626– G
BRPN – –26 –6 G
Hysteresis BHYS BHYS = BOPX – BRPX –6–G
1Typical values at VDD = 2.75 V. Performance may vary for individual units, within the specified maximum and minimum limits.
2Magnetic operate and release points vary with supply voltage.
3If SR < SR(min), then valid device output might be delayed for one Period, tPERIOD , of device.
41 gauss (G) is exactly equal to 0.1 millitesla (mT).
Micropower Ultra-Sensitive Hall-Ef fect Switch
A1172
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
THERMAL CHARACTERISTICS may require derating at maximum conditions*
Characteristic Symbol Test Conditions Value Units
Package Thermal Resistance RJA
On 1-layer PCB 347 ºC/W
On 4-layer PCB 147 ºC/W
*Additional thermal information is available on the Allegro website.
0
200
400
600
800
1000
1200
1400
1600
20 40 60 80 100 120 140 160 180
Temperature (°C)
Power Dissipation, P
D
(mW)
Power Dissipation versus Ambient Temperature
RQJA = 347 ºC/W
RQJA = 142 ºC/W
Micropower Ultra-Sensitive Hall-Ef fect Switch
A1172
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Operating Characteristics
Saturation Voltage versus Temperature
0
50
100
150
200
250
300
-60 -40 -20 0 20 40 60 80 100
T
A
(°C)
VOUT(SAT) (mV)
VDD = 1.65V
VDD = 2.75V
VDD = 3.5V
Saturation Voltage versus Supply Voltage
0
50
100
150
200
250
300
1 1.5 2 2.5 3 3.5 4
VCC (V)
V
OUT(SAT)
(mV)
85°C
-40°C
25°C
Micropower Ultra-Sensitive Hall-Ef fect Switch
A1172
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Average Supply Current versus Temperature
0
2
4
6
8
10
12
-60 -40 -20 0 20 40 60 80 100
T
A
(°C)
IDD(AV)
(uA)
VDD = 1.65V
VDD = 2.75V
VDD = 3.5V
Average Supply Current versus Supply Voltage
0
2
4
6
8
10
12
1 1.5 2 2.5 3 3.5 4
VCC (V)
I
DD(AV)
(μA)
85°C
-40°C
25°C
Micropower Ultra-Sensitive Hall-Ef fect Switch
A1172
7
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Period versus Temperature
0
10
20
30
40
50
60
70
80
90
100
-60 -40 -20 0 20 40 60 80 100
T
A
(°C)
tperiod (ms)
VDD = 1.65V
V
DD
= 2.75V
V
DD
= 3.5V
Period versus Supply Voltage
0
10
20
30
40
50
60
70
80
90
100
1 1.5 2 2.5 3 3.5 4
V
CC
(V)
tperiod (ms)
85°C
-40°C
25°C
Micropower Ultra-Sensitive Hall-Ef fect Switch
A1172
8
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Low A verage Power
Internal timing circuitry activates the IC for 50 s and deacti-
vates it for the remainder of the period (50 ms). A short awake
time allows stabilization prior to the sampling and data-latching
on the falling edge of the timing pulse. The output during the
sleep state is latched in the last sampled state. The supply current
is not affected by the output state.
Operation
The VOUTPS output switches low (turns on) when a magnetic
field perpendicular to the Hall element exceeds the operate point,
BOPS (or is less than BOPN). After turn-on, the output voltage
is VOUT(SAT). The output transistor is capable of sinking cur-
rent up to the short circuit current limit, IOM, which is a mini-
mum of 1 mA. When the magnetic field is reduced below the
release point, BRPS (or increased above BRPN), the device output
switches high (turns off). The pull-up transistor brings the output
voltage to VOUT(HIGH).
VOUTPN operates with the opposite output polarity. That is, the
output is low (on) in the absence of a magnetic field. The output
goes high (turns off) when sufficient field, of either north or
south polarity, is presented to the device.
The difference in the magnetic operate and release points is the
hysteresis, BHYS , of the device. This built-in hysteresis allows
clean switching of the output even in the presence of external
mechanical vibration and electrical noise.
The push-pull outputs are capable of sourcing or sinking a maxi-
mum of 1 mA.
Powering-on the device in a hysteresis region, between BOPX
and BRPX, allows an indeterminate output state. The correct state
is attained after the first excursion beyond BOPX or BRPX.
BHYS
BHYS
VOUT(HIGH)
VOUT
VOUT(SAT)
Switch to Low
Switch to Low
Switch to High
Switch to High
B+
B–
V+
00
Figure 1. Switching Behavior of Omnipolar Switches. On the horizontal axis, the B+ direction indicates increasing
south polarity magnetic field strength, and the B– direction indicates decreasing south polarity field strength
(including the case of increasing north polarity).
(A) VOUTPS (B) VOUTPN
BOPS
BOPN
BRPN
BRPS
BHYS
BHYS
VOUT(HIGH)
VOUT
VOUT(SAT)
Switch to Low
Switch to Low
Switch to High
Switch to High
B+
B–
V+
00
Functional Description
0
IDD(EN)
IDD(DIS)
tPeriod
Sleep
Awake
Sample and Output Latched
Micropower Ultra-Sensitive Hall-Ef fect Switch
A1172
9
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
VDD
VS
GND
VOUTPN
A1172
VOUTPS
Outputs
0.1 μF
CBYP
It is strongly recommended that an external bypass capacitor be
connected (in close proximity to the Hall element) between the
supply and ground of the device to reduce both external noise
and noise generated by the chopper stabilization technique. As is
shown in figure 2, a 0.1F capacitor is typical.
Extensive applications information on magnets and Hall-effect
devices is available in the following notes:
• Hall-Effect IC Applications Guide, AN27701
• Hall-Effect Devices: Gluing, Potting, Encapsulating, Lead
Welding and Lead Forming AN27703.1
• Soldering Methods for Allegro Products (SMD and Through-
Hole), AN26009
All are provided in Allegro Electronic Data Book, AMS-702,
and on the Allegro Web site, www.allegromicro.com.
Figure 2. Typical Application Circuit
Applications
Micropower Ultra-Sensitive Hall-Ef fect Switch
A1172
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package CG, 4-Bump WLCSP
SEATING
PLANE
C
0.506 +0.049
–0.051
0.955 ±0.020
0.955 ±0.020
0.500
0.500
0.500
0.500
0.227
0.228
0.200 ±0.030
C0.05
4X
21
21
A
A
B
B
A
Hall element (not to scale)
B
A
C
C
B
Terminal #A1 mark area (substrate side)
For Reference Only, not for tooling use
Dimensions in millimeters
Exact configuration at supplier discretion within limits shown
D
D
X.160
A
B
21
PCB Layout Reference View
Reference view of typical layout for solder pads
All pads a minimum of 0.20 mm from all adjacent pads;
adjust as necessary to meet application process
requirements and PCB layout tolerances
Branding scale and appearance at supplier discretion
Standard Branding Reference View
N = Last two digits of device part number
Y = Last digit of year of manufacture
W = Week of manufacture
NN
YWW
A1
Micropower Ultra-Sensitive Hall-Ef fect Switch
A1172
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
For the latest version of this document, visit our website:
www.allegromicro.com
Copyright ©2008-2011, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
Revision History
Revision Revision Date Description of Revision
Rev. 5 October 26, 2011 Update Selection Guide
