3.45 GHz to 6.25 GHz,
Tunable Band-Pass Filter
Data Sheet HMC892ALP5E
Rev. 0 Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2018 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Amplitude settling time: 200 ns
Excellent wideband rejection: ≥30 dB
Single-chip replacement for mechanically tuned designs
32-lead, 5 mm × 5 mm, RoHS compliant LFCSP package
APPLICATIONS
Test and measurement equipment
Military radar and electronic warfare (EW)/electronic
countermeasures (ECM)
Satellite communications (SATCOM) and space
Industrial and medical equipment
FUNCTIONAL BLOCK DIAGRAM
RFOUTRFIN
V
FCTL
V
BWCTL
GNDGND
HMC892ALP5E
16963-001
Figure 1.
GENERAL DESCRIPTION
The HMC892ALP5E is a tunable band-pass filter that features a
user selectable pass-band frequency. The 3 dB filter bandwidth is
approximately 8.7%. The 20 dB filter bandwidth is approximately
23.8%. The center frequency can be varied between 3.45 GHz
and 6.25 GHz by applying an analog tuning voltage between 0 V
and 14 V.
This tunable filter can be used as a smaller alternative to
physically large switched filter banks and cavity tuned filters.
The HMC892ALP5E has excellent microphonics due to the
monolithic design and provides a dynamically adjustable
solution in advanced communications applications.
HMC892ALP5E Data Sheet
Rev. 0 | Page 2 of 11
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Typical Performance Characteristics ..............................................6
Theory of Operation .........................................................................9
Applications Information .............................................................. 10
Typical Application Circuit ....................................................... 10
Evaluation PCB Information .................................................... 10
Outline Dimensions ....................................................................... 11
Ordering Guide ............................................................................... 11
REVISION HISTORY
9/2018—Revision 0: Initial Version
Data Sheet HMC892ALP5E
Rev. 0 | Page 3 of 11
SPECIFICATIONS
TA = 25°C, VFCTL = VBWCTL, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE
Center (fCENTER) 3.45 6.25 GHz
BANDWIDTH
3 dB
8.7
%
3 dB Bandwidth Control, VBWCTL 3 % Percent change of bandwidth over fCENTER, as
VBWCTL changes
REJECTION
Low-Side 0.89 × fCENTER GHz ≥20 dB
High-Side 1.13 × fCENTER GHz ≥20 dB
Re-Entry 5.70 × fCENTER GHz ≤30 dB
LOSS
Insertion 9.5 dB
Return 9.6 dB
DYNAMIC PERFORMANCE
Maximum Input Power for Linear Operation 10 dBm
Input Third-Order Intercept (IP3) 32 dBm Input power (PIN) = 20 dBm per tone
Group Delay 1.55 ns
Phase Sensitivity 3.5 Radian/V
Amplitude Settling 200 ns Time to settle to minimum insertion loss,
within ≤0.5 dB of static insertion loss
Drift Rate 0.5 MHz/°C
RESIDUAL PHASE NOISE
1 MHz Offset −165 dBc/Hz
TUNING
Voltages (VFCTL, VBWCTL) 0 14 V Each pin can be driven independently
Currents (IFCTL, IBWCTL) ±1 µA Rated current for each pin
HMC892ALP5E Data Sheet
Rev. 0 | Page 4 of 11
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Tuning
Voltages (VFCTL, VBWCTL) −0.5 V to +15 V
Currents (IFCTL, IBWCTL) ±1 mA
RF Input Power 27 dBm
Temperature
Operating −40°C to +85°C
Storage
−65°C to +150°C
Junction for 1,000,000 Mean Time to
Failure (MTTF)
175°C
Nominal Junction (Paddle
Temperature (TPADDLE ) = 85°C, PIN =
10 dBm)
90°C
Electrostatic Discharge (ESD)Sensitivity
Rating
Human Body Model (HBM) 1500 V
Field Induced Charged Device Model
(FICDM)
1250 V
Moisture Sensitivity Level (MSL) Rating
MSL3
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Data Sheet HMC892ALP5E
Rev. 0 | Page 5 of 11
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. NI C = NOT INT ERNALL Y CONNECTED. THES E P INS ARE NOT CONNECT E D INT E RNALLY .
ALL DATA S HOW IN THIS DATA SHEE T W AS M E AS URE D WITH T HE S E P INS CO NNE CTED TO
RF OR DC GROUND EX TERNAL LY.
2. EX P OSE D P AD. THE P ACKAGE BOTTO M HAS AN E X P OSED M E TAL P AD THAT M US T BE CO NNE CTED
TO RF AND DC GRO UND.
24 NIC
23 NIC
22 NIC
21 NIC
20 GND
19 RFOUT
18 NIC
17 NIC
1
2
3
4
5
6
7
8
NIC
NIC
NIC
NIC
GND
RFIN
NIC
NIC
9
10
11
12
13
14
15
16
NIC
NIC
NIC
V
FCTL
NIC
V
BWCTL
NIC
NIC
32
31
30
29
28
27
26
25
NIC
NIC
NIC
NIC
NIC
NIC
NIC
NIC
HMC892ALP5E
TOP VIEW
(No t t o Scal e)
16963-002
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 to 4, 7 to 11, 13, 15
to 18, 21 to 32
NIC Not Internally Connected. These pins are not connected internally. All data shown in this data sheet was
measured with these pins connected to RF or dc ground externally.
5, 20 GND Ground. These pins and exposed paddle must be connected to RF or dc ground. See Figure 5 for the
interface schematic.
6 RFIN Radio Frequency Input. This pin is dc-coupled and is matched to 50 Ω. Do not apply external voltage
to this pin. See Figure 3 for the interface schematic.
12 VFCTL Center Frequency Control Voltage. See Figure 4 for the interface schematic.
14
V
BWCTL
Bandwidth Control Voltage. See Figure 7 for the interface schematic.
19
RFOUT
Radio Frequency Output. This pin is dc-coupled and is matched to 50 Ω. Do not apply external voltage
to this pin. See Figure 6 for the interface schematic.
EPAD Exposed Pad. The package bottom has an exposed metal pad that must be connected to RF and dc
ground.
INTERFACE SCHEMATICS
RFIN
250Ω
17nH
16963-003
Figure 3. RFIN Interface Schematic
31.8pF
8.5nH 250Ω
10pF
V
FCTL
16963-004
Figure 4. VFCTL Interface Schematic
GND
16963-005
Figure 5. GND Interface Schematic
RFOUT
250Ω
17nH
16963-006
Figure 6. RFOUT Interface Schematic
42.4pF
8.5nH 250Ω
38pF
V
BWCTL
16963-007
Figure 7. VBWCTL Interface Schematic
HMC892ALP5E Data Sheet
Rev. 0 | Page 6 of 11
TYPICAL PERFORMANCE CHARACTERISTICS
0
–80
–70
–60
–50
–40
–30
–20
–10
0 5 10 15 20 25 30
INSERTION LOSS (dB)
BROADBAND RF FRE QUENCY ( GHz)
14V
7V
0V
16963-008
Figure 8. Insertion Loss vs. Broadband RF Frequency at Various Voltages,
VFCTL = VBWCTL
–6
–26
–24
–22
–20
–18
–16
–12
–8
–14
–10
2.0 3.0 4.0 5.0 6.0 7.0 8.02.5 3.5 4.5 5.5 6.5 7.5
INSERTION LOSS (dB)
RF FREQ UE NCY ( GHz)
14V
7V
0V
16963-009
Figure 9. Insertion Loss vs. RF Frequency at Various Voltages, VFCTL = VBWCTL
0
–6
–26
–24
–22
–20
–18
–16
–12
–8
–2
–4
–14
–10
3.5 4.0 5.0 6.0 6.54.5 5.5
INSERTION LOSS (dB)
RF FREQ UE NCY ( GHz)
+85°C
+25°C
–40°C
16963-010
Figure 10. Insertion Loss vs. RF Frequency at Various Temperatures, VFCTL =
VBWCTL = 7 V
0
–25
–20
–15
–10
–5
0 5 10 15 20 25 30
RET URN LOS S ( dB)
BROADBAND RF FRE QUENCY ( GHz)
S22, 14V
S11, 14V
S22, 7V
S11, 7V
S22, 0V
S11, 0V
16963-011
Figure 11. Return Loss (S11 and S22) vs. Broadband RF Frequency at Various
Voltages, VFCTL = VBWCTL
0
–30
–28
–26
–24
–22
–18
–10
–2
–14
–6
–20
–12
–4
–16
–8
2.0 3.0 4.0 5.0 6.0 7.0 8.0
2.5 3.5 4.5 5.5 6.5 7.5
RF FREQ UE NCY ( GHz)
RET URN LOS S ( dB)
S22, 14V
S11, 14V
S22, 7V
S11, 7V
S22, 0V
S11, 0V
16963-012
Figure 12. Return Loss vs. RF Frequency at Various Voltages, VFCTL = VBWCTL
0
–6
–22
–20
–18
–16
–12
–8
–2
–4
–14
–10
3.5 4.0 5.0 6.0 6.54.5 5.5
RET URN LOS S ( dB)
RF FREQ UE NCY ( GHz)
S22, + 85°C
S11, + 85°C
S22, + 25°C
S11, + 25°C
S22, –40°C
S11, –40°C
16963-013
Figure 13. Return Loss vs. RF Frequency at Various Temperatures, VFCTL =
VBWCTL = 7 V
Data Sheet HMC892ALP5E
Rev. 0 | Page 7 of 11
7.0
5.5
2.5
3.0
4.0
5.0
6.5
6.0
3.5
4.5
02610 14124 8
CENTE R FREQUENCY ( GHz)
V
FCTL
= V
BWCTL
(V)
+85°C
+25°C
–40°C
16963-014
Figure 14. Center Frequency vs. VFCTL = VBWCTL at Various Temperatures
12
7
0
1
3
5
11
9
6
10
8
2
4
0 2 6 10 14124 8
3dB BANDWIDTH (%)
V
FCTL
= V
BWCTL
(V)
+85°C
+25°C
–40°C
16963-015
Figure 15. 3 dB Bandwidth vs. VFCTL = VBWCTL at Various Temperatures
1.00
0.70
0.75
0.85
0.95
0.80
0.90
0 2 6 10 141248
LOW-SIDE REJECTION RATIO
V
FCTL
= V
BWCTL
(V)
+85°C
+25°C
–40°C
16963-016
REJECT IO N RATIO I S DE FINE D AS THE RATIO
OF THE FREQUENCY AT W HICH THE RE LAT IVE
INSERTION LOSS IS 20dB TO
f
CENTER
Figure 16. Low-Side Rejection Ratio vs. VFCTL = VBWCTL at Various Temperatures
0
–2
–16
–14
–10
–6
–4
–12
–8
0 2 6 10 14
1248
INSERTION LOSS (dB)
V
FCTL
= V
BWCTL
(V)
+85°C
+25°C
–40°C
16963-017
Figure 17. Insertion Loss vs. VFCTL = VBWCTL at Various Temperatures
0
–2
–16
–14
–10
–6
–4
–12
–8
0 2 610 14
124 8
MAXIMUM RETURN LOSS (d B)
V
FCTL
= V
BWCTL
(V)
+85°C
+25°C
–40°C
16963-018
Figure 18. Maximum Return Loss vs. VFCTL = VBWCTL at Various Temperatures,
2 dB Bandwidth
1.30
1.05
1.10
1.20
1.15
1.25
0 2 6 10 14124 8
HIG H-SI DE RE JE CTION RAT IO
V
FCTL
= V
BWCTL
(V)
+85°C
+25°C
–40°C
16963-019
REJECT IO N RATIO I S DE FINE D AS THE RATIO
OF THE FREQUENCY AT W HICH THE RE LAT IVE
INSERTION LOSS IS 20dB TO
f
CENTER
Figure 19. High-Side Rejection Ratio vs. VFCTL = VBWCTL at Various
Temperatures
HMC892ALP5E Data Sheet
Rev. 0 | Page 8 of 11
400
0
50
250
150
350
200
100
300
02 6 10 1412
4 8
TUNING SENSITIVIT Y (MHz/V)
V
FCTL
= V
BWCTL
(V)
+85°C
+25°C
–40°C
16963-020
Figure 20. Tuning Sensitivity vs. VFCTL = VBWCTL at Various Temperatures
2.5
0
0.5
1.5
1.0
2.0
0 2 6 10 1412
4 8
GRO UP DE LAY ( ns)
V
FCTL
= V
BWCTL
(V)
+85°C
+25°C
–40°C
16963-021
Figure 21. Group Delay vs. VFCTL = VBWCTL at Various Temperatures
–110
–120
–170
–160
–140
–150
–130
10 100 10k 1M 100M10M1k 100k
PHASE NOISE (dBc/Hz)
OFFSET FREQUENCY
14V
7V
1V
16963-022
Figure 22. Phase Noise vs. Offset Frequency at Various Voltages, VFCTL = VBWCTL
3
0
1
2
2.0 2.5 4.5 6.5 8.07.53.5 5.53.0 5.0 7.04.0 6.0
GRO UP DE LAY ( ns)
RF FREQ UE NCY ( GHz)
14V
7V
0V
16963-023
Figure 23. Group Delay vs. RF Frequency at Various Voltages, VFCTL = VBWCTL
40
35
0
5
15
25
30
10
20
02 6 10 141248
INPUT I P 3 ( dBm)
V
FCTL
= V
BWCTL
(V)
+85°C
+25°C
–40°C
16963-024
Figure 24. Input IP3 vs. VFCTL = VBWCTL at Various Temperatures with an Input
Power of 20 dBm
15
–30
–10
10
–20
0
–15
5
–25
–5
0 4 8 12 16 20 242610 14 18 22
INPUT POW E R ( dBm)
PHASE S HIF T (Degrees)
14V
10V
7V
3V
1V
0V
16963-025
Figure 25. Phase Shift vs. Input Power at Various Voltages, VFCTL = VBWCTL
Data Sheet HMC892ALP5E
Rev. 0 | Page 9 of 11
THEORY OF OPERATION
The HMC892ALP5E is a tunable band-pass filter that features a
user selectable pass-band frequency. Varying the applied analog
tuning voltage between 0 V and 14 V at the VFCTL pin varies the
center frequency between 3.45 GHz and 6.25 GHz. The bandwidth
of the filter is adjustable by using the VBWCTL control voltage,
which varies from 0 V to 14 V. Typical operation is to tie both
VFCTL and VBWCTL control voltages together.
HMC892ALP5E Data Sheet
Rev. 0 | Page 10 of 11
APPLICATIONS INFORMATION
TYPICAL APPLICATION CIRCUIT
Figure 26 shows the typical application circuit for the
HMC892ALP5E. RFIN and RFOUT are dc-coupled and require
external 100 pF series capacitors (C1 and C2).
16963-026
RFOUTRFIN
V
FCTL
J4
V
BWCTL
J3
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
C1
100pF
C2
100pF
OUT
J2
IN
J1
PACKAGE
BASE
GND
Figure 26. Typical Application Circuit
EVALUATION PCB INFORMATION
All RF traces are routed on Layer 1 (primary side), and all other
layers are ground planes that provide a solid ground for RF
transmission lines, as shown in Figure 27. The top dielectric
material is Rogers 4350, offering low loss performance. The
preimpregnated (PREPREG) material in Layer 2 sticks the
Isola 370HR with copper trace layers above and below together.
Both the PREPREG material and the Isola 370HR core layer are
used to achieve required board finish thickness.
NOMINAL
FINISHED
BOARD
T
HICKNESS 0.062"
±10%
PRIMARY SILKSCREEN
PRIMARY SOLDER MASK
PRIMARY SIDE (LAYER 1)
L2_GND PLANE (LAYER 2)
L3_GND PLANE (LAYER 3)
SECONDARY SIDE (LAYER 4)
0.5oz Cu
ARLON OR ROGERS CORE 10MILS ±1MIL (CRITICAL)
0.5oz Cu
PREPREG AS REQUIRED
0.5oz Cu
370HR
0.5oz Cu
16963-027
Figure 27. 4-Layer Stackup
The printed circuit board (PCB) used in the application uses
radio frequency (RF) circuit design techniques. Signal lines
must have a 50 Ω impedance while the package ground leads
and exposed pad must be connected directly to the ground
plane (see Figure 28). Use a sufficient number of via holes to
connect the top and bottom ground planes. The evaluation PCB
shown in Figure 28 is available from Analog Devices, Inc., upon
request. The HMC890ALP5E evaluation board in Figure 28 is
used to evaluate the HMC892ALP5E device.
Table 4. Bill of Materials
Item Description
J1 to J2 PCB mounts SRI, SMA connector
J3 to J4 PCB mounts, Johnson SMA connector
C1, C2 100 pF capacitors, 0402 package
U1 HMC892ALP5E
PCB1 08-0495982 evaluation PCB
1 Circuit board material is Arlon 25FR or Rogers 25FR.
2 08-049598 is the raw bare PCB identifier. Reference EV1HMC891ALP5 when
ordering the complete evaluation PCB.
16963-028
Figure 28. Evaluation PCB Top Layer
Data Sheet HMC892ALP5E
Rev. 0 | Page 11 of 11
OUTLINE DIMENSIONS
0.50
0.40
0.30
10-20-2017-C
1
0.50
BSC
BOTTOM VIEWTOP VIEW
TOP VIEW
PIN 1
INDICATOR
32
9
16
17
24
25
8
EXPOSED
PAD
SEATING
PLANE
0.05 M AX
0.02 NO M
0.20 REF
COPLANARITY
0.08
0.30
0.25
0.18
5.10
5.00 SQ
4.90
0.80
0.75
0.70
FOR PRO P E R CONNECT IO N OF
THE EXPOSED PAD, REFER TO
THE PIN CO NFI GURATIO N AND
FUNCTION DES CRIPT IO NS
SECTION OF THIS DATA SHEET.
0.20 M IN
3.75
3.60 SQ
3.55
COM P LIANT T O JEDEC S TANDARDS M O-220-WHHD-5
PKG-004570
PIN 1
INDIC ATOR AREA OPT IONS
(SEE DETAIL A)
DETAIL A
(JEDEC 95)
Figure 29. 32-Lead Lead Frame Chip Scale Package [LFCSP]
5 mm × 5 mm Body and 0.75 mm Package Height
(CP-32-12)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option
HMC892ALP5E −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP] CP-32-12
HMC892ALP5ETR
−40°C to +85°C
32-Lead Lead Frame Chip Scale Package [LFCSP]
CP-32-12
EV1HMC892ALP5 Evaluation PCB
1 All models are RoHS compliant parts.
©2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D16963-0-9/18(0)
