PTFA092211EL
PTFA092211FL
Confidential, Limited Internal Distribution
Data Sheet 1 of 10 Rev. 02, 2009-05-27
All published data at TCASE = 25 °C unless otherwise indicated
ESD: Electrostatic discharge sensitive device—observe handling precautions!
Description
The PTFA092211EL and PTFA092211FL are 220-watt, internally-
matched LDMOS FETs intended for EDGE and WCDMA applications
in the 920 to 960 MHz band. Manufactured with Infineon's advanced
LDMOS process, these devices provide excellent thermal
performance and superior reliability.
PTFA092211EL
Package H-33288-2
Thermally-Enhanced High Power RF LDMOS FETs
220 W, 920 – 960 MHz
Two-carrier WCDMA Performance
VDD = 30 V, IDQ
= 1.50 A, ƒ = 940 MHz, 3GPP WCDMA
signal, PAR = 6.5 dB, 5 MHz carrier spacing
10
15
20
25
30
35
40
40 41 42 43 44 45 46 47 48 49
Output Power, Avg. (dBm)
Drain Efficiency (%)
-50
-45
-40
-35
-30
-25
-20
ACPR (dBc)
Efficiency
ACP
RF Characteristics
PTFA092211FL
Package H-34288-2
Features
Broadband internal matching
Typical two-carrier WCDMA performance at
940 MHz, 30 V
- Average output power = 50 W
- Linear Gain = 18.0 dB
- Efficiency = 30%
- Intermodulation distortion = –37 dBc
Typical CW performance, 940 MHz, 30 V
- Output power at P–1dB = 250 W
- Gain = 17.0 dB
- Efficiency = 59%
Integrated ESD protection: Human Body Model,
Class 2 (minimum)
Excellent thermal stability, low HCI drift
Capable of handling 10:1 VSWR @ 30 V,
220 W (CW) output power
Pb-free, RoHS-compliant and thermally-enhanced
packages
*See Infineon distributor for future availability.
Two-carrier WCDMA Measurements (tested in Infineon test fixture)
VDD = 30 V, IDQ = 1750 mA, POUT = 50 W (AVG),
ƒ1 = 937.5 MHz, ƒ2 = 942.5 MHz, 3GPP signal, channel bandwidth = 3.84 MHz, peak/average = 7.5 dB @ 0.01% CCDF
Characteristic Symbol Min Typ Max Unit
Gain Gps 17.0 18.0 dB
Drain Efficiency ηD28.5 30 %
Intermodulation Distortion IMD –34 –32 dBc
Data Sheet 2 of 10 Rev. 02, 2009-05-27
PTFA092211EL
PTFA092211FL
Confidential, Limited Internal Distribution
RF Characteristics (cont.)
Two-tone Measurements (tested in Infineon test fixture)
VDD = 30 V, IDQ = 1750 mA, POUT = 220 W PEP, ƒ = 940 MHz, tone spacing = 1 MHz
Characteristic Symbol Min Typ Max Unit
Gain Gps 18.0 dB
Drain Efficiency ηD44 %
Intermodulation Distortion IMD –29 dBc
DC Characteristics
Characteristic Conditions Symbol Min Typ Max Unit
Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 V
Drain Leakage Current VDS = 28 V, VGS = 0 V IDSS 1.0 µA
VDS = 63 V, VGS = 0 V IDSS 10.0 µA
On-State Resistance VGS = 10 V, VDS = 0.1 V RDS(on) 0.04
Operating Gate Voltage VDS = 30 V, IDQ = 1750 mA VGS 2.0 2.5 3.0 V
Gate Leakage Current VGS = 10 V, VDS = 0 V IGSS 1.0 µA
Maximum Ratings
Parameter Symbol Value Unit
Drain-Source Voltage VDSS 65 V
Gate-Source Voltage VGS –0.5 to +12 V
Junction Temperature TJ200 °C
Total Device Dissipation PD700 W
Above 25 °C derate by 4.0 W/°C
Storage Temperature Range TSTG –40 to +150 °C
Thermal Resistance (TCASE = 70 °C, 220 W CW) RθJC 0.25 °C/W
Ordering Information
Type and Version Package Type Package Description Shipping Marking
PTFA092211EL V4 H-33288-2 Thermally-enhanced slotted flange, Tray PTFA092211EL
single-ended
PTFA092211FL V4 H-34288-2 Thermally-enhanced earless flange, Tray PTFA092211FL
single-ended
PTFA092211EL
PTFA092211FL
Confidential, Limited Internal Distribution
Data Sheet 3 of 10 Rev. 02, 2009-05-27
CW Performance
Gain & Efficiency vs. Output Power
VDD = 30 V, IDQ = 1.75 A, ƒ = 940 MHz
14
15
16
17
18
19
20
35 40 45 50 55
Output Power (dBm)
Gain (dB)
0
10
20
30
40
50
60
Drain Efficiency (%)
Efficiency
Gain
CW Performance
Gain & Efficiency vs. Output Power
VDD = 30 V, IDQ = 1.75 A, ƒ = 940 MHz
14
15
16
17
18
19
20
35 40 45 50 55
Output Power (dBm)
Gain (dB)
0
10
20
30
40
50
60
Drain Efficiency (%)
Efficiency
Gain
TCASE = 25°C
TCASE = 90°C
Typical Performance (data taken in a production test fixture)
Two-tone Broadband Performance
Gain, Efficiency & Return Loss vs. Frequency
VDD = 30 V, IDQ = 1.75 A, POUT = 110 W
15
20
25
30
35
40
45
900 910 920 930 940 950 960 970 980
Frequency (MHz)
Efficiency (%), Gain (dB)
-35
-30
-25
-20
-15
-10
-5
Return Loss (dB)
Return Loss
Gain
Efficiency
Power Sweep, CW
VDD = 30 V, ƒ = 940 MHz
16
17
18
19
30 35 40 45 50 55
Output Power (dBm)
Power Gain (dB)
IDQ = 1.6 A
IDQ = 2.0 A
IDQ = 1.2 A
PTFA092211EL
PTFA092211FL
Confidential, Limited Internal Distribution
Data Sheet 4 of 10 Rev. 02, 2009-05-27
Six-carrier GSM Performance
VDD = 30 V, IDQ
= 1.6 A, ƒ = 940 MHz,
P/AR = 7 dB
0
10
20
30
40
50
60
37 39 41 43 45 47 49
Output Power (dBm)
Drain Efficiency (%)
-50
-45
-40
-35
-30
-25
-20
IMD (dBc) , ACPR (dBc)
Efficiency
IMD Low
Gain
IMD Up
Bias Voltage vs. Temperature
Voltage normalized to typical gate voltage,
series show current
0.96
0.97
0.98
0.99
1.00
1.01
1.02
1.03
-20 020 40 60 80 100
Case Temperature (°C)
Normalized Bias Voltage (V)
2.33 A
4.65 A
9.33 A
11.64 A
13.98 A
Intermodulation Distortion vs. Output Power
VDD = 30 V, IDQ = 1.75 A, ƒ1 = 939 MHz, ƒ2 = 940 MHz
-80
-70
-60
-50
-40
-30
-20
40 44 48 52 56
Output Power, PEP (dBm)
IMD (dBc)
5th
7th
3rd Order
Typical Performance (cont.)
Data Sheet 5 of 10 Rev. 02, 2009-05-27
PTFA092211EL
PTFA092211FL
Confidential, Limited Internal Distribution
0.1
0.3
0.5
0.2
0.4
0.1
0.1
-
W
AV
E
LE
N
GT
H
S T
O
W
AR
D
G
E
NE
R
A
T
V
E
LE
N
G
TH
S
T
O
W
AR
D
L
OA
D
-
0
.0
Z Load
Z Source
900 MHz
980 MHz
Broadband Circuit Impedance
Z Source Z Load
G
S
D
Frequency Z Source Z Load
MHz RjX RjX
900 1.530 -0.650 1.480 -0.110
920 1.520 -0.380 1.430 0.180
940 1.520 -0.140 1.390 0.470
960 1.520 0.090 1.360 0.750
980 1.540 0.330 1.360 1.020
Z0 = 50
Data Sheet 6 of 10 Rev. 02, 2009-05-27
PTFA092211EL
PTFA092211FL
Confidential, Limited Internal Distribution
Reference Circuit
Reference circuit block diagram for ƒ = 960 MHz
Circuit Assembly Information
DUT PTFA092211EL or PTFA092211FL LDMOS Transistor
PCB 0.76 mm [.030"] thick, εr = 3.48 Rogers RO4350 1 oz. copper
Microstrip Electrical Characteristics at 960 MHz1Dimensions: L x W (mm) Dimensions: L x W (in.)
l10.068 λ, 52.0 W12.78 x 1.60 0.503 x 0.063
l20.041 λ, 38.0 7.57 x 2.54 0.298 x 0.100
l30.040 λ, 38.0 7.34 x 2.54 0.289 x 0.100
l40.056 λ, 7.8 9.65 x 17.83 0.380 x 0.702
l50.061 λ, 7.8 10.59 x 17.83 0.417 x 0.702
l60.208 λ, 78.3 40.64 x 0.74 1.600 x 0.029
l7, l80.200 λ, 60.1 38.10 x 1.24 1.500 x 0.049
l90.102 λ, 8.4 17.65 x 16.48 0.695 x 0.649
l10 (taper) 0.044 λ, 8.4 / 12.0 7.82 x 16.48 / 11.0 0.308 x 0.649 / 0.433
l11 (taper) 0.065 λ, 12.0 / 37.7 11.43 x 11.00 / 2.64 0.450 x 0.433 / 0.104
l12 0.022 λ, 37.0 4.04 x 2.64 0.159 x 0.104
l13 0.035 λ, 52.0 6.55 x 1.60 0.258 x 0.063
1Electrical characteristics are rounded.
RF_IN RF_OUT
a092211 efl-v4_cd _5-6-09
Q1
QQ1
C1
C3
C2
R1
R2
C7
R7R6
C5C6
R4
R5
R8
C9
C8
C10
C17
C11
C13 C12
C14
C16
C21
C20
C19 C18
R3
C22
C15
L2
C25
C23
C24
L1
C4
100
HFK
7JN
100
HFK
7JN
C6
Data Sheet 7 of 10 Rev. 02, 2009-05-27
PTFA092211EL
PTFA092211FL
Confidential, Limited Internal Distribution
Reference circuit assembly diagram (not to scale)*
Reference Circuit (cont.)
Component Description Suggested Manufacturer P/N or Comment
C1, C2, C3 Capacitor, 0.001 µF Digi-Key PCC1772CT-ND
C4 Tantalum Capacitor, 10 µF, 35 V Digi-Key 399-1655-2-ND
C5, C15, C21 Capacitor, 0.1 µF Digi-Key PCC104BCT-ND
C12, C18 Capacitor, 1 µF Digi-Key 445-1411-1-ND
C7, C8, C11, C17, C25 Ceramic Capacitor, 33 pF ATC 100B 330
C9 Ceramic Capacitor, 3.9 pF ATC 100B 3R9
C10 Ceramic Capacitor, 6.8 pF ATC 100A 6R8
C16, C22 Tantalum Capacitor, 10 µF, 50 V Garrett Electronics TPSE106K050R0400
C13, C19 Multilayer Ceramic Capacitor, 10 µF, 50 V Digi-Key 445-3497-2-ND
C14, C20 Electrolitic Capacitor, 100 µF, 50 V Digi-Key P5571-ND
C23, C24 Ceramic Capacitor, 2.6 pF ATC 100B 2R6
C6 Capacitor, 20 nF ATC ATC200B 203
L1, L2 Ferrite, 8.9 mm Elna Magnetics BDS 4.6/3/8.9-4S2
Q1 Transistor Infineon Technologies BCP56
QQ1 Voltage Regulator National Semiconductor LM7805
R1 Chip Resistor, 1.2 k-ohms Digi-Key P1.2KGCT-ND
R2 Chip Resistor, 1.3 k-ohms Digi-Key P1.3KGCT-ND
R3 Chip Resistor, 2 k-ohms Digi-Key P2KECT-ND
R4 Potentiometer, 2 k-ohms Digi-Key 3224W-202ETR-ND
R5, R8 Chip Resistor, 10 ohms Digi-Key P10ECT-ND
R6, R7 Chip Resistor, 5.1 k-ohms Digi-Key P5.1KECT-ND
*Gerber Files for this circuit available on request
L2
l11 l12 l13
l7
C11
33pF
C12
1µF
C14
100µF
50V
C13
10µF
50V
L1
C17
33pF
C18
1µF
C21
0.1µF
R3
2K V
C3
0.001µF
C2
0.001µF
Q1
BCP56
R2
1.3K V
QQ1
LM7805
C1
0.001µF
VDD
R5
10 V
R4
2K V
R1
1.2K V
C8
33pF
l1
C9
3.9pF
l2l3l4
J1 J2
C16
10µF
50V
C15
0.1µF
C19
10µF
50V
C22
10µF
50V
C20
100µF
50V
VDD
R6
2.4K V
C6
20nF
C4
10µF
35V
C5
0.1µF
R7
2.4K V
C7
33pF
C10
6.8pF
l5
R8
10 V
l6
C23
2.6pF C25
33pF
C24
2.6pF
l9
DUT
l8
l10
Data Sheet 8 of 10 Rev. 02, 2009-05-27
PTFA092211EL
PTFA092211FL
Confidential, Limited Internal Distribution
Package Outline Specifications
Package H-33288-2
Diagram Notes—unless otherwise specified:
1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. All tolerances ± 0.127 [.005] unless specified otherwise.
4. Pins: D = drain, S = source, G = gate.
5. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001].
6. Gold plating less than 0.25 micron [10 microinch].
C66065-A0003-C723-01-0027 H-33288-2.dwg
Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/rfpower
Data Sheet 9 of 10 Rev. 02, 2009-05-27
PTFA092211EL
PTFA092211FL
Confidential, Limited Internal Distribution
Package Outline Specifications (cont.)
Package H-34288-2
C66065-A0003-C724-01-0027 H-34288-2.dwg
Diagram Notes—unless otherwise specified:
1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. All tolerances ± 0.127 [.005] unless specified otherwise.
4. Pins: D = drain, S = source, G = gate.
5. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001].
6. Gold plating less than 0.25 micron [10 microinch].
Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/rfpower
Data Sheet 10 of 10 Rev. 02, 2009-05-27
PTFA092211EL/FL V4
Confidential, Limited Internal Distribution
Revision History: 2009-05-27 Data Sheet
Previous Version: 2009-04-17 Preliminary Data Sheet
Page Subjects (major changes since last revision)
1, 2 Update information
3, 4 Modify and update graphs
6, 7 Update circuit diagrams and information
5Update impedance data
GOLDMOS® is a registered trademark of Infineon Technologies AG.
Edition 2009-05-27
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2009 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of
any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
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Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
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