HSMP-386x
Surface Mount PIN Diodes
Data Sheet
Features
• Unique Congurations in Surface Mount Packages
– Add Flexibility
– Save Board Space
– Reduce Cost
• Switching
– Low Distortion Switching
– Low Capacitance
• Attenuating
–
Low Current Attenuating for Less Power
Consumption
• Matched Diodes for Consistent Performance
• Better Thermal Conductivity for Higher Power
Dissipation
• Low Failure in Time (FIT) Rate[1]
• Lead-free
Note:
1. For more information see the Surface Mount PIN Reliability Data
Sheet.
Description/Applications
The HSMP-386x series of general purpose PIN diodes are
designed for two classes of applications. The rst is attenu-
ators where current consumption is the most important
design consideration. The second application for this
series of diodes is in switches where low capacitance is the
driving issue for the designer.
The HSMP-386x series Total Capacitance (CT) and Total Re-
sistance (RT) are typical specications. For applications that
require guaranteed performance, the general purpose HSMP-
383x series is recommended.
A SPICE model is not available for PIN diodes as SPICE
does not provide for a key PIN diode characteristic, carrier
lifetime.
Pin Connections and Package Marking, SOT-363
Notes:
1. Package marking provides orientation, identication, and date code.
2. See “Electrical Specications” for appropriate package marking.
LUx
1
2
3
6
5
4
2
Package Lead Code Identication,
SOT-23, SOT-143
(Top View)
Package Lead Code Identication,
SOT-323
(Top View)
COMMON
CATHODE
#4
COMMON
ANODE
#3
SERIES
#2
SINGLE
#0
COMMON
CATHODE
F
COMMON
ANODE
E
SERIES
C
SINGLE
B
Package Lead Code Identication,
SOT-363
(Top View)
UNCONNECTED
TRIO
L
1 2 3
6 5 4
Electrical Specications TC = 25°C, each diode
PIN General Purpose Diodes, Typical Specications TA = 25°C
Package Minimum Typical Typical
Part Number Marking Lead Breakdown Series Resistance Total Capacitance
HSMP- Code Code Conguration Voltage VBR (V) RS (Ω) CT (pF)
3860 L0 0 Single 50 3.0/1.5* 0.20
3862 L2 2 Series
3863 L3 3 Common Anode
3864 L4 4 Common Cathode
386B L0 B Single
386C L2 C Series
386E L3 E Common Anode
386F L4 F Common Cathode
386L LL L Unconnected Trio
Test Conditions VR = VBR IF = 10 mA VR = 50 V
Measure f = 100 MHz f = 1 MHz
IR ≤ 10 µA IF = 100 mA*
Absolute Maximum Ratings[1] TC = +25°C
Symbol Parameter Unit SOT-23 SOT-323
IfForward Current (1 µs Pulse) Amp 1 1
PIV Peak Inverse Voltage V 50 50
TjJunction Temperature °C 150 150
Tstg Storage Temperature °C -65 to 150 -65 to 150
qjc Thermal Resistance[2] °C/W 500 150
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to the device.
2. TC = +25°C, where TC is dened to be the temperature at the package pins where contact is made to
the circuit board.
ESD WARNING:
Handling Precautions Should Be Taken To Avoid
Static Discharge.
RING
QUAD
#7
1
3
2
4
UNDER DEVELOPMENT
3
HSMP-386x Typical Parameters at TC = 25°C
Part Number Total Resistance Carrier Lifetime Reverse Recovery Time Total Capacitance
HSMP- RT (Ω) t (ns) Trr (ns) CT (pF)
386x 22 500 80 0.20
Test Conditions IF = 1 mA IF = 50 mA VR = 10 V VR = 50 V
f = 100 MHz TR = 250 mA IF = 20 mA f = 1 MHz
90% Recovery
Typical Performance, TC = 25°C, each diode
Figure 1. RF Capacitance vs. Reverse Bias.
0.15
0.30
0.25
0.20
0.35
0 2 64 10 128 1614 18 20
TOTAL CAPACITANCE (pF)
REVERSE VOLTAGE (V)
1 GHz
100 MHz
1 MHz
120
115
110
105
100
95
90
85
1 10 30
I
F
– FORWARD BIAS CURRENT (mA)
Figure 3. 2nd Harmonic Input Intercept Point
vs. Forward Bias Current for Switch Diodes.
INPUT INTERCEPT POINT (dBm)
Diode Mounted as a
Series Switch in a
50 Microstrip and
Tested at 123 MHz
FORWARD CURRENT (mA)
Figure 4. Reverse Recovery Time vs. Forward
Current for Various Reverse Voltages.
T
rr
– REVERSE RECOVERY TIME (ns)
10
100
1000
10 20 30
VR = 5V
VR = 10V
VR = 20V
Figure 2. Typical RF Resistance vs. Forward Bias
Current.
0.01 100
1000
1
10
RESISTANCE (OHMS)
BIAS CURRENT (mA)
10
100
10.1
TA = +85 C
TA = +25 C
TA = –55 C
100
10
1
0.1
0.01
0 0.2 0.4 0.6 0.8 1.0 1.2
I
F
– FORWARD CURRENT (mA)
V
F
– FORWARD VOLTAGE (mA)
Figure 5. Forward Current vs. Forward
Voltage.
125 C 25 C –50 C
Equivalent Circuit Model
HSMP-386x Chip*
0.12 pF
1.5 Ω
R
j
R
s
C
j
R
j
= 12 Ω
I
0.9
R
T
= 1.5 + R
j
C
T
= C
P
+ C
j
I = Forward Bias Current in mA
* See AN1124 for package models
4
Typical Applications for Multiple Diode Products
Figure 10. Four Diode π Attenuator. See AN1048 for details.
INPUT RF IN/OUT
Figure 10. Four Diode p Attenuator. See AN1048 for details.
FIXED
BIAS
VOLTAGE
VARIABLE BIAS
Figure 6. Simple SPDT Switch, Using Only Positive Current. Figure 7. High Isolation SPDT Switch, Dual Bias.
Figure 8. Switch Using Both Positive and Negative Current. Figure 9. Very High Isolation SPDT Switch, Dual Bias.
RF COMMON
RF 1
BIAS 1
RF 2
BIAS 2
RF COMMON
RF 1 RF 2
BIAS
RF COMMON
BIAS BIAS
RF 2
RF 1
5
Typical Applications for Multiple Diode Products (continued)
RF in RF out
1
+V
0
2
0
+V
“ON”
“OFF”
456
1
1 1
2
2
3
1
123
4
05 6
b1 b2 b3
2
3
1
1 1
RF in RF out
2
2
3
4 5 6
1
0
0
2
+V
–V
“ON”
“OFF”
Figure 12. HSMP-386L Unconnected Trio used in a Positive Voltage,
High Isolation Switch.
Figure 14. HSMP-386L Unconnected Trio used in a Dual Voltage,
High Isolation Switch.
Figure 13. HSMP-386L used in a SP3T Switch.
Figure 11. High Isolation SPST Switch
(Repeat Cells as Required).
BIAS
Figure 11. High Isolation SPST Switch
(Repeat Cells as Required).
6
Assembly Information
SOT-323 PCB Footprint
Recommended PCB pad layouts for the miniature SOT
packages are shown in Figures 15, 16, 17. These layouts
provide ample allowance for package placement by
automated assembly equipment without adding parasitics
that could impair the performance.
0.026
0.039
0.079
0.022
Dimensions in inches
Figure 15. Recommended PCB Pad Layout for Avago’s SC70 3L/SOT-323
Products.
0.026
0.079
0.018
0.039
Dimensions in inches
Figure 16. Recommended PCB Pad Layout for Avago’s SC70 6L/SOT-363 Prod-
ucts.
0.039
1
0.039
1
0.079
2.0
0.031
0.8
Dimensions in inches
mm
0.035
0.9
Figure 17. Recommended PCB Pad Layout for Avago’s SOT-23 Products.
Ordering Information
Specify part number followed by option. For example:
HSMP - 386x - XXX
Bulk or Tape and Reel Option
Part Number; x = Lead Code
Surface Mount PIN
Option Descriptions
-BLKG = Bulk, 100 pcs. per antistatic bag
-TR1G = Tape and Reel, 3000 devices per 7" reel
-TR2G = Tape and Reel, 10,000 devices per 13" reel
Tape and Reeling conforms to Electronic Industries RS-481,
“Taping of Surface Mounted Components for Automated Placement.”
7
Lead-Free Reow Prole Recommendation (IPC/JEDEC J-STD-020C)
Reow Parameter Lead-Free Assembly
Average ramp-up rate (Liquidus Temperature (TS(max) to Peak) 3°C/ second max
Preheat Temperature Min (TS(min)) 150°C
Temperature Max (TS(max)) 200°C
Time (min to max) (tS) 60-180 seconds
Ts(max) to TL Ramp-up Rate 3°C/second max
Time maintained above: Temperature (TL) 217°C
Time (tL) 60-150 seconds
Peak Temperature (TP) 260 +0/-5°C
Time within 5 °C of actual Peak temperature (tP) 20-40 seconds
Ramp-down Rate 6°C/second max
Time 25 °C to Peak Temperature 8 minutes max
Note 1: All temperatures refer to topside of the package, measured on the package body surface
Figure 18. Surface Mount Assembly Prole.
25
Time
Temperature
Tp
T
L
tp
t
L
t 25°C to Peak
Ramp-up
ts
Ts
min
Ramp-down
Preheat
Critical Zone
T
L
to Tp
Ts
max
SMT Assembly
Reliable assembly of surface mount components is a
complex process that involves many material, process, and
equipment factors, including: method of heating (e.g., IR
or vapor phase reow, wave soldering, etc.) circuit board
material, conductor thickness and pattern, type of solder
alloy, and the thermal conductivity and thermal mass of
components. Components with a low mass, such as the SOT
package, will reach solder reow temperatures faster than
those with a greater mass.
Avago’s diodes have been qualied to the time-tempera-
ture prole shown in Figure 18. This prole is representative
of an IR reow type of surface mount assembly process.
After ramping up from room temperature, the circuit board
with components attached to it (held in place with solder
paste) passes through one or more preheat zones. The
preheat zones increase the temperature of the board and
components to prevent thermal shock and begin evaporat-
ing solvents from the solder paste. The reow zone briey
elevates the temperature suciently to produce a reow
of the solder.
The rates of change of temperature for the ramp-up and
cool-down zones are chosen to be low enough to not cause
deformation of the board or damage to components due
to thermal shock. The maximum temperature in the reow
zone (TMAX) should not exceed 260°C.
These parameters are typical for a surface mount assembly
process for Avago diodes. As a general guideline, the circuit
board and components should be exposed only to the
minimum temperatures and times necessary to achieve a
uniform reow of solder.
8
Package Dimensions
Outline 23 (SOT-23)
Package Characteristics
Lead Material ........................................... Copper (SOT-323/363); Alloy 42 (SOT-23)
Lead Finish .........................................................................Tin 100% (Lead-free option)
Maximum Soldering Temperature ............................................ 260°C for 5 seconds
Minimum Lead Strength ...........................................................................2 pounds pull
Typical Package Inductance ...................................................................................... 2 nH
Typical Package Capacitance .............................................. 0.08 pF (opposite leads)
Outline SOT-323 (SC-70, 3 Lead)
Outline 363 (SC-70, 6 Lead)
e
B
e2
e1
E1
C
EXXX
L
D
A
A1
Notes:
XXX-package marking
Drawings are not to scale
DIMENSIONS (mm)
MIN.
0.79
0.000
0.30
0.08
2.73
1.15
0.89
1.78
0.45
2.10
0.45
MAX.
1.20
0.100
0.54
0.20
3.13
1.50
1.02
2.04
0.60
2.70
0.69
SYMBOL
A
A1
B
C
D
E1
e
e1
e2
E
L
e
B
e1
E1
C
EXXX
L
D
A
A1
Notes:
XXX-package marking
Drawings are not to scale
DIMENSIONS (mm)
MIN.
0.80
0.00
0.15
0.08
1.80
1.10
1.80
0.26
MAX.
1.00
0.10
0.40
0.25
2.25
1.40
2.40
0.46
SYMBOL
A
A1
B
C
D
E1
e
e1
E
L
1.30 typical
0.65 typical
E
HE
D
e
A1
b
A
A2
DIMENSIONS (mm)
MIN.
1.15
1.80
1.80
0.80
0.80
0.00
0.15
0.08
0.10
MAX.
1.35
2.25
2.40
1.10
1.00
0.10
0.30
0.25
0.46
SYMBOL
E
D
HE
A
A2
A1
e
b
c
L
0.650 BCS
L
c
9
USER
FEED
DIRECTION
COVER TAPE
CARRIER
TAPE
REEL
Note: "AB" represents package marking code.
"C" represents date code.
END VIEW
8 mm
4 mm
TOP VIEW
ABC ABC ABC ABC
END VIEW
8 mm
4 mm
TOP VIEW
Note: "AB" represents package marking code.
"C" represents date code.
ABC ABC ABC ABC
Device Orientation
Tape Dimensions and Product Orientation
For Outline SOT-23
For Outlines SOT-23, -323 For Outline SOT-363
9� MAX
A
0
P
P
0
D
P
2
E
F
W
D
1
Ko 8� MAX
B
0
13.5� MAX
t1
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A
0
B
0
K
0
P
D
1
3.15
±
0.10
2.77
±
0.10
1.22
±
0.10
4.00
±
0.10
1.00 + 0.05
0.124
±
0.004
0.109
±
0.004
0.048
±
0.004
0.157
±
0.004
0.039
±
0.002
CAVITY
DIAMETER
PITCH
POSITION
D
P
0
E
1.50 + 0.10
4.00
±
0.10
1.75
±
0.10
0.059 + 0.004
0.157
±
0.004
0.069
±
0.004
PERFORATION
WIDTH
THICKNESS
W
t1
8.00 + 0.30 - 0.10
0.229
±
0.013
0.315 + 0.012 - 0.004
0.009
±
0.0005
CARRIER TAPE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P
2
3.50
±
0.05
2.00
±
0.05
0.138
±
0.002
0.079
±
0.002
DISTANCE
BETWEEN
CENTERLINE
Tape Dimensions and Product Orientation
For Outlines SOT-323, -363
P
P
0
P
2
F
W
C
D
1
D
E
A
0
An
t
1
(CARRIER TAPE THICKNESS) T
t
(COVER TAPE THICKNESS)
An
B
0
K
0
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A
0
B
0
K
0
P
D
1
2.40
±
0.10
2.40
±
0.10
1.20
±
0.10
4.00
±
0.10
1.00 + 0.25
0.094
±
0.004
0.094
±
0.004
0.047
±
� 0.004
0.157
±
0.004
0.039 + 0.010
CAVITY
DIAMETER
PITCH
POSITION
D
P
0
E
1.55
±
0.05
4.00
±
0.10
1.75
±
0.10
0.061
±
0.002
0.157
±
0.004
0.069
±
0.004
PERFORATION
WIDTH
THICKNESS
W
t
1
8.00
±
0.30
0.254
±
0.02
0.315
±
0.012
0.0100
±
0.0008
CARRIER TAPE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P
2
3.50
±
0.05
2.00
±
0.05
0.138
±
0.002
0.079
±
0.002
DISTANCE
FOR SOT-323 (SC70-3 LEAD) An 8
°
C MAX
FOR SOT-363 (SC70-6 LEAD) 10
°
C MAX
ANGLE
WIDTH
TAPE THICKNESS
C
T
t
5.4
±
0.10
0.062
±
0.001
0.205
±
0.004
0.0025
±
0.00004
COVER TAPE
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Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved. Obsoletes 5989-4028EN
AV02-0293EN - June 2, 2009