National Semiconductor December 8, 2005
Rev J
Evaluation Board User's Guide
ADC12D040 Dual 12-Bit, 40 MSPS, 5 Volt, 600 mW
ADC11DL066 Dual 11-Bit, 66 MSPS 3.3 Volt, 862 mW
ADC12DL066 Dual 12-Bit, 66 MSPS 3.3 Volt, 862 mW
A/D Converters with Internal Reference and Sample & Hold
© 2003, 2004, 2005 National Semiconductor Corporation.
1 http://www.national.com
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2 http://www.national.com
Table of Contents
1.0 Introduction.............................................................................................................................4
2.0 Board Assembly .....................................................................................................................4
3.0 Quick Start..............................................................................................................................5
4.0 Functional Description............................................................................................................5
4.1 Input (signal conditioning) circuitry ............................................................................5
4.2 ADC reference circuitry .............................................................................................6
4.3 ADC Cock Circuit ......................................................................................................6
4.4 Digital Data Output ....................................................................................................6
4.5 Power Supply Connections .......................................................................................6
4.6 Power Requirements.................................................................................................6
5.0 Software Operation and Settings ...........................................................................................6
6.0 Evaluation Board Specifications.............................................................................................7
8.0 ADC12D040 / ADC12DL066 Evaluation Board Bill of Materials ............................................9
A1.0 Operating in the Computer Mode.........................................................................................10
A2.0 Summary Tables of Test Points, Jumpers and Connectors ................................................10
3 http://www.national.com
1.0 Introduction and is also available at the FutureBus connector J5. See
schematic of Figure 2.
The ADC12D040EVAL, the ADC11DL066EVAL and the
ADC12DL066EVAL Design Kits (consisting of the ADC12D040,
ADC11DL066 or the ADC12DL066 Evaluation Board, this User's
Guide and the WaveVision4 Data Capture Board and its User's
Guide and WaveVision4 software) are designed to ease evaluation
and design-in of National Semiconductor's ADC12D040 dual
Analog-to-Digital Converter, which can operate at sample rates up
to 40 Msps, the ADC11DL066 or the ADC12DL066 dual 12-bit
Analog-to-Digital Converters, which operate at sample rates up to
66 Msps. Further reference in this User's Guide to the ADC12D040
is meant to also include the ADC11DL066 and the ADC12DL066
and references to the ADC12DL066 include the ADC11DL066,
unless otherwise specified or implied.
Upon command, the software will perform an FFT on the captured
data. This FFT plot also shows dynamic performance in the form of
SNR, SINAD, THD, SFDR and ENOB.
The Signal at the Analog Inputs (J1 for input VIN_A and J2 for
input VIN_B) are available at differential Test Points TP6 and TP5
respectively. These signals can be viewed with a Differential
Probe.
The ADC12D040 can operate with an external reference or with its
internal reference. Accordingly, jumper JP2 is used to select use of
the ADC internal reference or the separate reference provided on
the evaluation board. The internal reference is used with a jumper
on JP2. The external reference on the board is used when the
jumper on J2 is removed. Provision is made for adjustment of the
external Reference Voltage, VREF, with R3. This voltage is
regulated with an LM4040-2.5 reference for the ADC12D040, or an
LM4140-1.2 reference for the ADC12DL066, and can be set to
values between 0.8V to 2.5V for the ADC12D040 and to values
between 0.4V and 1.2V for the ADC12DL066.
The evaluation board can be used in either of two modes. In the
Manual mode, suitable test equipment, such as a logic analyzer,
can be used with the board to evaluate the ADC12D040
performance.
In the Computer or Automatic mode, evaluation is simplified by
connecting the board to National Semiconductor's Data Capture
Boards (order number WAVEVSN BRD 4.0), which is connected
through a USB communication port to a personal computer
running WaveVision4 software. The WaveVision4 program can be
downloaded free from the web at http://www.national.com/adc.
2.0 Board Assembly
The ADC12D040 evaluation board comes fully assembled and
ready for use. Refer to the Bill of Materials for a description of
components, to Figure 1 for major component placement and to
Figure 2 for the Evaluation Board schematic.
The WaveVision4 software operates under Microsoft Windows.
The signal at the two the Analog Inputs is digitized and can be
captured and displayed on a PC monitor as a dynamic waveform
TP_3.3
A
B
D
C
J3
RP5 RP6 RP7 RP8
RP2 RP3
R
P
1
R
P
4
U4
U5
U5
U2
U
8
TP_GND_4
TP_GND_2
J4
JP9
L1
L2
U7
D1 TP1
T1T2
U
6
TP3
TP4
TP2
TP_GND_3
P1
U9
D4
JP1
JP11
JP10
J6
J2 J1
VIN_B
EXT_CLK
VIN_A
R3
U1
TP_GND_1
National Semiconductor
ADC12D040/ADC12DL066 Evaluation Board
JP5
JP2
TP6
TP5
J5
J6
EXT CLOCK
INPUT
J1
CHAN A
INPUT
Jumper Detail
J1
Defaut Position
Jumper Detail
J9
Defaut Position
JP11
VA SELECT
(Hard Wired)
JP10
VDR SELECT
J2
CHAN B
INPUT
P1
POWER
CONNECTOR
R3
EXT REF
ADJUST
TP3
OEA
TP4
OEB
JP9
A/B CHAN
SELECT
TP2
PD
U1
ADC12D040
(DUT)
Jumper Detail
J10
Defaut Position
J5
FutureBus
Connector
Figure 1. Component and Test Point Locations
4 http://www.national.com
3.0 Quick Start 4. In the WaveVision4 program, select the SETTINGS pull-down
menu, then select CAPTURE BOARD SETTINGS.
CAUTION: If using the WAVEVSN BRD 4.0 Data Capture Board,
apply power only to that board or to the ADC12D040 Evaluation
Board. Power supplies of these two boards are connected together
thought connector J5.
5. Click on the "Test" button. After the "Communications
Successful" message appears below the "Test" button, click
on the "Accept" button at the lower right of the dialog box.
Refer to Figure 1 for locations of test points and major
components. For Stand-Alone operation:6. Press F1 on the computer keyboard to capture and upload
data.
1. Connect a clean analog (not switching) +5V power source to
Power Connector P1. 4.0 Functional Description
Table 1 describes the function of the various jumpers on the
ADC12D040 evaluation board. The Evaluation Board schematic is
shown in Figure 2.
2. Set the output amplitude of the clock signal generator, if
used, to 3 VP-P for the ADC12D040 or to 2VP-P for the
ADC12DL066 and the frequency to the desired sample rate.
Jumper Pins 1 & 2 Pins 2 & 3
3. Use R3 to set the reference voltage (VREF) at TP1 to +2.0V
±0.05 for the ADC12D040 or to 1.0V ±0.03V for the
ADC12DL066. To use the ADC internal reference, put a
shorting jumper on JP2. JP1 Short to select clock at
BNC J6
Short to select clock
oscillator at U7
4. Connect a signal source of 2.0 VP-P amplitude for the
ADC12D040 or 1.0 VP-P for the ADC12DL066 from a
suitable 50-Ohm source (such as the Agilent 8644B
synthesizer) to Analog Input BNC connector J1. The ADC
input signal can be observed at TP6. Note: The signal to J1
should be applied through a bandpass filter to eliminate the
noise and harmonics commonly associated with signal
sources. Even the best signal generators can not do justice
to a 12-bit ADC without such a filter. On the other hand, even
a good bandpass filter will not eliminate noise near its center
frequency.
JP2
Open to use external
reference
Short to use on-chip
reference
N/A
JP5
Short for offset binary
output
Open for 2's
complement
N/A
JP9 Short to select Ch B Short to select Ch A
5. Put a jumper on JP5 to get an offset binary output from the
ADC12D040. Remove any jumper from JP5 for 2's
complement output format. JP10 Hard-wired for
ADC12D040
Hard-wired for
ADC12DL066
6. Select the WaveVision data format (Offset Binary or 2's
Complement) by selecting Settings from the pull-down menu,
then selecting Board Settings. From there select the desired
format. JP11
Short for output driver
supply to be same as
the ADC12D040 core
supply.
Short for 3.3V supply
for the ADC12D040
output drivers. Hard-
wired for ADC12DL066
7. Adjust the input signal amplitude as needed to ensure that
the differential signal at TP6 is close to but does not exceed
2.0VP-P for ADC12D040 or 1.0VP-P for ADC12DL066 from
each side of TP6 to ground.
Table 1. Jumper Functions
4.1 Input (signal conditioning) circuitry
8. Check to be sure the correct frequency TTL oscillator is in
socket U7, or apply an external 50-Ohm, low jitter, signal
source to BNC J6. The amplitude of this signal should be
between 2.5 and 3.3 VP-P. If using an external source,
remove the oscillator from U7. If using an oscillator at U7,
remove the signal source from J6. The presence of a second
oscillator source could add noise to the conversion process.
Turn on the power.
The input signal to be digitized should be applied to BNC J1 for
testing Channel A of the ADC or to BNC J2 for testing Channel B.
The 50 Ohm inputs J1 and J2 are intended to accept low-noise
sine wave signals of 2.0 Volt peak-to-peak amplitude for the
ADC12D040 or 1.0 Volt peak-to-peak for the ADC12DL066. To
accurately evaluate dynamic performance, the input test signal will
have to come from a high quality signal source (such as the
Agilent 8644B) and be passed through a high-quality bandpass
filter with a 60 dB minimum stop band attenuation. Even the best
generators available do not provide a pure enough sine wave to
properly evaluate a high resolution ADC. Likewise, even with a
good filter, apparent performance will still depend upon the signal
source used.
9. The digitized signal is available at pins A4 through A18 and
B4 through B15 of J5. See board schematic of Figure 2.
For Computer mode operation:
Note: DO NOT connect power to both this board and to the
WAVEVSN BRD 4.0 Data Capture Board. See cautions and note
at the beginning of this Section 3.0.
1. Connect the evaluation board to the WaveVision4 Board.
See the WaveVision4 User's Guide for board operation.
Signal transformers T1 and T2 provide single-ended to differential
conversion for the ADC12D040 inputs. The common mode voltage
at the ADC input comes from the reference voltage on the eval
board through R22 and R23.
2. Note the cautions at the beginning of this Section 3.0 before
turning on the power to the system.
3. Perform steps 1 through 8 of stand alone quick start, above.
Turn on the power.
Test points TP6 and TP5 may be used to observe the ADC input
signals with differential probes. No scope or other test equipment
should be connected to TP6 or to TP5 while gathering data.
5 http://www.national.com
NOTE: If input frequency components above 50 MHz are
required, remove capacitors C14 & C19 and C17 & C20 at
the ADC differential input pins. These capacitors are
located on the back of the board.
5.0 Software Operation and Settings
The WaveVision software is included with the WAVEVSN BRD 4.0
and the latest version can be downloaded from National's web site
at http://www.national.com/adc. To install this software, follow the
procedure in the WAVEVSN BRD 4 User's Guide. Once the
software is installed, run it and set it up as follows:
4.2 ADC reference circuitry
These ADCs have an internal reference but can use an external
reference as well. An adjustable reference circuit is provided on
this board. To use the external voltage reference, leave JP2 open.
To use the on-chip voltage reference, short the pins of JP2.
1. From the WaveVision main menu, go to Settings, then Board
Settings and do the following:
Select the following from the WaveVision main menu:
•WaveVision 4.0 (USB)
The evaluation board reference circuit will generate a reference
voltage that can be adjusted within the nominal range of 0.8 to 2.5
Volts for the ADC12D040 or 0.4 to 1.3 Volts for the ADC12DL066.
The ADC12D040 is will operate with VREF in the range of 1.0 to
2.2 Volts, with a nominal value of 2.0 Volts while the ADC12DL066
is will operate with VREF in the range of 0.8 to 1.2 Volts, with a
nominal value of 1.0 Volt. The external reference voltage can be
monitored at test point TP1 and is set with R3.
•Sampling Frequency: Set this to the clock frequency
used.
•# of Samples: 2K to 32K, as desired
•Data Format: Binary or 2’s Complement, as selected
by JP5. See Table 1.
4. Click on ‘Accept’ when proper selections are made.
5. After the steps outlined in Section 3.0 are completed. click
on ‘Acquire’ then ‘Samples’ from the Main Menu, or press
the F1 key. Select ‘Discard’ or press the "Escape" key, if a
dialog box opens, to start collecting new updated samples.
4.3 ADC Cock Circuit
The crystal oscillator provided on the evaluation board is selected
by shorting pins 2 & 3 of JP1. It is best to remove any external
signal generator when using this oscillator to reduce any
unnecessary noise.
A plot of the selected number of samples will be displayed. Make
sure there is no clipping of data samples. The Samples may be
further analyzed by clicking and dragging across a specific area of
the plot for better data inspection. See the WaveVision4 Board
User's Guide for details.
This board will also accept a clock signal from an external source
by connecting that source to BNC J6 and shorting pins 1 & 2 of
JP1. A very stable, low jitter source, such as the Agilent 8644B or
equivalent, should be used for the clock signal. An a.c. coupled
circuit together with a d.c. biased resistive divider is provided so
the board can accept a 50 Ohm signal source in the range of 2.2 to
2.5VP-P to drive this input. It is best to remove the oscillator at U7
when using an external clock source, or to remove the external
source when using U7, to reduce any unnecessary noise.
To view an FFT of the data captured, click on the ‘FFT’ tab. This
plot may be zoomed in upon like the data plot. A display of
dynamic performance parameters in the form of SINAD, SNR,
THD, SFDR and ENOB will be displayed at the top right hand
corner of the FFT plot.
Acquired data may be saved to a file. Plots may also be exported
as graphics. See the Data Capture Board User's Guide for details.
4.4 Digital Data Output If this board is used in conjunction with the WAVEVSN BRD 4.0
Data Capture Board and WaveVision software, a USB cable is
needed to connect WAVEVSN BRD 4.0 to the host computer. See
the Data Capture Board User's Guide for details.
When using this evaluation board with a WaveVision4 board, the
12-bit ADC12D040 output from Channel A or Channel B, as
selected with JP9, may be monitored at J3.
To cause the ADC outputs to be straight binary, pins 1-2 of JP5
should be shorted together. To cause the ADC outputs to be 2’s
Complement, no jumper should be placed on JP5. 6.0 Evaluation Board Specifications
Board Size: 5.9" x 6.18" (15.0 cm x 15.7 cm)
4.5 Power Supply Connections Power Requirements: +5.0V, 340 mA
Clock Frequency Range: 1.0 MHz to 40 MHz (ADC12D040)
1.0 MHz to 66 MHz (ADC12DL066)
When using the WAVEVSN BRD 4.0 Data Capture Board, we
recommend that power for the ADC12D040 evaluation board come
from the WAVEVSN BRD 4.0 Digital Capture Board. Analog Input
Nominal Voltage: 2.0V
P-P
(ADC12D040)
1.0V
P-P
(ADC12DL066)
4.6 Power Requirements
Impedance: 50 Ohms
Voltage and current requirements for the ADC12D040 Evaluation
Board alone is +5V at 400 mA.
6 http://www.national.com
7.0 Hardware Schematic
Figure 2. ADC12D040 / ADC12DL066 Evaluation Board Schematic
C14
75pF
(47pF)
C20
75pF
(47pF)
Values in
parentheses for
ADC12DL066
J5 Future Bus Connector – 24 pin female
D6
C6
B6
A6
D5
C5
B5
A5
D4
C4
B4
A4
D3
C3
B3
A3
D2
C2
B2
A2
D1
C1
B1
A1
QB0
QA0
QB1
QA1
QB2
QA2
QB3
QA3
QB4
QA4
QB5
QA5
QB6
QA6
QB7
QA7
QB8
QA8
QB9
QA9
QB10
QA10
QB11
QA11
R87
0
+5
D12
C12
B12
A12
D11
C11
B11
A11
D10
C10
B10
A10
D9
C9
B9
A9
D8
C8
B8
A8
D7
C7
B7
A7
D18
C18
B18
A18
D17
C17
B17
A17
D16
C16
B16
A16
D15
C15
B15
A15
D14
C14
B14
A14
D13
C13
B13
A13
D24
C24
B24
A24
D23
C23
B23
A23
D22
C22
B22
A22
D21
C21
B21
A21
D20
C20
B20
A20
D19
C19
B19
A19
R90
0
READ_CLK
+5
VD
R96
5.1K B11
B10
B9
B8
B7
B6
+3.3A
C11
0.1uF
C39
0.1uF
C47
0.1uF
C48 0.1uF
U1
ADC12D040
(ADC12DL066)
AGND
VA
VA
AGND
CLK
PD
DR GND
DB11
DB10
DB9
DB8
DB7
DB6
VDR
DR GND
DGND
VINB-
VINB+
AGND
VRMB
VRPB
VRNB
VREF
AGND
VA
AGND
INT/EXT REF
VRNA
VRPA
VRMA
VINA+
VINA-
AGND
VA
VA
AGND
OF
OEA
DR GND
DA0
DA1
DA2
DA3
DA4
DA5
VDR
DR GND
DGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
VD
DB5
DB4
DB3
DB2
DB1
DB0
OEB
DR GND
DA11
DA10
DA9
DA8
DA7
DA6
VD
TP5
VINB
1
2
R7
51
R13
51
R10
Not
used
C17
75pF
(47pF) C16
Not
used
T4-6T
T2
R11
51
C15 0.1uF
R91
Not Used
C57
0.1uF
C55 0.1uF
C50 0.1uF
C49 0.1uF
C56 0.1uF
TP6
VINA
R6
51
R12
51
R9
Not
used
C19
75pF
(47pF)
C22
Not
used
T4-6T
T1
R8
51
C13
0.1uF
1
2
R3
1K R4
470
C7
0.1uF
D1
LM4040AIZ-2.5
(LM4041AIZ-1.2
for ADC11/12DL066)
R2
330
TP1
VREF
VA
R22
200
R23
200
R88
Not Used
R19
5.1K 2
1
VA
C60
0.1uF
C9
0.1uF
C8
0.1uF
VDR
R86
Not used
C54
Not used
R21
Not used
R100
Open LATCH CLOCK
ADC CLOCK
B5
B4
B3
B2
B1
B0
A5
A4
A3
A2
A1
A0
A11
A10
A9
A8
A7
A6
B6
B7
B8
B9
B10
B11
B0
B1
B2
B3
B4
B5
TP4
OEB
R97
5.1K
R85
5.1K
VA
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
R46
5.1K
TP3
OEA
JP5
OF
1
2
VA
C10
0.1uF
TP_GND_1 TP_GND_2
TP_GND_3 TP_GND_4
VA
TP2
PD
R17
150
R18
75
C1
1uF
J6
Ext_Clk
+5
J2
VIN_B
3
2
1
+5
1
2
4
3
VCC
OUT
NC
GND
U7
40 MHz
(66 MHz) R20
51
C36
0.1uF
CLK_SEL
JP1
TP_3.3
U6A
74ACT04
U6B
74ACT04
R98
51
(open)
R16
Open (51)
U6E
74ACT04
U6D
74ACT04
C63
0.1uF
C58
0.1uF
C12
0.1uF
1 3
2
Z3 NFM41P11C204
C29
0.1uF
C28
10uF
6.3V
Z1 NFM41P11C204
C24
0.1uF
C23
10uF
6.3V
1 3
2
1N4001
D2
+5A
+5
J1
VIN_A
OB[0..11]
OA[0..11]
OUTPUT CLOCK
JP2
Int/EXT REF
C6
0.1uF
+VDR
C5
0.1uF
QB6
QB7
QB8
QB9
QB10
QB11
QB0
QB1
QB2
QB3
QB4
QB5
QB11
QB10
QB9
QB8
QB7
QB6
QB5
QB4
QB3
QB2
QB1
QB0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
D1
D2
D3
D4
D5
D6
D7
D8
GND
VCC
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
CLK
74ACQ574 or
74ACT574
U5
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
D1
D2
D3
D4
D5
D6
D7
D8
GND
VCC
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
CLK
74ACQ574 or
74ACT574
U4
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
D1
D2
D3
D4
D5
D6
D7
D8
GND
VCC
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
CLK
74ACQ574 or
74ACT574
U3
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
D1
D2
D3
D4
D5
D6
D7
D8
GND
VCC
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
CLK
74ACQ574 or
74ACT574
U2
QA11
QA10
QA9
QA8
QA7
QA6
QA5
QA4
QA3
QA2
QA1
QA0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
J4
DIN 64
QA11
QA10
QA9
QA8
QA7
QA6
QA5
QA4
QA3
QA2
QA1
QA0
QB11
QB10
QB9
QB8
QB7
QB6
QB5
QB4
QB3
QB2
QB1
QB0
1
3
5
7
9
11
13
15
17
19
21
23
2
4
6
8
10
12
14
16
18
20
22
24
J3
JP_CL
R26
5.1K
R25
5.1K
JP9
A/B SEL
1
2
3
+V
C4
0.1uF
+5V
C3
0.1uF
C2
0.1uF
OA[0..11]
OB[0..11]OB[0..11]
OB[0..11]
OA[0..11]
8 x 100
RP5
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
8 x 100
RP6
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
8 x 100
RP7
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
8 x 100
RP8
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
8 x 100
RP1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
8 x 100
RP2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
8 x 100
RP3
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
8 x 100
RP2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VD
1 2 3 4
11 10
9 8
R104
51
READ CLOCK
R102
Not used
R103
Not used
C111
0.01uF
2
1
P1
POWER CONN
R101
330
D4
RED LED
C109
0.01uF
λ
λ
λ
λ
R92
5.1K
U9
LM1117MP-3.3
JP11
VDR_SEL
1 2 3
1 2 3
+3P3V
L1 2.2nH
L2
2.2nH
VD
VA
VDR
JP10
VA_SEL
1
2
3
C18
10uF
6.3V
U8
24C02
A2
A1
A0
GND
Vcc
WP
SCL
SDA
1
2
3
4
8
7
6
5
C21
0.1uF
“C50”
1.5Ω
Ω
Ω
Ω
C49
1.0uF
U1 pin 5
U1 pin 6
“C39”
1.5Ω
Ω
Ω
Ω
C48
1.0uF
U1 pin 13
U1 pin 12
Component substitution for ADC12DL066 only
R100
51
7 http://www.national.com
8.0 ADC12D040 / ADC12DL066 Evaluation Board Bill of Materials
Item Qty Reference Part
1 1 C1 1uF Size 0805
2 2 C109, C111 0.01uF Size 0805
3 24
C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12,
C13, C15, C21, C24, C29, C36, C47, C55, C56,
C57, C58, C60, C63
0.1uF Size 0805
4 4 C14, C17, C19, C20 75pF (ADC12D040)
47pF (ADC11/12DL066)
Size 0805
Size 0805
5 3 C18, C23, C28 10uF, 6.3V Size 1206
6 - C16, C22, C54 not populated n/a
7 -
C25, C26, C27, C30, C31, C32, C33, C34, C35,
C40, C41, C42, C43, C44, C45, C46, C51, C52,
C53, C59, C61, C62
Not used n/a
8 2 C39, C50 0.1uF (ADC12D040)
1.5Ω resistor (ADC11/12DL066)
Size 0805
Size 0805
9 2 C48, C49 0.1uF (ADC12D040)
1.0uF (ADC11/12DL066)
Size 0805
Size 0805
10 1 D1 LM4040AIZ-2.5 (ADC12D040)
LM4041AIZ-1.2 (ADC11/12DL066) National Semiconductor
11 1 D2 1N4001 or 1N4002 or 1N4003 Various
12 1 D4 Red LED Various
13 4 JP2, JP5, TP5, TP6 2-Pin Post Headers DigiKey # A19351-ND
14 2 JP1, JP9 3-pin Post Headers DigiKey # A19350-ND
15 1 JP11 3-pin Post Header for ADC12D040
Hard-Wired for ADC11/12DL066
DigiKey # A19350-ND
n/a
16 - JP10 Hard wired n/a
17 3 J1, J2, J6 BNC Connectors DigiKey # ARF1177-ND
18 1 J3 24-pin Header DigiKey # S2011-12-ND
19 - J4 Not Populated n/a
20 4 J5 Future Bus Connector Amp # 223514-1
21 2 L1, L2 Wide-Band Choke DigiKey # M2103-ND or
JW Miller # FB20010-3B
22 1 P1 Terminal Block DigiKey # ED1609-ND
23 1 R3 1K Pot DigiKey # 3386P-102-ND
24 2 R87, R90 0 Ohms Size 1206
25 2 R2, R101 330, 5% Size 1206
26 1 R4 470, 5% Size 1206
27 10 R6, R7, R8, R11, R12, R13, R16, R20, R100, R104 51, 5% Size 1206
28 1 R18 75, 5% Size 1206
29 1 R17 150, 5% Size 1206
30 2 R22, R23 200, 5% Size 1206
31 8 R19, R25, R26, R46, R85, R92, R96, R97 5.1k, 5% Size 1206
32 - R9, R10, R21, R88, R86, R91, R98, R102, R103 Not populated n/a
33 - R1, R5 Not used n/a
34 8 RP1, RP2, RP3, RP4, RP5, RP6, RP7, RP8 Resistor Pack - 8 x 100 DigiKey # 766-163-R101-ND or
DigiKey # 768-163-R101-ND
35 1 TP1, TP2, TP3, TP4, TP_GND_1, TP_GND_2,
TP_GND_3, TP_GND_4, TP_3.3 Breakable Header DigiKey # S1012-36-ND
36 2 T1, T2 Signal Transformer MiniCircuits Type T4-6T
37 1 U1
ADC12D040CIVS,
ADC11DL066CIVS or
ADC12DL066CIVS
National Semiconductor
38 4 U2, U3, U4, U5 74AT574SC or 74ACT574SC Fairchild Semiconductor
39 1 U6 74AC04SC or 74ACT04SC Fairchild Semiconductor
40 1 U7
40MHz Osc (ADC12D040)
66MHz Osc (ADC11/12DL066)
Pletronics #P1145-3SD-40.00M or
DigiKey # CTX120-ND (ADC12D040) or
Pletronics #P1145-3SD-66.667M or
DigiKey # CTX137-ND (ADC11/12L066)
41 1 U8 24C02 Various
42 1 U9 LM1117MP-3.3 National Semiconductor
43 2 Z1, Z3 Noise Filters MuRata # NFM41P11C204
44 1 -- 4-Pin full-size oscillator socket DigiKey # A462-ND
8 http://www.national.com
APPENDIX
A1.0 Operating in the Computer Mode
The ADC12D040 Evaluation Board is compatible with the WAVEVSN BRD 4.0 Data Capture Board, making data capture easily controlled
from a personal computer operating in the Windows environment. The data samples that are captured can be observed on the PC video
monitor in the time and frequency domains, as can a software histogram of the captured data. The FFT analysis of the captured data yields
insight into system noise and distortion sources and estimates of ADC dynamic performance such as SINAD, SNR, THD, SFDR and ENOB.
See the WaveVision4 Data Capture Board User's Guide for more information.
A2.0 Summary Tables of Test Points, Jumpers and Connectors
Test Points on the ADC12D040/ADC11DL066/ADC12DL066 Evaluation Board
TP1: V
REF
ADC Reference Voltage Test Point.
TP2: PD Power Down control. Apply a logic high voltage here to power down the A/D Converter.
TP3: OEA Output Enable for ADC "A". Apply a logic high voltage here to disable outputs "A".
TP4: OEB Output Enable for ADC "B". Apply a logic high voltage here to disable outputs "B".
TP5: VINB Differential input signal to ADC "B"
TP6: VINA Differential input signal to ADC "A"
TP_3.3 3.3 Volt test point from the WaveVison4 Board.
TP_GND_1 Ground. Located in corner nearest TP_3.3
TP_GND_2 Ground. Located in corner nearest board identification silk screen.
TP_GND_3 Ground. Located in corner nearest Power Connector
TP_GND_4 Ground. Located in corner nearest BNC J2.
Connectors and Selection Jumpers on the ADC12D040/ADC11DL066/ADC12DL066 Evaluation Board
J1: BNC Connector Single-Ended input to ADC "A"
J2: BNC Connector Single-Ended input to ADC "B"
J3: JP_CL Put jumpers on all 12 pin pairs to make output bus available on J4 available for converter selected by JP9.
J4: DIN 64 Not used.
J5: Future Bus connector Future Bus connector for use with WaveVision 4
J6: BNC Connector External Clock Input
Selection Jumpers on the ADC12D040/ADC11DL066/ADC12DL066 Evaluation Board
JP1: CLK_SEL Jumper pins 2-3 to select on-board oscillator at U7 or jumper pins 1-2 to select external clock at J6
JP2: INT/EXT REF Place jumper on these pins to select the internal 1.0V reference; leave jumper off to use external reference.
JP3: Not Used
JP4: Not Used
JP5: OF Place jumper on these pins to select Offset Binary output format; leave jumper off for 2's complement.
JP6: Not Used
JP7: Not Used
JP8: Not Used
JP9: A/B SEL Jumper pins 2-3 to select ADC Channel "A" or jumper pins 1-2 to select ADC Channel "B"
JP10: VA_SEL Hard-wired to +5.0V for ADC12D040. Hard-wired to 3.3V for ADC12DL066
JP11: V
DR
_SEL Jumper pins 2-3 to select 3.3V for V
DR
(output driver supply) or jumper pins 1-2 to select ADC supply for V
DR
.
Hard-wired to 3.3V for ADC12DL066
9 http://www.national.com
P1: Connector - Power Supply Connections
P1-1 +5V Positive Supply voltage (+5V)
P1-2 GND Power Supply Ground
J3: Latch Outputs
J3 pin number Signal (when channel enabled)
1, 2 B11(MSB) Ch A, B11(MSB) Ch B
3, 4 B10 Ch A, B10 Ch B
5, 6 B9 Ch A, B9 Ch B
7, 8 B8 Ch A, B8 Ch B
9, 10 B7 Ch A, B7 Ch B
11, 12 B6 Ch A, B6 Ch B
13, 14 B5 Ch A, B5 Ch B
15, 16 B4 Ch A, B4 Ch B
17, 18 B3 Ch A, B3 Ch B
19, 20 B2 Ch A, B2 Ch B
21, 22 B1 Ch A, B1 Ch B
23, 24 B0(LSB) Ch A, B0(LSB)
J5: Future Bus connector for use with WAVEVSN BRD 4.0 Data Capture Board
J5 pin number Signal
A1, B1, A2, B2 +5 Volts from Data Capture Board
C1 thru C24 Ground
A3, A22, B3, D1, D16 Ground
D2 READ_CLK to clock data into RAM
A4 QA11 - Bit 11 (MSB) output for ADC "A"
B4 QB11 - Bit 11 output for ADC "B"
A5 QA10 - Bit 10 output for ADC "A"
B5 QB10 - Bit 10 output for ADC "B"
A6 QA9 - Bit 9 output for ADC "A"
B6 QB9 - Bit 9 output for ADC "B"
A7 QA8 - Bit 8 output for ADC "A"
B7 QB8 - Bit 8 output for ADC "B"
A8 QA7 - Bit 7 output for ADC "A"
B8 QB7 - Bit 7 output for ADC "B"
A9 QA6 - Bit 7 output for ADC "A"
B9 QB6 - Bit 7 output for ADC "B"
A10 QA5 - Bit 7 output for ADC "A"
B10 QB5 - Bit 7 output for ADC "B"
A11 QA4 - Bit 7 output for ADC "A"
B11 QB4 - Bit 7 output for ADC "B"
A12 QA3 - Bit 7 output for ADC "A"
B12 QB3 - Bit 7 output for ADC "B"
A13 QA2 - Bit 7 output for ADC "A"
B13 QB2 - Bit 7 output for ADC "B"
A14 QA1 - Bit 7 output for ADC "A"
B14 QB1 - Bit 7 output for ADC "B"
A15 QA0 - Bit 7 output for ADC "A"
B15 QB0 - Bit 7 output for ADC "B"
D4, D6, D8 Board ID pins - not used
A23, B23, A24, B24 3.3V from WaveVision4 Data Capture Board
A16 thru A21 Not Used
B16 thru B21 Not Used
D5, D7, D9 thru D15 Not Used
D17 thru D24 Not Used
10 http://www.national.com
[ blank page ]
11 http://www.national.com
BY USING THIS PRODUCT, YOU ARE AGREEING TO BE BOUND BY THE TERMS AND CONDITIONS OF
NATIONAL SEMICONDUCTOR'S END USER LICENSE AGREEMENT. DO NOT USE THIS PRODUCT UNTIL YOU
HAVE READ AND AGREED TO THE TERMS AND CONDITIONS OF THAT AGREEMENT. IF YOU DO NOT AGREE
WITH THEM, CONTACT THE VENDOR WITHIN TEN (10) DAYS OF RECEIPT FOR INSTRUCTIONS ON RETURN OF
THE UNUSED PRODUCT FOR A REFUND OF THE PURCHASE PRICE PAID, IF ANY.
The ADC12D040/ADC11DL066/ADC12DL066 Evaluation Boards are intended for product evaluation purposes only and
are not intended for resale to end consumers, is not authorized for such use and is not designed for compliance with
European EMC Directive 89/336/EEC, or for compliance with any other electromagnetic compatibility requirements.
National Semiconductor Corporation does not assume any responsibility for use of any circuitry or software supplied or
described. No circuit patent licenses are implied.
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NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
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whose failure to perform, when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component in a life
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can be reasonably expected to cause the failure of
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National does not assume any responsibility for any circuitry described, no circuit patent licenses are implied and National reserves the right
at any time without notice to change said circuitry and specifications.
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