May 2001
Rev. A, May 2001©2001 Fairchild Semiconductor Corporation
FQT7N10L
QFETTM
FQT7N10L
100V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as high efficiency
switching DC/DC converters, and DC motor control.
Features
1.7A, 100V, RDS(on) = 0.35 @VGS = 10 V
Low gate charge ( typical 4.6 nC)
Low Crss ( typical 12 pF)
Fast switching
Improved dv/dt capability
Low level gate drive requirments allowing
direct operationfrom logic drives
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Thermal Characteristics
Symbol Parameter FQT7N10L Units
VDSS Drain-Source Voltage 100 V
IDDrain Current - Continuous (TC = 25°C) 1.7 A
- Continuous (TC = 70°C) 1.36 A
IDM Drain Current - Pulsed (Note 1) 6.8 A
VGSS Gate-Source Voltage ± 20 V
EAS Single Pulsed Avalanche Energy (Note 2) 50 mJ
IAR Avalanche Current (Note 1) 1.7 A
EAR Repetitive Avalanche Energy (Note 1) 0.2 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 6.0 V/ns
PDPower Dissipation (TC = 25°C) 2.0 W
- Derate above 25°C 0.016 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TLMaximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter Typ Max Units
RθJA Thermal Resistance, Junction-to-Ambient * -- 62.5 °C/W
* When mounted on the minimum pad size recommended (PCB Mount)
!"
!
!
!"
"
"
!"
!
!
!"
"
"
S
D
G
SOT-223
FQT Series
G
D
S
Rev. A, May 2001
FQT7N10L
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
©2001 Fairchild Semiconductor Corporation
Electrical Characteristics TC = 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 26mH, IAS = 1.7A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 7.3A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
Symbol Parame ter Test Condit i ons Min Typ Max Units
Off Characteristics
BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, I D = 250 µA100 -- -- V
BVDSS
/ TJ
Breakdown Vo ltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C -- 0.1 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 100 V, VGS = 0 V -- -- 1 µA
VDS = 80 V, TC = 125°C -- -- 10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA
On Characteri st ics
VGS(th) Gate Threshold Volt age VDS = VGS, ID = 250 µA1.0 -- 2.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V, ID = 0.85 A
VGS = 5 V, I D = 0.85 A -- 0.275
0.300 0.35
0.38
gFS Forward Transconductance VDS = 30 V, ID = 0. 85 A -- 2.75 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 220 290 pF
Coss Output Capacitance -- 55 72 pF
Crss Reverse Transfer Capacit ance -- 12 15 pF
Switching Characteristics
td(on) Turn-On Delay T ime VDD = 50 V, ID = 7.3 A,
RG = 25
-- 9 30 ns
trTurn-On Rise Time -- 100 210 ns
td(off) Turn-Off De l a y Time -- 17 45 ns
tfTurn -Off Fa ll Time -- 5 0 11 0 ns
QgTotal Gate Ch arge VDS = 80 V, ID = 7.3 A,
VGS = 5 V
-- 4.6 6.0 nC
Qgs Gate-Source Charge -- 1.0 -- nC
Qgd Gate-Drain Charge -- 2.6 -- nC
Drain-Source Diode Characteristics and Maximum R atings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 1.7 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 6.8 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, I S = 1.7 A -- -- 1.5 V
trr Reverse Recovery Time VGS = 0 V, I S = 7.3 A,
dIF / dt = 100 A/µs
-- 70 -- ns
Qrr Reverse Recovery Charge -- 140 -- nC
Rev. A, May 2001©2001 Fairchild Semiconductor Corporation
FQT7N10L
0.2 0.4 0.6 0.8 1.0 1.2 1.4
10-1
100
25!
150!
"
N o te s :
1 . V GS = 0V
2. 250#s Pulse Test
IDR , Reverse Drain Current [A]
VSD , Source-Drain Voltage [V]
0246810
10-1
100
" No te s :
1. V DS = 30V
2. 250#s Pulse T es t
-55!
150!
25!
ID , D ra in Cu rre n t [A ]
VGS , G ate -Sou rce V o lta g e [V]
012345678
0
2
4
6
8
10
12
VDS = 50V
VDS = 80V
" Note : ID = 7.3 A
VGS, Gate-Source Voltage [V]
QG, Total Gate Charge [nC]
10-1 100101
0
100
200
300
400
500
600 Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
" Note s :
1. VGS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
VDS, Drain-Source Voltage [V]
0 5 10 15 20
0.0
0.3
0.6
0.9
1.2
1.5
VGS = 10V
VGS = 5V
" N ote : T J = 25!
RDS(ON) [$],
Drain-Source On-Resistance
ID, Drain Current [A]
10-1 100101
10-1
100
V GS
Top : 1 0 .0 V
8 .0 V
6 .0 V
5 .0 V
4 .5 V
4 .0 V
3 .5 V
Bottom : 3.0 V
" No te s :
1. 250#s Pulse T e st
2. TC = 25!
ID, D ra in C u rre n t [A ]
VDS, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. C apacitanc e Ch aracterist i cs Figure 6. Ga te Ch arge Cha ra ct eri stics
Figu re 3. On-R esistan ce Variation vs.
Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Character i st ic s
FQT7N10L
Rev. A, May 2001©2001 Fairchild Semiconductor Corporation
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
" No te s :
1. VGS = 10 V
2. ID = 0.85 A
RDS(ON) , (Norma lize d )
Drain-So urce O n-Res istance
TJ, Junction T em pe rature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
"
N o te s :
1 . V GS = 0 V
2 . ID = 250 #A
BV DSS , (No r ma liz e d )
D rain-Source Breakdow n Voltage
TJ, Junction Tem perature [oC]
10-5 10-4 10-3 10-2 10-1 100101102103
10-1
100
101
102
" Notes :
1. Z %JC(t) = 62 .5 !/W M a x .
2 . Du ty F a c tor, D=t1/t2
3. T JM - TC = PDM * Z%JC(t)
s in g le p u ls e
D=0.5
0.02
0.2
0.05
0.1
0.01
Z%JC
(t), Therm al Response
t1, Square W ave Pulse Duration [sec]
25 50 75 100 125 150
0.0
0.4
0.8
1.2
1.6
2.0
ID, Dr ain Curre n t [A]
TC, Case Temperature [!
]
10-1 100101102
10-2
10-1
100
101
100 ms
DC
10 ms
1 ms100 µs
Operation in This Area
is Limited by R DS(on)
" No te s :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
Typical Characteristics (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figu re 7. Breakdown Voltag e Variation
vs. Temperature Figure 8. On-Resistance Variation
vs. Temperature
Figure 11. Tr ansient Thermal Res pons e Cur ve
t1
PDM
t2
Rev. A, May 2001©2001 Fairchild Semiconductor Corporation
FQT7N10L
Charge
VGS
5V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K&
200nF
12V
Same Type
as DUT
Charge
VGS
5V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K&
200nF
12V
Same Type
as DUT
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
5V
VDS RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
5V
VDS RL
DUT
RG
VGS
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & W aveforms
FQT7N10L
Rev. A, May 2001©2001 Fairchild Semiconductor Corporation
Peak Diode Recovery dv/dt Test Circ ui t & Waveform s
DUT
VDS
+
_
Driver
RGSame Typ e
as DUT
VGS dv/dt controlled by RG
•I
SD con trolled by pulse per iod
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
DUT
VDS
+
_
Driver
RGSame Typ e
as DUT
VGS dv/dt controlled by RG
•I
SD con trolled by pulse per iod
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
Rev. A, May 2001©2001 Fairchild Semiconductor Corporation
FQT7N10L
Package Dimensions
3.00 ±0.10
7.00 ±0.30
0.65 ±0.20
0.08MAX
3.50 ±0.20
1.60 ±0.20
(0.46)
(0.89)
(0.60) (0.60)
1.75 ±0.20
0.70 ±0.10
4.60 ±0.25
6.50 ±0.20
(0.95) (0.95)
2.30 TYP
0.25
MAX1.80
0°~10°
+0.10
–0.05
0.06 +0.04
–0.02
SOT-223
©2001 Fairchild Semiconductor Corporation
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all su ch trademarks.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY A NY LICENSE UNDER ITS PATENT RIGHTS, N OR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devic es or syst em s
which, (a) ar e intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconduct or reserv es the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H2
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME
EcoSPARK™
E2CMOS™
EnSigna™
FACT™
FACT Quiet Series™
FAST®
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN
POP™
PowerTrench®
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SLIENT SWITCHER®
SMART START™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
UltraFET®
VCX™