LT5575
1
5575f
LO INPUT POWER (dBm)
–15
GAIN (dB), NF (dB), IIP3 (dBm)
IIP2 (dBm)
15
20
25
5
5575 TA01b
10
5
0–10 –5 0
35
30
30
40
50
20
10
0
70
60
CONV
GAIN
DSB NF
IIP2
IIP3
–40°C
25°C
85°C
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
800MHz to 2.7GHz
High Linearity Direct Conversion
Quadrature Demodulator
The LT
®
5575 is an 800MHz to 2.7GHz direct conversion
quadrature demodulator optimized for high linearity
receiver applications. It is suitable for communications
receivers where an RF signal is directly converted into I
and Q baseband signals with bandwidth up to 490MHz.
The LT5575 incorporates balanced I and Q mixers, LO
buffer amplifi ers and a precision, high frequency quadrature
phase shifter. The integrated on-chip broadband transform-
ers provide 50Ω single-ended interfaces at the RF and LO
inputs. Only a few external capacitors are needed for its
application in an RF receiver system.
The high linearity of the LT5575 provides excellent spur-
free dynamic range for the receiver. This direct conversion
demodulator can eliminate the need for intermediate fre-
quency (IF) signal processing, as well as the corresponding
requirements for image fi ltering and IF fi ltering. Channel
fi ltering can be performed directly at the outputs of the I
and Q channels. These outputs can interface directly to
channel-select fi lters (LPFs) or to baseband amplifi ers.
High Signal-Level I/Q Demodulator for Wireless Infrastructure
■ Input Frequency Range: 0.8GHz to 2.7GHz*
■ 50Ω Single-Ended RF and LO Ports
■ High IIP3: 28dBm at 900MHz, 22.6dBm at 1.9GHz
■ High IIP2: 54.1dBm at 900MHz, 60dBm at 1.9GHz
■ Input P1dB: 13.2dBm at 900MHz
■ I/Q Gain Mismatch: 0.04dB Typical
■ I/Q Phase Mismatch: 0.4° Typical
■ Low Output DC Offsets
■ Noise Figure: 12.8dB at 900MHz, 12.7dB at 1.9GHz
■ Conversion Gain: 3dB at 900MHz, 4.2dB at 1.9GHz
■ Very Few External Components
■ Shutdown Mode
■ 16-Lead QFN 4mm × 4mm Package with
Exposed Pad
■ Cellular/PCS/UMTS Infrastructure
■ RFID Reader
■ High Linearity Direct Conversion I/Q Receiver
Conversion Gain, NF, IIP3 and IIP2
vs LO Input Power at 1900MHz
BPF
+5V
VCC
BPF RF
INPUT RF LPF
LT5575
IOUT+
IOUT–
0°
LO
LO INPUT
ENENABLE
LPF
QOUT+
QOUT–
90°
0°/90°
5575 TA01
LNA
VGA
VGA
A/D
A/D
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*Operation over a wider frequency range is possible with reduced performance. Consult
the factory.
LT5575
2
5575f
DC ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Power Supply Voltage ..............................................5.5V
Enable Voltage ................................ –0.3V to VCC + 0.3V
LO Input Power ....................................................10dBm
RF Input Power ....................................................20dBm
RF Input DC Voltage ...............................................±0.1V
LO Input DC Voltage ..............................................±0.1V
Operating Ambient Temperature ..............–40°C to 85°C
Storage Temperature Range ...................–65°C to 125°C
Maximum Junction Temperature .......................... 125°C
CAUTION: This part is sensitive to electrostatic discharge
(ESD). It is very important that proper ESD precautions
be observed when handling the LT5575.
(Note 1)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply Voltage 4.5 5.25 V
Supply Current 132 155 mA
Shutdown Current EN = Low < 1 100 µA
Turn On Time 120 ns
Turn Off Time 750 ns
EN = High (On) 2V
EN = Low (Off) 1V
EN Input Current VENABLE = 5V 120 µA
Output DC Offset Voltage
(|IOUT+ – IOUT–|, |QOUT+ – QOUT–|)
fLO = 1900MHz, PLO = 0dBm < 9 mV
Output DC Offset Variation
vs Temperature
–40°C to 85°C 38 µV/°C
16 15 14 13
5 6 7 8
TOP VIEW
17
UF PACKAGE
16-LEAD
(
4mm × 4mm
)
PLASTIC QFN
9
10
11
12
4
3
2
1GND
RF
GND
GND
VCC
GND
LO
GND
IOUT+
IOUT–
QOUT+
QOUT–
EN
VCC
VCC
VCC
TJMAX = 125°C, θJA = 37°C/W
EXPOSED PAD (PIN #17) IS GND, MUST BE SOLDERED TO PCB
V
CC = +5V, TA = 25°C, unless otherwise noted. (Note 3)
PIN CONFIGURATION
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LT5575EUF#PBF LT5575EUF#TRPBF 5575 16-Lead (4mm × 4mm) QFN –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
Consult LTC Marketing for information on nonstandard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
LT5575
3
5575f
AC ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
RF Input Frequency Range No External Matching (High Band)
With External Matching (Low Band, Mid Band)
1.5 to 2.7
0.8 to 1.5
GHz
GHz
LO Input Frequency Range No External Matching (High Band)
With External Matching (Low Band, Mid Band)
1.5 to 2.7
0.8 to 1.5
GHz
GHz
Baseband Frequency Range DC to 490 MHz
Baseband I/Q Output Impedance Single-Ended
65Ω// 5pF
RF Input Return Loss ZO = 50Ω, 1.5GHz to 2.7GHz,
Internally Matched
>10 dB
LO Input Return Loss ZO = 50Ω, 1.5GHz to 2.7GHz,
Internally Matched
>10 dB
LO Input Power –13 to 5 dBm
Test circuit shown in Figure 1. (Notes 2, 3)
AC ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Conversion Gain Voltage Gain, RLOAD = 1kΩ
RF = 900MHz (Note 5)
RF = 1900MHz
RF = 2100MHz
RF = 2500MHz
3
4.2
3.5
2
dB
dB
dB
dB
Noise Figure (Double-Side Band, Note 4) RF = 900MHz (Note 5)
RF = 1900MHz
RF = 2100MHz
RF = 2500MHz
12.8
12.7
13.6
15.7
dB
dB
dB
dB
Input 3rd-Order Intercept RF = 900MHz (Note 5)
RF = 1900MHz
RF = 2100MHz
RF = 2500MHz
28
22.6
22.7
23.3
dBm
dBm
dBm
dBm
Input 2nd-Order Intercept RF = 900MHz (Note 5)
RF = 1900MHz
RF = 2100MHz
RF = 2500MHz
54.1
60
56
52.3
dBm
dBm
dBm
dBm
Input 1dB Compression RF = 900MHz (Note 5)
RF = 1900MHz
RF = 2100MHz
RF = 2500MHz
13.2
11.2
11
12.3
dBm
dBm
dBm
dBm
I/Q Gain Mismatch RF = 900MHz (Note 5)
RF = 1900MHz
RF = 2100MHz
RF = 2500MHz
0.03
0.01
0.04
0.04
dB
dB
dB
dB
I/Q Phase Mismatch RF = 900MHz (Note 5)
RF = 1900MHz
RF = 2100MHz
RF = 2500MHz
0.5
0.4
0.6
0.2
°
°
°
°
LO to RF Leakage RF = 900MHz (Note 5)
RF = 1900MHz
RF = 2100MHz
RF = 2500MHz
–60.8
–64.6
–60.2
–51.2
dBm
dBm
dBm
dBm
V
CC = +5V, EN = High, TA = 25°C, PRF = –10dBm (–10dBm/tone for
2-tone IIP2 and IIP3 tests), Baseband Frequency = 1MHz (0.9MHz and 1.1MHz for 2-tone tests), PLO = 0dBm, unless otherwise noted.
(Notes 2, 3, 6)
LT5575
4
5575f
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Tests are performed as shown in the confi guration of Figure 1.
Note 3: Specifi cations over the –40˚C to 85˚C temperature range are
assured by design, characterization and correlation with statistical
process control.
Note 4: DSB Noise Figure is measured with a small-signal noise source
at the baseband frequency of 15MHz without any fi ltering on the RF input
and no other RF signal applied.
PARAMETER CONDITIONS MIN TYP MAX UNITS
RF to LO Isolation RF = 900MHz (Note 5)
RF = 1900MHz
RF = 2100MHz
RF = 2500MHz
59.7
57.1
59.5
53.1
dBc
dBc
dBc
dBc
AC ELECTRICAL CHARACTERISTICS
V
CC = +5V, EN = High, TA = 25°C, PRF = –10dBm (–10dBm/tone for
2-tone IIP2 and IIP3 tests), Baseband Frequency = 1MHz (0.9MHz and 1.1MHz for 2-tone tests), PLO = 0dBm, unless otherwise noted.
(Notes 2, 3, 6)
Note 5: 900MHz performance is measured with external RF and LO
matching. The optional output capacitors C1-C4 (10pF) are also used for
best IIP2 performance.
Note 6: For these measurements, the complementary outputs (e.g., IOUT+,
IOUT–) were combined using a 180˚ phase shift combiner.
Note 7: Large-signal noise fi gure is measured at an output frequency of
198.7MHz with RF input signal at fLO –1MHz. Both RF and LO input signals
are appropriately bandpass fi ltered, as well as baseband output.
LT5575
5
5575f
RF INPUT POWER (dBm)
–16
40
RF-LO ISOLATION (dBc)
45
50
55
60
70
–12 –8 –4 0
5575 G07
48
65
2500MHz
1900MHz
900MHz
LO INPUT POWER (dBm)
–15
LO-RF LEAKAGE (dBm)
–60
–55
–50
5
5575 G08
–65
–70
–80 –10 –5 0
–75
–40
–45
900MHz
1900MHz
2500MHz
RF FREQUENCY (MHz)
800
–0.3
GAIN MISMATCH (dB)
–0.2
–0.1
0.0
0.1
0.3
1100 1400 1700 2000
5575 G05
2300 2600
0.2
–40°C
25°C
85°C
fBB = 1MHz
RF FREQUENCY (MHz)
800
3
PHASE MISMATCH (DEG)
2
1
0
1
3
1100 1400 1700 2000
5575 G06
2300 2600
2
–40°C
25°C
85°C
fBB = 1MHz
RF INPUT POWER (dBm)
–15
–1
CONVERSION GAIN (dB)
0
1
2
3
5
–10 –5 0 5
5575 G04
10 15
4
2500MHz
1900MHz
900MHz
TYPICAL AC PERFORMANCE CHARACTERISTICS
Conversion Gain, NF and IIP3
vs Frequency
IIP2 vs Frequency
Supply Current
vs Supply Voltage
Conversion Gain
vs RF Input Power
I/Q Gain Mismatch
vs RF Input Frequency
I/Q Phase Mismatch
vs RF Input Frequency
RF-LO Isolation
vs RF Input Power
LO-RF Leakage
vs LO Input Power
Conversion Gain
vs Baseband Frequency
VCC = 5V, EN = High, TA = 25ºC, PRF = –10dBm
(–10dBm/tone for 2-tone IIP2 and IIP3 tests), fBB = 1MHz (0.9MHz and 1.1MHz for 2-tone tests), PLO = 0dBm, unless otherwise noted.
Test Circuit Shown in Figure 1 (Note 6).
RF INPUT FREQUENCY (MHz)
800
GAIN (dB), NF (dB), IIP3 (dBm)
15
20
25
260023002000
5575 G01
10
5
01100 1400 1700
35
30
HIGH BAND
MID
BAND
LOW
BAND
CONV GAIN
DSB NF
IIP3
–40°C
25°C
85°C
RF INPUT FREQUENCY (MHz)
40
IIP2 (dBm)
45
50
55
60
70
5575 G02
65
–40°C
25°C
85°C
800 1100 1400 1700 2000 2300 2600
SUPPLY VOLTAGE (V)
4.50
100
ICC (mA)
110
120
130
140
150
160
4.75 5.00 5.25 5.50
5575 G03
–40°C
85°C
25°C
BASEBAND FREQUENCY (MHz)
0.1
0
CONV. GAIN (dB)
1
2
3
4
5
6
1.0 10 100 1000
5575 G09
fLO = 1901MHz
–40°C
85°C
25°C
LT5575
6
5575f
IIP2 vs LO Input Power at 900MHz
Conversion. Gain, IIP3, NF
vs LO Input Power at 2500MHz
TYPICAL AC PERFORMANCE CHARACTERISTICS
VCC = 5V, EN = High, TA = 25ºC, PRF = –10dBm
(–10dBm/tone for 2-tone IIP2 and IIP3 tests), fBB = 1MHz (0.9MHz and 1.1MHz for 2-tone tests), PLO = 0dBm, unless otherwise noted.
Test Circuit Shown in Figure 1 (Note 6).
LO INPUT POWER (dBm)
–15
GAIN (dB), NF (dB), IIP3 (dBm)
15
20
25
5
5575 G10
10
5
0–10 –5 0
35
30
CONV GAIN
DSB NF
IIP3
fLO = 901MHz
–40°C
25°C
85°C
RF INPUT POWER (dBm)
–16
–110
OUTPUT POWER (dBm), IM3 (dBm)
–90
–70
–50
–30
10
–12 –8 –4 0
5575 G11
48
–10
IM3 PRODUCT
OUTPUT POWER
fLO = 901MHz
–40°C
25°C
85°C
LO INPUT POWER (dBm)
–15
IIP2 (dBm)
50
55
60
5
5575 G12
45
40
30 –10 –5 0
35
70
65
fLO = 901MHz –40°C
25°C
85°C
LO INPUT POWER (dBm)
–15
0
GAIN (dB), NF (dB), IIP3 (dBm)
5
10
15
20
25
30
–10 –5 0 5
5575 G13
DSB NF
CONV. GAIN
IIP3
fLO = 1901MHz –40°C
25°C
85°C
RF INPUT POWER (dBm)
–16
–110
OUTPUT POWER (dBm), IM3 (dBm)
–90
–70
–50
–30
10
–12 –8 –4 0
5575 G14
48
–10
IM3 PRODUCT
OUTPUT POWER
fLO = 1901MHz
–40°C
25°C
85°C
LO INPUT POWER (dBm)
–15
40
IIP2 (dBm)
45
50
55
60
65
70
–10 –5 0 5
5575 G15
fLO = 1901MHz
–40°C
25°C
85°C
LO INPUT POWER (dBm)
–15
0
GAIN (dB), NF (dB), IIP3 (dBm)
5
10
15
20
25
30
–10 –5 0 5
5575 G16
DSB NF
CONV. GAIN
IIP3
fLO = 2501MHz
–40°C
25°C
85°C
RF INPUT POWER (dBm)
–16
–110
OUTPUT POWER (dBm), IM3 (dBm)
–90
–70
–50
–30
10
–12 –8 –4 0
5575 G17
48
–10
IM3 PRODUCT
OUTPUT POWER
fLO = 2501MHz
–40°C
25°C
85°C
LO INPUT POWER (dBm)
–15
IIP2 (dBm)
50
55
60
5
5575 G18
45
40
30 –10 –5 0
35
70
65
fLO = 2501MHz –40°C
25°C
85°C
Conversion Gain, IIP3, NF
vs LO Input Power at 900MHz
Output Power and IM3
vs RF Input Power at 900MHz
Conversion Gain, IIP3, NF
vs LO Input Power at 1900MHz
Output Power and IM3
vs RF Input Power at 1900MHz
IIP2 vs LO Input Power
at 1900MHz
IIP2 vs LO Input Power
at 2500MHz
Output Power and IM3
vs RF Input Power at 2500MHz
LT5575
7
5575f
RF INPUT POWER (dBm)
–30
10
DSB NF (dB)
12
16
18
20
30
24
–20 –10 –5
14
26
28
22
–25 –15 0 5 10
5575 G21
NOTE 7
2500MHz
900MHz
1900MHz
I/Q Gain Mismatch
vs LO Input Power
I/Q Phase Mismatch
vs LO Input Power
Large-Signal DSB NF
vs RF Input Power
RF Port Return Loss LO Port Return Loss
Conversion Gain, IIP3, NF
vs Supply Voltage
IIP2 vs Supply Voltage
I/Q Gain Mismatch
vs Supply Voltage
I/Q Phase Mismatch
vs Supply Voltage
TYPICAL AC PERFORMANCE CHARACTERISTICS
VCC = 5V, EN = High, TA = 25ºC, PRF = –10dBm
(–10dBm/tone for 2-tone IIP2 and IIP3 tests), fBB = 1MHz (0.9MHz and 1.1MHz for 2-tone tests), PLO = 0dBm, unless otherwise noted.
Test Circuit Shown in Figure 1 (Notes 6, 7).
LO INPUT POWER (dBm)
–15
–0.3
GAIN MISMATCH (dB)
–0.2
–0.1
0.0
0.1
0.2
0.3
–10 –5 0 5
5575 G19
fBB = 1MHz
2500MHz
1900MHz
900MHz
LO INPUT POWER (dBm)
–15
–3
PHASE MISMATCH (DEG)
–2
–1
0
1
2
3
–10 –5 0 5
5575 G20
fBB = 1MHz 900MHz
1900MHz
2500MHz
–30
–25
–20
–15
–10
–5
0
800 1100 1400 1700 2000 2300 2600
FREQUENCY (MHz)
RETURN LOSS (dB)
5575 G22
LOW BAND;
C10 = 4.7pF
MID BAND;
C10 = 2pF
HIGH BAND;
NO EXTERNAL
COMPONENT
800 1100 1400 1700 2000 2300 2600
FREQUENCY (MHz)
–25
RETURN LOSS (dB)
–20
–15
–10
–5
0
5575 G23
LOW BAND; C12 = 3.9pF
MID BAND; C12 = 2.2pF
HIGH BAND;
NO EXTERNAL COMPONENT
RF FREQUENCY (MHz)
GAIN (dB), NF (dB), IIP3 (dBm)
15
20
25
5575 G24
10
5
0
35
30
4.75V
5V
5.25V
DSB NF
CONV. GAIN
IIP3
800 1100 1400 1700 2000 2300 2600
800 1100 1400 1700 2000 2300 2600
RF FREQUENCY (MHz)
IIP2 (dBm)
50
55
60
5575 G25
45
40
70
65
4.75V
5V
5.25V
800 1100 1400 1700 2000 2300 2600
RF FREQUENCY (MHz)
GAIN MISMATCH (dB)
–0.1
0.0
0.1
5575 G26
–0.2
–0.3
0.3
0.2
4.75V
5V
5.25V
RF FREQUENCY (MHz)
PHASE MISMATCH (DEG)
–1
0
1
5575 G27
–2
–3
3
2
4.75V
5V
5.25V
800 1100 1400 1700 2000 2300 2600
LT5575
8
5575f
DC OFFSET (mV)
DISTRIBUTION (%)
5575 G34
15
20
40
30
25
35
10
5
06420–2–4–6–8–10
–40°C
25°C
85°C
0
5
15
20
25
50
35
10
40
45
30
CONVERSION GAIN (dB)
DISTRIBUTION (%)
5575 G28
4.44.34.24.143.93.8
TA = 25°C
IIP3 (dBm)
21.4
DISTRIBUTION (%)
24.6
5575 G29
15
20
30
25
10
5
0
21.8 22.2 22.6
23
23.4 23.8 24.2
25
–40°C
25°C
85°C
DSB NOISE FIGURE (dB)
DISTRIBUTION (%)
5575 G30
15
20
35
30
25
10
5
01312.912.812.712.612.512.412.312.212.1
TA = 25°C
30
40
60
20
10
0
50
AMPLITUDE MISMATCH (mdB)
DISTRIBUTION (%)
60
5575 G31
–20 0 20 40 80
–40°C
25°C
85°C
PHASE MISMATCH (°)
–1.2
DISTRIBUTION (%)
15
20
25
2.0
5575 G32
10
5
0
–0.8 –0.4
00.4 0.8 1.2 1.6 2.2
–40°C
25°C
85°C
20
25
30
15
10
0
5
40
35
DC OFFSET (mV)
DISTRIBUTION (%)
5575 G33
810 12 14
2461618
–40°C
25°C
85°C
TYPICAL AC PERFORMANCE CHARACTERISTICS
VCC = 5V, EN = High, TA = 25ºC, PRF = –10dBm
(–10dBm/tone for 2-tone IIP2 and IIP3 tests), fBB = 1MHz (0.9MHz and 1.1MHz for 2-tone tests), PLO = 0dBm, unless otherwise noted.
Test Circuit Shown in Figure 1 (Note 6).
Conversion Gain Distribution
at 1900MHz
IIP3 Distribution at 1900MHz
vs Temperature
Noise Figure Distribution
at 1900MHz
I/Q Amplitude Mismatch Distribution
at 1900MHz vs Temperature
I/Q Phase Mismatch Distribution
at 1900MHz vs Temperature
I-Output DC Offset Voltage
Distribution vs Temperature
Q-Output DC Offset Voltage
Distribution vs Temperature
LT5575
9
5575f
BLOCK DIAGRAM
PIN FUNCTIONS
GND (Pins 1, 3, 4, 9, 11): Ground pin.
RF (Pin 2): RF Input Pin. This is a single-ended 50Ω ter-
minated input. No external matching network is required
for the high frequency band. An external series capacitor
(and/or shunt capacitor) may be required for impedance
transformation to 50Ω in the low frequency band from
800MHz to 1.5GHz (see Figure 4). If the RF source is not
DC blocked, a series blocking capacitor should be used.
Otherwise, damage to the IC may result.
VCC (Pins 6, 7, 8, 12): Power Supply Pins. These pins
should be decoupled using 1000pF and 0.1µF capacitors.
EN (Pin 5): Enable Pin. When the input voltage is higher
than 2.0V, the circuit is completely turned on. When the
enable pin voltage is less than 1.0V, the circuit is turned
off. Under no conditions should the voltage at the EN
pin exceed VCC + 0.3V. Otherwise, damage to the IC may
result. If the Enable function is not needed, then the EN
pin should be tied to VCC.
LO (Pin 10): Local Oscillator Input Pin. This is a single-
ended 50Ω terminated input. No external matching net-
work is required in the high frequency band. An external
shunt capacitor (and/or series capacitor) may be required
for impedance transformation to 50Ω for the low frequency
band from 800MHz to 1.5GHz (see Figure 6). If the LO
source is not DC blocked, a series blocking capacitor must
be used. Otherwise, damage to the IC may result.
QOUT–
, QOUT+ (Pins 13, 14): Differential Baseband
Output Pins of the Q Channel. The internal DC bias voltage
is VCC – 1.1V for each pin.
IOUT–, IOUT+ (Pins 15, 16): Differential Baseband
Output Pins of the I Channel. The internal DC bias voltage
is VCC – 1.1V for each pin.
Exposed Pad (Pin 17): Ground Return for the Entire IC.
This pin must be soldered to the printed circuit board
ground plane.
RF
IOUT+
LO
GND
0°/90°
16
IOUT–
15
QOUT+
14
QOUT–
13
LO BUFFERS
LPF
I-MIXER
LPF
Q-MIXER
EXPOSED
PAD
6
VCC
BIAS
5
EN
1
GND
7
VCC
8
4
VCC
12
VCC
GND
5575 BD
9 17
RF AMP
RF AMP
2
3
11
10
LT5575
10
5575f
IOUT–J3
IOUT+J4
RF
J1
QOUT+
J5
QOUT–
J6
LO
J2
C5
1nF
R1
100K
EN
C7
1nF
C8
0.1µF
C9
2.2µF
VCC
LT5575
GND
RF
GND
GND
VCC
GND
LO
GND
IOUT+
IOUT–
QOUT+
QOUT–
EN
VCC
VCC
VCC
5575 F01
C4
(OPT)
C3
(OPT)
C1
(OPT)
C2
(OPT)
RF
GND
DC
GND
0.018"
0.018"
0.062"
C10
(OPT) C12
(OPT)
r = 4.4
TEST CIRCUIT
REF DES VALUE SIZE PART NUMBER
C5, C7 1000pF 0402 AVX 04025C102JAT
C8 0.1µF 0402 AVX 0402ZD104KAT
C9 2.2µF 3216 AVX TPSA225MO10R1800
R1 100kΩ0402
Figure 2. Top Side of Evaluation Board
Figure 1. Evaluation Circuit Schematic
Figure 3. Bottom Side of Evaluation Board
5575 F02 5575 F03
FREQUENCY
RANGE
RF MATCH LO MATCH BASEBAND
C10 C12 C1-C4
LOW BAND:
800 TO 1000MHz
4.7pF 3.9pF 10pF
MID BAND:
1000 TO 1500MHz
2pF 2pF 2.2pF
HIGH BAND:
1500 TO 2700MHz
---
LT5575
11
5575f
APPLICATIONS INFORMATION
The LT5575 is a direct I/Q demodulator targeting high
linearity receiver applications, such as RFID readers and
wireless infrastructure. It consists of RF transconductance
amplifi ers, I/Q mixers, a quadrature LO phase shifter, and
bias circuitry.
The RF signal is applied to the inputs of the RF
transconductance amplifi ers and is then demodulated
into I/Q baseband signals using quadrature LO signals
which are internally generated from an external LO source
by precision 90° phase-shifters. The demodulated I/Q
signals are single-pole low-pass fi ltered on-chip with a
–3dB bandwidth of 490MHz. The differential outputs of the
I-channel and Q-channel are well matched in amplitude;
their phases are 90° apart.
Broadband transformers are integrated on-chip at both
the RF and LO inputs to enable single-ended RF and LO
interfaces. In the high frequency band (1.5GHz to 2.7GHz),
both RF and LO ports are internally matched to 50Ω. No
external matching components are needed. For the lower
frequency bands (800MHz to 1.5GHz), a simple network
with series and/or shunt capacitors can be used as the
impedance matching network.
RF Input Port
Figure 4 shows the demodulator’s RF input which con-
sists of an integrated transformer and high linearity
transconductance amplifi ers. The primary side of the
transformer is connected to the RF input pin. The second-
ary side of the transformer is connected to the differential
inputs of the transconductance amplifi ers. Under no cir-
cumstances should an external DC voltage be applied to
the RF input pin. DC current fl owing into the primary side
of the transformer may cause damage to the integrated
transformer. A series blocking capacitor should be used
to AC-couple the RF input port to the RF signal source.
The RF input port is internally matched over a wide fre-
quency range from 1.5GHz to 2.7GHz with input return loss
typically better than 10dB. No external matching network is
needed for this frequency range. When the part is operated
at lower frequencies, however, the input return loss can
be improved with the matching network shown in Figure
4. Shunt capacitor C10 and series capacitor C11 can be
selected for optimum input impedance matching at the
desired frequency as illustrated in Figure 5. For lower fre-
quency band operation, the external matching component
C11 can serve as a series DC blocking capacitor.
Figure 5. RF Input Return Loss with External Matching
Figure 4. RF Input Interface
5575 F04
2
3
EXTERNAL
MATCHING
NETWORK FOR
LOW BAND AND
MID BAND
RF
INPUT
RF
C10
C11 TO I-MIXER
TO Q-MIXER
–30
–25
–20
–15
–10
–5
0
0.5 1.0 1.5 2.0 2.5 3.0
FREQUENCY (GHz)
RF PORT RETURN LOSS (dB)
5575 F05
NO EXTERNAL
MATCHING
C11 = 3.9pF;
NO SHUNT CAP
C11 = 5.6pF;
C10 = 4.7pF
LT5575
12
5575f
APPLICATIONS INFORMATION
The RF input impedance and S11 parameters (without
external matching components) are listed in Table 1.
LO Input Port
The demodulator’s LO input interface is shown in Fig-
ure 6. The input consists of an integrated transformer and a
precision quadrature phase shifter which generates 0° and
90° phase-shifted LO signals for the LO buffer amplifi ers
driving the I/Q mixers. The primary side of the transformer
is connected to the LO input pin. The secondary side of
the transformer is connected to the differential inputs of
the LO quadrature generator. Under no circumstances
should an external DC voltage be applied to the input pin.
DC current fl owing into the primary side of the transformer
may damage the transformer. A series blocking capacitor
should be used to AC-couple the LO input port to the LO
signal source.
Table 1. RF Input Impedance
FREQUENCY
(GHz)
INPUT
IMPEDANCE (Ω)
S11
MAG ANGLE (°)
0.8 8.1 +j 21.3 0.760 133.0
0.9 10.5 +j 24.9 0.715 125.4
1.0 13.8 +j 28.8 0.660 117.2
1.1 18.6 +j 32.5 0.595 108.6
1.2 25.2 +j 35.5 0.521 99.6
1.3 33.6 +j 36.8 0.441 90.3
1.4 43.1 +j 34.6 0.355 80.8
1.5 51.4 +j 28.4 0.270 71.6
1.6 55.8 +j 19.3 0.188 63
1.7 55.4 +j 10.4 0.110 56.9
1.8 51.8 +j 3.9 0.042 63
1.9 46.9 +j 0.4 0.032 172.7
2.0 42.3 +j –0.8 0.084 –173.9
2.1 38.4 +j –0.3 0.131 –178.2
2.2 35.4 +j 1 0.172 175.3
2.3 33 +j 2.9 0.207 168.4
2.4 31.5 +j 4.9 0.235 161.9
2.5 30.4 +j 7 0.258 155.4
2.6 29.9 +j 9.1 0.274 149.2
2.7 29.7 +j 11.1 0.287 143.4
The LO input port is internally matched over a wide fre-
quency range from 1.5GHz to 2.7GHz with input return
loss typically better than 10dB. No external matching
network is needed for this frequency range. When the part
is operated at a lower frequency, the input return loss can
be improved with the matching network shown in Figure
6. Shunt capacitor C12 and series capacitor C13 can be
selected for optimum input impedance matching at the
desired frequency as illustrated in Figure 7. For lower
frequency operation, external matching component C13
can serve as the series DC blocking capacitor.
Figure 7. LO Input Return Loss with External Matching
Figure 6. LO Input Interface
5575 F06
11
10
EXTERNAL
MATCHING
NETWORK FOR
LOW BAND AND
MID BAND
LO
INPUT
LO
C12
C13
LO QUADRATURE
GENERATOR AND
BUFFER AMPLIFIERS
–30
–25
–20
–15
–10
–5
0
0.5 1.0 1.5 2.0 2.5 3.0
FREQUENCY (GHz)
LO PORT RETURN LOSS (dB)
5575 F07
NO EXTERNAL
MATCHING
C13 = 5.6pF;
NO SHUNT CAP
C13 = 5.6pF;
C12 = 3.9pF
LT5575
13
5575f
APPLICATIONS INFORMATION
The LO input impedance and S11 parameters (without
external matching components) are listed in Table 2.
Table 2. LO Input Impedance
FREQUENCY
(GHz)
INPUT
IMPEDANCE (Ω)
S11
MAG ANGLE (°)
0.8 9.6 +j 23.7 0.731 127.9
0.9 13 +j 27.1 0.669 120.4
1.0 17.9 +j 30 0.592 113.2
1.1 24.1 +j 31.7 0.508 106.1
1.2 31.2 +j 31.4 0.421 99.8
1.3 37.5 +j 28.9 0.341 95.1
1.4 41.9 +j 24.6 0.272 93.4
1.5 43.4 +j 20 0.221 96.2
1.6 42.9 +j 16.4 0.189 103.5
1.7 41.2 +j 14.1 0.18 113.1
1.8 39.5 +j 13.1 0.186 120.3
1.9 37.8 +j 13.1 0.201 124.5
2.0 36.6 +j 13.6 0.217 125.6
2.1 35.6 +j 14.6 0.236 125
2.2 35.1 +j 15.7 0.25 123.1
2.3 34.9 +j 17.1 0.264 120.1
2.4 35.1 +j 18.5 0.272 116.6
2.5 35.5 +j 19.9 0.281 113
2.6 36.3 +j 21.2 0.284 109
2.7 37.2 +j 22.5 0.287 105.1
I-Channel and Q-Channel Outputs
Each of the I-channel and Q-channel outputs is internally
connected to VCC through a 65Ω resistor. The output DC
bias voltage is VCC – 1.1V. The outputs can be DC-coupled
or AC-coupled to the external loads. Each single-ended
output has an impedance of 65Ω in parallel with a 5pF
internal capacitor, forming a low-pass fi lter with a –3dB
corner frequency at 490MHz. The loading resistance
on each output, RLOAD (single-ended), should be larger
than 300Ω to assure full gain. The gain is reduced by
20 • log10(1 + 65Ω/RLOAD) in dB when the output port is
terminated by RLOAD. For instance, the gain is reduced
by 7.23dB when each output pin is connected to a
50Ω load (or 100Ω differentially). The output should be
taken differentially (or by using differential-to-single-
ended conversion) for best RF performance, including
NF and IM2.
The phase relationship between the I-channel output signal
and the Q-channel output signal is fi xed. When the LO
input frequency is larger (or smaller) than the RF input
frequency, the Q-channel outputs (QOUT+, QOUT–) lead (or
lag) the I-channel outputs (IOUT+, IOUT–) by 90°.
When AC output coupling is used, the resulting high-
pass fi lter’s –3dB roll-off frequency is defi ned by the RC
constant of the blocking capacitor and RLOAD, assuming
RLOAD >> 65Ω.
Figure 8. I/Q Output Equivalent Circuit
15
16
VCC
IOUT+
IOUT–
5575 F08
13
14
QOUT+
QOUT–
65Ω5pF65Ω65Ω65Ω5pF5pF5pF
LT5575
14
5575f
APPLICATIONS INFORMATION
Care should be taken when the demodulator’s outputs are
DC-coupled to the external load to make sure that the I/Q
mixers are biased properly. If the current drain from the
outputs exceeds 6mA, there can be signifi cant degrada-
tion of the linearity performance. Each output can sink no
more than 16.8mA when the outputs are connected to an
external load with a DC voltage higher than VCC – 1.1V.
The I/Q output equivalent circuit is shown in Figure 8.
In order to achieve best IIP2 performance, it is important
to minimize high frequency coupling among the baseband
outputs, RF port and LO port. For a multilayer PCB layout
design, the metal lines of the baseband outputs should be
placed on the backside of the PCB as shown in Figures 2
and 3. Typically, output shunt capacitors C1-C4 are not
required for the application near 1900MHz. However, for
other frequency bands, these capacitors can be optimized
for best IIP2 performance. For example, when the oper-
ating frequency is 900MHz, the IIP2 can be improved to
54dBm or better when 10pF shunt capacitors are placed
at each output.
Enable Interface
A simplifi ed schematic of the EN pin is shown in Fig-
ure 9. The enable voltage necessary to turn on the LT5575
is 2V. To disable or turn off the chip, this voltage should
be below 1V. If the EN pin is not connected, the chip is
disabled. However, it is not recommended that the pin be
left fl oating for normal operation.
It is important that the voltage applied to the EN pin
should never exceed VCC by more than 0.3V. Otherwise,
the supply current may be sourced through the upper
ESD protection diode connected at the EN pin. Under no
circumstances should voltage be applied to the EN pin
before the supply voltage is applied to the VCC pin. If this
occurs, damage to the IC may result.
Figure 9. Enable Pin Simplifi ed Circuit
5
VCC
EN
5575 F09
60k 60k
LT5575
LT5575
15
5575f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
UF Package
16-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1692)
4.00 ± 0.10
(4 SIDES)
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.55 ± 0.20
1615
1
2
BOTTOM VIEW—EXPOSED PAD
2.15 ± 0.10
(4-SIDES)
0.75 ± 0.05 R = 0.115
TYP
0.30 ± 0.05
0.65 BSC
0.200 REF
0.00 – 0.05
(UF16) QFN 10-04
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.72 ±0.05
0.30 ±0.05
0.65 BSC
2.15 ± 0.05
(4 SIDES)
2.90 ± 0.05
4.35 ± 0.05
PACKAGE OUTLINE
PIN 1 NOTCH R = 0.20 TYP
OR 0.35 × 45° CHAMFER
LT5575
16
5575f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007
LT 0107 • PRINTED IN USA
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