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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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©2012 Fairchild Semiconductor Corporation 1www.fairchildsemi.com
FSB50250US Rev. C4
FSB50250US Motion SPM® 5 Series
January 2014
FSB50250US
Motion SPM® 5 Series
Features
UL Certified No. E209204 (UL1557)
500 V RDS(on) = 4.2 Max FRFET MOSFET 3-Phase
Inverter with Gate Drivers and Protection
Separate Open-Source Pins from Low-Side MOSFETs
for Three-Phase Current-Sensing
Active-HIGH Interface, Works with 3.3 / 5 V Logic,
Schmitt-trigger Input
Optimized for Low Electromagnetic Interference
HVIC for Gate Driving and Under-Voltage Protection
Isolation Rating: 1500 Vrms / min.
Moisture Sensitive Level (MSL) 3
RoHS Compliant
Applications
3-Phase Inverter Driver for Small Power AC Motor
Drives
Related Source
AN-9082 - Motion SPM5 Series Thermal Performance
by Contact Pressure
General Description
The FSB50250US is an advanced Motion SPM® 5
module providing a fully-featured, high-performance
inverter output stage for AC Induction, BLD C and PMSM
motors. These modules integrate optimized gate drive of
the built-in MOSFET s (FRFET® technology) to minimize
EMI and losses, while also providing multiple on-module
protection features including under-voltage lockouts. The
built-in, high-speed HVIC requires only a single supply
voltage and translates the incoming logic-level gate
inputs to the high-voltage, high-current drive signals
required to properly drive the module's internal
MOSFETs. Separate open-source MOSFET terminals
are available for each phase to support the widest
variety of control algorithms.
Package Marking & Ordering Information
Device Marking Device Package Reel Size Packing Type Quantity
FSB50250US FSB50250US SPM5H-023 330mm Tape-Reel 450
FSB50250US Motion SPM® 5 Series
©2012 Fairchild Semiconductor Corporation 2www.fairchildsemi.com
FSB50250US Rev. C4
Absolute Maximum Ratings
Inverter Part (each MOSFET unless otherwise specified.)
Control Part (each HVIC unless otherwise specified.)
Thermal Resistance
Total System
1st Notes:
1. For the m easurement point of case temperature TC, please refer to Figure 4.
2. Marking “ * “ is calculation value or design factor.
Symbol Parameter Conditions Rating Unit
VDSS Drain-Source Voltage of Each MOSFET 500 V
*ID 25 Each MOSFET Drain Current, Continuous TC = 25°C 1.1 A
*ID 80 Each MOSFET Drain Current, Continuous TC = 80°C 0.8 A
*IDP Each MOSFET Drain Current, Peak TC = 25°C, PW < 100 s 2.8 A
*PDMaximum Power Dissipation TC = 25°C, For Each MOSFET 13 W
Symbol Parameter Conditions Rating Unit
VCC Control Supply Voltage Applied Between VCC and COM 20 V
VBS High-side Bias Voltage Applied Between VB and VS20 V
VIN Input Signal Voltage Applied Between IN and COM -0.3 ~ VCC + 0.3 V
Symbol Parameter Conditions Rating Unit
RJC Junction to Case Thermal Resistance Each MOSFET under Inverter Oper-
ating Condition (1st Note 1) 9.3 °C/W
Symbol Parameter Conditions Rating Unit
TJOperating Junction Tem perature -40 ~ 150 °C
TSTG Storage Temperature -40 ~ 125 °C
VISO Isolation Voltage 60 Hz, Sinusoidal, 1 Minute, Con-
nect Pins to Heat Sink Plate 1500 Vrms
FSB50250US Motion SPM® 5 Series
©2012 Fairchild Semiconductor Corporation 3www.fairchildsemi.com
FSB50250US Rev. C4
Pin descriptions
Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)
1st Notes:
3. Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside Motion SPM® 5 product. External connections should be made as
indicated in Figure 3.
Pin Number Pin Name Pin Description
1 COM IC Common Supply Ground
2V
B(U) Bias Voltage for U Phase High Side MOSFET Driving
3V
CC(U) Bias Voltage for U Phase IC and Low Side MOSFET Driving
4IN
(UH) Signal Input for U Phase High-Side
5IN
(UL) Signal Input for U Phase Low-Side
6V
S(U) Bias Voltage Ground for U Phase High Side MOSFET Driving
7V
B(V) Bias Voltage for V Phase High Side MOSFET Driving
8V
CC(V) Bias Voltage for V Phase IC and Low Side MOSFET Driving
9IN
(VH) Signal Input for V Phase High-Side
10 IN(VL) Signal Input for V Phase Low-Side
11 VS(V) Bias Voltage Ground for V Phase High Side MOSFET Driving
12 VB(W) Bias Voltage for W Phase High Side MOSFET Driving
13 VCC(W) Bias Voltage for W Phase IC and Low Side MOSFET Driving
14 IN(WH) Signal Input for W Phase High-Side
15 IN(WL) Signal Input for W Phase Low-Side
16 VS(W) Bias Voltage Ground for W Phase High Side MOSFET Driving
17 P Positive DC–Link Input
18 U Output for U Phase
19 NUNegative DC–Link Input for U Phase
20 NVNegative DC–Link Input for V Phase
21 V Output for V Phase
22 NWNegative DC–Link Input for W Phase
23 W Output for W Phase
COM
VCC
LIN
HIN
VB
HO
VS
LO
COM
VCC
LIN
HIN
VB
HO
VS
LO
COM
VCC
LIN
HIN
VB
HO
VS
LO
(1) CO M
(2) VB(U)
(3) VCC(U)
(4) IN(UH)
(5) IN(UL)
(6) VS(U)
(7) VB(V)
(8) VCC(V)
(9) IN(VH)
(10) IN(VL)
(11) VS(V)
(12) VB(W)
(13) VCC(W)
(14) IN(WH)
(15) IN(WL)
(16) VS(W)
(17) P
(18) U
(19) NU
(20) NV
(21) V
(22) NW
(23) W
FSB50250US Motion SPM® 5 Series
©2012 Fairchild Semiconductor Corporation 4www.fairchildsemi.com
FSB50250US Rev. C4
Electrical Characteristics (TJ = 25°C, VCC = VBS = 15 V unless otherwise specified.)
Inverter Part (each MOSFET unless otherwise specified.)
Control Part (each HVIC unless otherwise specified.)
2nd Notes:
1. BVDSS is the absolute maxi mum voltage rating between drain and source terminal of each MOSFET inside Motion SPM® 5 product. VPN should be sufficient ly less than this
value consideri ng the ef f ect of the str ay inductance so that VPN should not exceed BVDSS in any case.
2. tON and tOFF include the propagation delay of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the field
applications due to the effect of different printed circuit boards and wirings. Please see Figure 4 for the switching time definition with the switching test circuit of Figure 5.
3. The peak current and voltage of each MOSFET during the switching operation should be included in the Safe Operating Area (SOA). Please see Figure 5 for the RBSOA test
circuit that is same as the switching test circuit.
Symbol Parameter Conditions Min Typ Max Unit
BVDSS Drain - Source
Breakdown Voltage VIN = 0 V, ID = 1 mA (2nd Note 1) 500 - - V
BVDSS/
TJ
Breakdown Voltage Tem-
perature Coefficient ID = 250A, Referenced to 25°C - 0.53 - V
IDSS Zero Gate Voltage
Drain Current VIN = 0 V, VDS = 500 V - - 250 A
RDS(on) Static Drain - Source
Turn-On Resistance VCC = VBS = 15 V, VIN = 5 V, ID = 0.5 A - 3.5 4.2
VSD Drain - Source Diode
Forward Voltage VCC = VBS = 15V, VIN = 0 V, ID = -0.5 A - - 1.2 V
tON
Switching Times
VPN = 300 V, VCC = VBS = 15 V, ID = 0.5 A
VIN = 0 V 5 V, Inductive Load L = 3 mH
High- and Low-Side MOSFET Switching
(2nd Note 2)
- 1050 - ns
tOFF - 850 - ns
trr - 170 - ns
EON -40- J
EOFF -10- J
RBSOA Reverse Bias Safe Oper-
ating Area
VPN = 400 V, VCC = VBS = 15 V, ID = IDP, VDS = BVDSS,
TJ = 150°C
High- and Low-Side MOSFET Switching (2nd Note 3) Full Square
Symbol Parameter Conditions Min Typ Max Unit
IQCC Quiescent VCC Current VCC = 15 V,
VIN = 0 V Applied Between VCC and COM - - 160 A
IQBS Quiescent VBS Current VBS = 15 V,
VIN = 0 V Applied Between VB(U) - U,
VB(V) - V, VB(W) - W - - 100 A
UVCCD Low-Side Under-Voltage
Protection (Figure 8) VCC Under-Voltage Protection Detectio n Level 7.4 8.0 9.4 V
UVCCR VCC Under-Voltage Protection Reset Level 8.0 8.9 9.8 V
UVBSD High-Side Under-Voltage
Protection (Figure 9) VBS Under-Voltage Protection Detection Level 7.4 8.0 9.4 V
UVBSR VBS Under-Voltage Protection Reset Level 8.0 8.9 9.8 V
VIH ON Threshold Voltage Logic HIGH Level Applied between IN and COM 3.0 - - V
VIL OFF Threshold Voltage Logic LOW Level - - 0.8 V
IIH Input Bias Current VIN = 5V Applied between IN and COM -1020A
IIL VIN = 0V - - 2 A
FSB50250US Motion SPM® 5 Series
©2012 Fairchild Semiconductor Corporation 5www.fairchildsemi.com
FSB50250US Rev. C4
Recommended Operating Condition
Figure 2. Recommended MCU Interface and Bootstrap Circuit with Parameters
3rd Notes
1. It is recommended the bootstrap diode D1 to have soft and fast recovery characteristics with 600 V rating.
2. Parameters for bootstrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching fr equency, typical example of parameters is shown above.
3. RC-coupli ng (R 5 and C5) and C4 at each input of Motion SPM 5 product and MCU (Indicated as Dotted Lines) may be used to prevent improper signal due to surge-noise.
4. Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge-voltage. Bypass capacito rs such as C1, C2
and C3 should ha ve good high-frequency characteristics to absorb high-frequency ripple-current.
Figure 3. Case Temperature Measurement
3rd Notes:
5. Attach the thermocouple on top of the heat-sink of SPM 5 package (between SPM 5 package and heatsink if applied) to get the correct temperature measurement.
Symbol Parameter Conditions Min. Typ. Max. Unit
VPN Supply Voltage Applied Between P and N - 300 400 V
VCC Control Supply Voltage Applied Between VCC and COM 13.5 15.0 16.5 V
VBS High-Side Bias Voltage Applied Between VB and VS13.5 15.0 16.5 V
VIN(ON) Input ON Threshold Voltage Applied Between IN and COM 3.0 -VCC V
VIN(OFF) Input OFF Threshold Voltage 0 -0.6 V
tdead Blanking Time for Preventing
Arm-Short VCC = VBS = 13.5 ~ 16.5 V, TJ 150°C 1.0 - - s
fPWM PWM Switching Frequency TJ 150°C - 15 - kHz
HIN LIN Output Note
0 0 Z Both FRFET Off
0 1 0 Low side F RFET On
10 V
DC High side FRFET On
1 1 Forbidden Shoot through
Open Open Z Same as (0,0)
COM
VCC
LIN
HIN
VB
HO
VS
LO
P
NR3
Inverter
Output
C3
R1D1
C1
R2
Micom
15-V Line
10FOne-Leg Diagram of SPM ® 5 Product
These values depend on PWM
control algorithm
* Example of bootstrap paramters:
C1 = C2 = 1F ceramic capacitor,
R1 = 56 R2 = 20
R5
C5
VDC
C2
Case Tem perature(T c)
Detecting Point
14.50mm
3.80mm
MOSFET Case Temperature(Tc)
Detecting Point
14.50mm
3.80mm
MOSFET
FSB50250US Motion SPM® 5 Series
©2012 Fairchild Semiconductor Corporation 6www.fairchildsemi.com
FSB50250US Rev. C4
Figure 4. Switching Time Definitions
Figure 5. Switching and RBSOA (Single-pulse) Test Circuit (Low-side)
Figure 6. Under-Voltage Protection (Low-Side)
Figure 7. Under-Voltage Protection (High-Side)
tON trr
Irr
100% of ID120% of ID
(a) Turn -on
tOFF
(b) Tu rn -o ff
ID
VDS
VDS
ID
VIN VIN
10% of ID
COM
VCC
LIN
HIN
VB
HO
VS
LO
One-leg Diagram of Motion SPM® 5 Product
ID
VCC
RBS
REH
CBS
LV
DC
+
VDS
-
FSB50250US Motion SPM® 5 Series
©2012 Fairchild Semiconductor Corporation 7www.fairchildsemi.com
FSB50250US Rev. C4
Figure 8. Example of Applicat ion Circuit
4th Notes:
1. About pin position, refer to Figure 1.
2. RC-coupling (R5 and C5, R4 and C6) and C4 at each input of Motion SPM® 5 product and MCU are useful to prevent improper input signal cause d by surge-noise.
3. The voltage -drop acros s R3 affects the low-side switching performance and the bootstrap characteristics since it is placed between COM and the source terminal of the low-
side MOSFET. For this reason, the voltage-drop across R3 should be less than 1 V in the steady-state.
4. Ground-wires and output terminals, should be thick and short in order to avoid surge-voltage and malfunctio n of HVIC.
5. All the filter capacitors should be connected close to Motion SPM 5 product, and they should have good characteristics for rejecting high-frequency ripple current.
COM
VCC
LIN
HIN
VB
HO
VS
LO
COM
VCC
LIN
HIN
VB
HO
VS
LO
COM
VCC
LIN
HIN
VB
HO
VS
LO
(1) COM
(2) V B(U)
(3) V CC(U)
(4) IN (UH)
(5) IN (UL)
(6) V S(U)
(7) V B(V)
(8) V CC(V)
(9) IN (VH)
(1 0) IN(VL)
(11 ) V S(V)
(12 ) V B(W)
(13 ) V CC(W)
(1 4) IN(WH)
(1 5) IN(WL)
(16 ) V S(W)
(17 ) P
(18 ) U
(19 ) NU
(20 ) NV
(21 ) V
(22 ) NW
(23 ) W
Micom
C1
R1
R2
15-V
Supply
M
C3VDC
R1
R1
C1
C1
C2
C2
C2
R3
R4
C4
R5
C5
For 3-phase current sensing and protection
FSB50250US Motion SPM® 5 Series
©2012 Fairchild Semiconductor Corporation 8www.fairchildsemi.com
FSB50250US Rev. C4
Detailed Package Outline Drawings
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or data on the drawing and contact a FairchildSemiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide therm and conditions,
specifically the the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MO/MOD23DE.pdf
FSB50250US Motion SPM® 5 Series
©2012 Fairchild Semiconductor Corporation 9www.fairchildsemi.com
FSB50250US Rev. C4
www.onsemi.com
1
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Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
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