0.1 GHz to 33 GHz,1 dB LSB, 5-Bit, GaAs Digital Attenuator HMC939ATCPZ-EP Data Sheet P2 P3 P4 NIC 23 22 21 20 19 VSS 1 18 VDD NIC 2 17 NIC NIC 3 16 NIC 15 NIC DRIVER 4dB 8dB 16dB RF2 NIC 6 13 NIC 7 8 9 10 11 12 NIC 14 NIC 5 NIC RF1 NIC 4 PACKAGE BASE GND NIC = NO INTERNAL CONNECTION 16267-001 2dB NIC NIC Supports defense and aerospace applications (AQEC standard) Military temperature range: -55C to +125C Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request 24 NIC ENHANCED PRODUCT FEATURES P1 FUNCTIONAL BLOCK DIAGRAM Attenuation range: 1 dB LSB steps to 31 dB Insertion loss: 6 dB typical at 33 GHz Attenuation accuracy: 0.5 dB Input linearity 0.1 dB compression (P0.1dB): 24 dBm typical 3rd-order intercept (IP3): 40 dBm typical Power handling: 27 dBm maximum Dual-supply operation: 5 V CMOS-/TTL-compatible parallel control 24-lead, 4 mm x 4 mm LFCSP package P0 FEATURES Figure 1. APPLICATIONS Test instrumentation Microwave radios and very small aperture terminals (VSATs) Military radios, radars, electronic counter measures (ECMs) Broadband telecommunications systems GENERAL DESCRIPTION The HMC939ATCPZ-EP is a 5-bit digital attenuator with a 31 dB attenuation control range in 1 dB steps. The HMC939ATCPZ-EP comes in a RoHS compliant, compact, 4 mm x 4 mm LFCSP package. The HMC939ATCPZ-EP offers optimum insertion loss, attenuation accuracy, and input linearity over the specified frequency range from 100 MHz to 33 GHz. Additional application and technical information can be found in the HMC939ALP4E data sheet. The HMC939ATCPZ-EP requires dual-supply voltages, VDD = 5 V and VSS = -5 V, and provides a complementary metal oxide semiconductor (CMOS)-/transistor to transistor level (TTL)-compatible parallel control interface by incorporating an on-chip driver. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com HMC939ATCPZ-EP Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Power Derating Curve ..................................................................4 Enhanced Product Features ............................................................ 1 ESD Caution...................................................................................4 Applications ....................................................................................... 1 Pin Configuration and Function Descriptions..............................5 Functional Block Diagram .............................................................. 1 Interface Schematics .....................................................................6 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................7 Revision History ............................................................................... 2 Outline Dimension............................................................................8 Specifications..................................................................................... 3 Ordering Guide .............................................................................8 Absolute Maximum Ratings............................................................ 4 Thermal Resistance ...................................................................... 4 REVISION HISTORY 10/2017--Revision 0: Initial Version Rev. 0 | Page 2 of 8 Data Sheet HMC939ATCPZ-EP SPECIFICATIONS VDD = 5 V, VSS = -5 V, VPx = 0 V or VDD, TCASE = 25C, 50 system, unless otherwise noted. Table 1. Parameter FREQUENCY RANGE INSERTION LOSS Symbol ATTENUATION Range Step Size Step Error State Error RETURN LOSS RELATIVE PHASE SWITCHING CHARACTERISTICS Rise and Fall Time tRISE, tFALL On and Off Time tON, tOFF INPUT LINEARITY 0.1 dB Compression P0.1dB Third-Order Intercept SUPPLY CURRENT Positive Negative DIGITAL CONTROL INPUTS Voltage Low High Current Low and High IP3 Test Conditions/Comments Min 0.1 Typ Max 33 5.5 7.0 8 Unit GHz dB dB dB 0.1 GHz to 18 GHz 18 GHz to 26.5 GHz 26.5 GHz to 33 GHz 4.5 5.5 6 Between minimum and maximum attenuation states, 0.1 GHz to 33 GHz Between any successive attenuation states, 0.1 GHz to 33 GHz Between any successive attenuation states, 0.1 GHz to 33 GHz Referenced to insertion loss state 1 dB to 15 dB attenuation states, 0.1 GHz to 33 GHz 16 dB to 31 dB attenuation states, 0.1 GHz to 20 GHz 16 dB to 31 dB attenuation states, 20 GHz to 33 GHz RF1 and RF2 pins, all attenuation states, 0.1 GHz to 33 GHz Between minimum and maximum attenuation states 0.1 GHz to 18 GHz 18 GHz to 26.5 GHz 26.5 GHz to 33 GHz Between all attenuation states 10% to 90% of radio frequency (RF) output 50% digital control input voltage (VCTL) to 90% of RF output All attenuation states 0.1 GHz to 0.5 GHz 0.5 GHz to 33 GHz 8 dBm per tone, 1 MHz spacing 0.1 GHz to 0.5 GHz 0.5 GHz to 33 GHz 31 dB 1 dB 0.5 dB IDD ISS -(0.5 + 5% of attenuation state) -(0.5 + 5% of attenuation state) -(0.6 + 8% of attenuation state) 2.5 -7.0 +(0.5 + 5% of attenuation state) +(0.5 + 5% of attenuation state) +(0.6 + 8% of attenuation state) dB dB dB 10 dB 45 60 80 Degrees Degrees Degrees 45 ns 60 ns 20 24 dBm dBm 43 40 dBm dBm 4.5 -5.5 6.5 -3.0 mA mA 0.8 5 V V P0 to P4 pins VINL VINH 0 2 IINL, IINH <1 Rev. 0 | Page 3 of 8 A HMC939ATCPZ-EP Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. Rating 7V -7 V VDD + 0.5 V 27 dBm JA is the natural convection junction to ambient thermal resistance measured in a one cubic foot sealed enclosure. JC is the junction to case thermal resistance. Table 3. Thermal Resistance 0.453 W 0.314 W 0.174 W Package Type CP-24-221 JA 213 JC 143.52 Unit C/W Thermal impedance simulated values are based on a JEDEC 2S2P thermal test board with nine thermal vias. See JEDEC JESD51. 2 The device is set to maximum attenuation state. 1 150C -55C to +125C -65C to +150C 260C POWER DERATING CURVE 1.2 250 V (Class 1A) See Figure 2. 2 See the Ordering Guide for more information. 1 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. 1.0 0.8 0.6 0.4 0.2 0 -60 -40 -20 0 20 40 60 CASE TEMPERATURE (C) Only one absolute maximum rating can be applied at any one time. 80 100 120 16267-002 MAXIMUM POWER DISSIPATION (W) Parameter Supply Voltage Positive Negative Digital Control Input Voltage, VCTL RF Input Power (All Attenuation States, f = 0.1 GHz to 33 GHz, TCASE = 85C) Continuous Power Dissipation, PDISS (TCASE = 85C)1 (TCASE = 105C)1 (TCASE = 125C)1 Temperature Junction, TJ Case, TCASE Storage Reflow2 Moisture Sensitivity Level 3 (MSL3) Rating Electrostatic Discharge (ESD) Sensitivity Human Body Model (HBM) Figure 2. Maximum Power Dissipation vs. Case Temperature (TCASE) ESD CAUTION Rev. 0 | Page 4 of 8 Data Sheet HMC939ATCPZ-EP P1 P2 P3 P4 NIC 24 23 22 21 20 19 VSS 1 18 VDD NIC 2 17 NIC NIC 3 16 NIC 15 NIC HMC939ATCPZ-EP TOP VIEW (Not to Scale) NIC 6 13 NIC 7 8 9 10 11 12 NIC RF2 NIC 14 NIC 5 NIC RF1 NIC 4 NIC NIC PACKAGE BASE GND NOTES 1. NIC = NO INTERNAL CONNECTION 2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND FOR PROPER OPERATION. 16267-003 P0 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 to 4, 6 to 13, 15 to 17, 19 5, 14 Mnemonic VSS NIC 18 20 to 24 VDD P4 to P0 RF1, RF2 EPAD Description Negative Supply Voltage. Not Internally Connected. These pins are not internally connected; however, all data shown herein was measured with these pins connected to the RF/dc ground of evaluation board. RF Inputs or Outputs of Attenuator. This pin is dc-coupled to 0 V and ac matched to 50 . No dc blocking capacitor is necessary when the RF line potential is equal to 0 V dc. Positive Supply Voltage. Parallel Control Voltage Inputs. These pins select the required attenuation. There is no internal pull-up or pull-down resistor on these pins; therefore, they must always be kept at a valid logic level (VINH or VINL) and not be left floating. Exposed Pad. The exposed pad must be connected to ground for proper operation. Table 5. P4 to P0 Truth Table P4 High High High High High Low Low 1 P3 High High High High Low High Low Digital Control Input1 P2 P1 High High High High High Low Low High High High High High Low Low P0 High Low High High High High Low Attenuation State (dB) 0 dB (reference) 1 dB 2 dB 4 dB 8 dB 16 dB 31 dB Any combination of the control voltage input states shown in Table 5 provides an attenuation equal to the sum of the bits selected. Rev. 0 | Page 5 of 8 HMC939ATCPZ-EP Data Sheet INTERFACE SCHEMATICS RF1 RF2 16267-004 VDD VDD 16267-005 P0 TO P4 500 Figure 4. RF1 and RF2 Interface Schematic Figure 5. Parallel Control Voltage Inputs Interface Schematic Rev. 0 | Page 6 of 8 Data Sheet HMC939ATCPZ-EP TYPICAL PERFORMANCE CHARACTERISTICS 0 -2 -3 -55C -40C +25C +125C 60 -4 -5 -6 -7 -8 INPUT IP3 (dBm) INSERTION LOSS (dB) 70 -55C +25C +125C -1 -9 -10 -11 50 40 30 -12 -13 -14 20 0 5 10 25 20 15 35 30 40 FREQUENCY (GHz) Figure 6. Insertion Loss vs. Frequency at Various Temperatures 35 10 16267-006 -16 0 15000 20000 25000 30000 35000 Figure 9. Input IP3 vs. Frequency at Minimum Attenuation State and at Various Temperatures 70 -55C +25C +125C -55C -40C +25C +125C 60 INPUT IP3 (dBm) 25 20 15 50 40 30 20 0 5000 10000 15000 20000 25000 30000 35000 FREQUENCY (MHz) Figure 7. Input P0.1dB vs. Frequency at Minimum Attenuation State and at Various Temperatures 35 10 16267-007 10 0 25 20 200 300 400 500 600 FREQUENCY (MHz) 700 800 900 1000 16267-008 15 100 300 400 500 600 700 800 900 1000 Figure 10. Input IP3 vs. Frequency at Minimum Attenuation State and at Various Temperatures (Low Frequency Detail) 30 0 200 FREQUENCY (MHz) -55C +25C +125C 10 100 16267-010 INPUT P0.1dB (dBm) 10000 FREQUENCY (MHz) 30 INPUT P0.1dB (dBm) 5000 16267-009 -15 Figure 8. Input P0.1dB vs. Frequency at Minimum Attenuation State and at Various Temperatures (Low Frequency Detail) Rev. 0 | Page 7 of 8 HMC939ATCPZ-EP Data Sheet OUTLINE DIMENSION DETAIL A (JEDEC 95) 0.30 0.25 0.18 1 18 0.50 BSC 2.70 2.60 SQ 2.50 EXPOSED PAD 13 0.50 0.40 0.30 TOP VIEW 0.90 0.85 0.80 PKG-005268 6 12 7 BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.203 REF SEATING PLANE PIN 1 INDIC ATOR AREA OPTIONS (SEE DETAIL A) 24 19 0.20 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-8. 10-04-2016-A PIN 1 INDICATOR 4.10 4.00 SQ 3.90 Figure 11. 24-Lead Lead Frame Chip Scale Package [LFCSP] 4 mm x 4 mm Body and 0.85 mm Package Height (CP-24-22) Dimensions shown in millimeters ORDERING GUIDE Model1 HMC939ATCPZ-EP-PT HMC939ATCPZ-EP-R7 1 2 Temperature Range -55C to +125C -55C to +125C MSL Rating2 MSL3 MSL3 Package Description 24-Lead Lead Frame Chip Scale Package [LFCSP] 24-Lead Lead Frame Chip Scale Package [LFCSP] All models are RoHS compliant devices. See the Absolute Maximum Ratings section. (c)2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D16267-0-10/17(0) Rev. 0 | Page 8 of 8 Package Option CP-24-22 CP-24-22