LTC3499/LTC3499B
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TYPICAL APPLICATION
DESCRIPTION
750mA Synchronous
Step-Up DC/DC Converters
with Reverse-Battery Protection
The LTC
®
3499/LTC3499B are synchronous, fixed frequency
step-up DC/DC power converters with integrated reverse
battery protection that protect and disconnect the devices
and load when the battery polarity is reversed while
delivering high efficiency in a small (3mm × 3mm) DFN
package. True output disconnect eliminates inrush current
and allows zero load current in shutdown.
The devices feature an input voltage range of 1.8V to 5.5V
enabling operation from two alkaline or NiMH batteries. The
switching frequency is internally set at 1.2MHz allowing
the use of tiny surface mount inductors and capacitors.
A minimal number of external components are required
to generate output voltages ranging from 2V to 6V. The
LTC3499 features automatic Burst Mode operation to
increase efficiency at light loads, while the LTC3499B
features continuous switching at light loads.
The soft-start time is externally programmable through a
small capacitor. Anti-ring circuitry reduces EMI emissions
by damping the inductor in discontinuous mode. The de-
vices feature <1µA shutdown supply current, integrated
overvoltage protection and are available in both 8-pin
(3mm × 3mm) DFN and 8-pin MSOP packages.
Two AA Cells to 5V Synchronous Boost Converter
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
FEATURES
APPLICATIONS
n Medical Equipment
n Digital Cameras
n MP3 Players
n Handheld Instruments
n Reverse-Battery Protection for DC/DC Converter
and Load
n High Efficiency: Up to 94%
n Generates 5V at 175mA from a 1.8V Input
n Operates from 1.8V to 5.5V Input Supply
n 2V to 6V Adjustable Output Voltage
n Inrush Current Controlled During Start-Up
n Output Disconnnect in Shutdown
n Low Noise 1.2MHz PWM Operation
n Tiny External Components
n Automatic Burst Mode
®
Operation (LTC3499)
n Continuous Switching at Light Loads (LTC3499B)
n Overvoltage Protection
n 8-Lead (3mm × 3mm × 0.75mm) DFN
and MSOP Packages
4.7µH
3499 TA01
LTC3499
SW
FB
GND
VIN
VOUT
SHDN
VC
SS
OFFON
10µF
VOUT
5V
175mA
VIN
1.8V TO 3.2V
1M
324k
0.01µF330pF
100k
2.2µF
+
Battery Current vs VIN
VIN AND SW VOLTAGE (V)
–6
–1.0
BATTERY CURRENT (µA)
0
–2 2–4 0 4
3499 TA01b
6
–0.5
1.0
0.5
SHDN = 0V
VOUT = 0V
LTC3499/LTC3499B
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PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
VIN to GND ..................................................... – 7V to 7V
VOUT to GND .............................................. – 0.3V to 7V
SW to VOUT ................................................... – 7V to 1V
SW to GND
DC ............................................................... –7V to 7V
Pulsed < 100ns ........................................... –7V to 8V
SHDN to GND ................................................. – 7V to 7V
(Note 1)
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3499EDD#PBF LTC3499EDD#TRPBF LBRB 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC3499BEDD#PBF LTC3499BEDD#TRPBF LCDZ 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC3499EMS8#PBF LTC3499EMS8#TRPBF LTBRC 8-Lead Plastic MSOP –40°C to 85°C
LTC3499BEMS8#PBF LTC3499BEMS8#TRPBF LTCFB 8-Lead Plastic MSOP –40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
TOP VIEW
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
5
6
7
8
9
4
3
2
1SHDN
VIN
SW
GND
VC
FB
VOUT
SS
TJMAX = 125°C, θJA = 45°C
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
VC
FB
VOUT
SS
SHDN
VIN
SW
GND
1
2
3
4
8
7
6
5
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 160°C/W
FB, SS to GND ............................................. – 0.3V to 7V
Operating Temperature Range
(Notes 3, 4) ......................................... –40°C to 85°C
Storage Temperature Range ................. –65°C to 125°C
Lead Temperature (Soldering, 10 sec)
MSOP .............................................................. 300°C
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply
VIN Minimum Start-Up Voltage l1.6 1.8 V
VOUT Output Voltage Adjust Range l2 6 V
VFB FB Voltage l1.195 1.220 1.245 V
The l denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VIN = 2.4V, VOUT = 5V, SHDN = 2.4V, TA = TJ unless otherwise noted. (Note 3)
LTC3499/LTC3499B
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ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Specification is guaranteed by design and not 100% tested in
production.
Note 3:The LTC3499E/LTC3499BE are guaranteed to meet device
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature are assured by design, characterization and
correlation with statistical process controls.
The l denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VIN = 2.4V, VOUT = 5V, SHDN = 2.4V, TA = TJ unless otherwise noted. (Note 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IFB FB Input Current VFB = 1.22V 3 50 nA
IVIN VIN Quiescent Current No Output Load l300 600 µA
ISD VIN Quiescent Current in Shutdown SHDN = 0V, VOUT = 0V 0.1 1 µA
IBURST Quiescent Current – Burst Mode Operation VIN Current at 2.4V (LTC3499 Only)
VOUT Current at 5V (LTC3499 Only)
20
1.5
µA
µA
INMOS NMOS Switch Leakage Current VSW = 6V 0.1 5 µA
IPMOS PMOS Switch Leakage Current VOUT = 6V, VSW = 0V 0.1 5 µA
RNMOS NMOS Switch On Resistance VOUT = 3.3V
VOUT = 5V
0.45
0.4
Ω
Ω
RPMOS PMOS Switch On Resistance VOUT = 3.3V
VOUT = 5V
0.58
0.45
Ω
Ω
ILIM NMOS Current Limit l0.75 1 A
tDLY, ILIM Current Limit Delay to Output Note 2 60 ns
DMAX Maximum Duty Cycle l80 85 %
DMIN Minimum Duty Cycle l0 %
fOSC Frequency Accuracy l1 1.2 1.4 MHz
GmEA Error Amplifier Transconductance 40 µmhos
ISOURCE Error Amplifier Source Current –5 µA
ISINK Error Amplifier Sink Current 5 µA
ISS SS Current Source VSS = 1V –3 µA
VOV VOUT Overvoltage Threshold 6.8 V
VOV(HYST) VOUT Overvoltage Hysteresis 400 mV
Shutdown
VSHDN(LOW) SHDN Input Low Voltage l0.2 V
VSHDN(HIGH) SHDN Input High Voltage Measured at SW l1.2 V
ISD SHDN Input Current 1 µA
Reverse Battery
IVOUT,REVBATT VOUT Reverse-Battery Current VOUT = 0V, VIN = VSHDN = VSW = –6V l5 µA
IVIN,REVBATT VIN and VSW Reverse-Battery Current VOUT = 0V, VIN = VSHDN = VSW = –6V l–5 µA
ISHDN,REVBATT SHDN Reverse-Battery Current VOUT = 0V, VIN = VSHDN = VSW = –6V l–5 µA
Note 4: These ICs include overtemperature protection that is intended
to protect the devices during momentary overload conditions. Junction
temperatures will exceed 125°C when overtemperature protection is
active. Continuous operation above the specified maximum operating
temperature range may impair device reliability.
LTC3499/LTC3499B
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TYPICAL PERFORMANCE CHARACTERISTICS
LOAD CURRENT (mA)
0.1
40
EFFICIENCY (%)
POWER LOSS (mW)
50
60
70
80
90
100
0.1
1
10
100
1000
10000
100000
1 10 100 1000
3499 G01
VIN = 3.2V
VIN = 2.4V
VIN = 1.8V
POWER LOSS
EFFICIENCY
LOAD CURRENT (mA)
0.1
70
80
100
100
3499 G03
60
50
1 10 1000
40
30
90
100
1000
100000
10
1
0.1
10000
EFFICIENCY (%)
POWER LOSS (mW)
VIN = 4.2V
VIN = 3.6V
VIN = 3V
POWER LOSS
EFFICIENCY
LOAD CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3499 G17
0
1
VIN = 3.2V
VIN = 2.4V
VIN = 1.8V
TEMPERATURE (°C)
–50
CURRENT LIMIT (A)
1.00
1.01
1.02
25 75
3499 G04
0.99
0.98
0.97
0.96
–25 0 50
1.03
1.04
100
LOAD CURRENT (mA)
0.1
40
EFFICIENCY (%)
POWER LOSS (mW)
50
60
70
80
90
100
0.1
1
10
100
1000
10000
100000
1 10 100 1000
3499 G02
VIN = 3V
VIN = 2.4V
VIN = 1.8V
POWER LOSS
EFFICIENCY
INPUT VOLTAGE (V)
1.8
0
Burst Mode OUTPUT CURRENT THRESHOLD (mA)
10
20
30
40
60
2.3 2.8 3.3 3.8
3499 G05
4.3 4.8
50
VOUT = 5V
VIN (V)
1.5
OUTPUT CURRENT (mA)
400
500
600
5.5
3499 G06
300
200
02.5 3.5 4.5
100
800
700
VOUT = 3.3V
VOUT = 5V
VIN > VOUT VIN > VOUT
VIN (V)
1.5
0
INPUT CURRENT (µA)
20
60
80
100
200
140
2.5 3.5
3499 G07
40
160
180
120
4.5 5.5
VOUT = 3.3V
VOUT = 5V
TEMPERATURE (°C)
–50
0
Burst Mode QUIESCENT CURRENT (µA)
5
10
15
20
30
–25 0 25 50
3499 G08
75 100
25
Current Limit Accuracy
vs Temperature
2-Cell to 3.3V Efficiency
vs Load Current (LTC3499 Only)
Burst Mode Output Current
Threshold vs Input Voltage
(LTC3499 Only)
Maximum Output Current
Capability vs VIN
No Load Input Current vs VIN
(LTC3499 Only)
Burst Mode Quiescent Current
vs Temperature (LTC3499 Only)
2-Cell to 5V Efficiency
vs Load Current (LTC3499 Only)
Li-Ion to 5V Efficiency
vs Load Current (LTC3499 Only)
2-Cell to 5V Efficiency
vs Load Current (LTC3499B Only)
TA = 25°C, unless otherwise noted.
LTC3499/LTC3499B
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TEMPERATURE (°C)
–50
FB VOLTAGE (V)
25 75
3499 G09
–25 0 50
1.2215
1.2210
1.2205
1.2200
1.2195
1.2190
1.2185
1.2220
1.2225
100
TEMPERATURE (°C)
–50
0
Burst Mode QUIESCENT CURRENT (µA)
5
10
15
20
30
–25 0 25 50
3499 G08
75 100
25
VIN AND SW VOLTAGE (V)
–6
–1.0
REVERSE-BATTERY CURRENT (µA)
0
–2 2–4 0 4
3499 G11
6
–0.5
1.0
0.5
SHDN = 0V
VOUT = 0V
VOUT
50mV/DIV
20µs/DIV 3499 G12
VIN = 2.4V
VOUT = 5V
L = 4.7µH
COUT = 10µF
CFF = 10pF (FEEDFORWARD CAPACITOR FROM
VOUT TO FB)
IL
50mA/DIV
VOUT
200mV/DIV
200µs/DIV 3499 G13
VIN = 2.4V
VOUT = 5V
ILOAD = 50mA to 200mA
RZ = 100k
CF = 680pF
COUT = 10µF
L = 4.7µH
ILOAD
100mA/DIV
200mA
50mA
SW
2V/DIV
200ns/DIV 3499 G14
VIN = 2.4V
VOUT = 5V
L = 4.7µH
IL
100mA/DIV
VIN
2V/DIV
SS
2V/DIV
VOUT
2V/DIV
1ms/DIV 3499G15
VIN = 2.4V
VOUT = 5V
L = 4.7µH
CSS = 0.01µF
COUT = 10µF
IL
200mA/DIV
SW
2V/DIV
200ns/DIV 3499 G16
VIN = 2.4V
VOUT = 5V
L = 4.7µH
IL
100mA/DIV
Burst Mode Operation
(LTC3499 Only) Load Transient 50mA to 200mA
Fixed Frequency Discontinous
Mode Operation
Soft-Start into 25Ω Load Fixed Frequency Operation
FB Voltage vs Temperature
Burst Mode Quiescent Current
vs Temperature
VIN and SW Reverse-Battery
Current vs VIN and SW Voltage
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
LTC3499/LTC3499B
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PIN FUNCTIONS
SHDN (Pin 1): Shutdown Input for IC. Connect to a voltage
greater than 1.2V to enable and a voltage less than 0.2V
to disable the LTC3499/LTC3499B.
VIN (Pin 2): Input Supply Voltage. The valid operating
voltage is between 1.8V to 5.5V. VIN has reverse battery
protection. Since the LTC3499/LTC3499B use VIN as the
main bias source, bypass with a low ESR ceramic capaci-
tor of at least 2.2µF.
SW (Pin 3): Switch Pin. Connect an inductor from VIN to
this pin with a value between 2.2µH and 10µH. Keep PCB
trace lengths as short and wide as possible to minimize
EMI and voltage overshoot. If the inductor current falls to
zero or SHDN is low an internal 250Ω antiringing switch
is connected from VIN to SW to minimize EMI.
GND (Pin 4/Exposed Pad, DD Package Pin 9): Signal
and Power Ground. The DD package exposed pad must
be soldered to the PCB power ground plane for electrical
connection and rated thermal performance.
SS (Pin 5): Soft-Start Input. Connect a capacitor from
SS to ground to control the inrush current at start-up.
An internal 3µA current source charges this pin. SS will
be discharged if SHDN is pulled low, thermal shutdown
occurs or VIN is below the minimum operating voltage.
VOUT (Pin 6): Power Supply Output. Connect a low ESR
output filter capacitor from this pin to the ground plane.
FB (Pin 7): FB Input to Error Amplifier. Connect a resistor
divider tap from VOUT to this pin to set the output voltage.
The output voltage can be adjusted between 2V and 6V.
Referring to the Functional Block Diagram, the output
voltage is given by:
VOUT =1.22 •1+R1
R2
VC (Pin 8): Error Amplifier Output. A frequency com-
pensation network is connected from this pin to GND to
compensate the boost converter loop. See Closing the
Feedthrough Loop section for guidelines.
LTC3499/LTC3499B
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FUNCTIONAL BLOCK DIAGRAM
GND
3499 F01
4
VOUT
VSELECT
CSS
COUT
SS
VC
CC1
RZ
CC2
Σ
–
+
OV COMPARATOR
REVERSE-BATTERY COMPARATOR
1 = OFF
CFF
(OPTIONAL)
FB
–
+
–
+
–
+
–
+
–
+
–
+
ENABLE
TSD
PWM COMPARATOR
ENABLE
SD
SLEEP
3µA
1.22V R1
R2
Burst Mode
CONTROL
(LTC3499 ONLY)
1.2MHz
OSCILLATOR
SLOPE
COMPENSATION
PWM
LOGIC
AND
DRIVERS
SHDN
REFERENCE
BIAS
UVLO
CURRENT LIMIT COMPARATOR
0.8V
1A
TYP
IZERO
SW
L
3
VIN
ANTI-RING
250Ω
CIN
VIN
1.8V TO 5.5V
2
+
6
8
7
SLEEP
ENABLE
THERMAL SD
VOUT
6.8V
–
+
1 = CLOSED 1 = CLOSED
ERROR AMPLIFIER
0.7V
1
–
+
5k
5
Figure 1: Functional Block Diagram
LTC3499/LTC3499B
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OPERATION
The LTC3499/LTC3499B provide high efficiency, low noise
power for boost applications with output voltages up to
6V. Operation can be best understood by referring to
the Functional Block Diagram in Figure 1. The synchro-
nous boost converters are housed in either an 8-lead
(3mm×3mm) DFN or MSOP package and operates at a
fixed 1.2MHz. With a 1.6V typical minimum VIN voltage
these devices are well suited for applications using two
or three alkaline or nickel-metal hydride (NiMH) cells or
one Lithium-Ion (Li-Ion) cell. The LTC3499/LTC3499B
have integrated circuitry which protects the battery, IC,
and circuitry powered by the device in the event that the
input batteries are connected backwards (reverse battery
protection). The true output disconnect feature eliminates
inrush current and allows VOUT to be zero volts during
shutdown. The current mode architecture simplifies loop
compensation with excellent load transient response.
The low RDS(ON), low gate charge synchronous switches
eliminate the need for an external Schottky diode recti-
fier, and provide efficient high frequency pulse width
modulation (PWM). Burst Mode quiescent current to the
LTC3499 is only 20µA from VIN, maximizing battery life.
The LTC3499B does not have Burst Mode operation and
the device continues switching at constant frequency. This
results in the absence of low frequency output ripple at
the expense of light load efficiency.
LOW NOISE FIXED FREQUENCY OPERATION
Shutdown
The LTC3499/LTC3499B are shut down by pulling SHDN
below 0.2V, and activated by pulling the pin above 1.2V.
SHDN can be driven above VIN or VOUT as long as it is
limited to less than the absolute maximum rating.
Soft-Start
The soft-start time is programmed with an external capaci-
tor to ground on SS. An internal current source charges
the capacitor, CSS, with a nominal 3µA. The voltage on SS
is used to clamp the voltage on VC. The soft-start time
is given by
t(msec) = CSS (µF) • 200
In the event of an external shutdown or thermal shutdown
(TSD), CSS is discharged through a nominal 5kΩ imped-
ance to GND. Once the condition is removed and SS is
discharged near ground, a soft-start will automatically
be re-initiated.
Error Amplifier
A transconductance amplifier generates an error voltage
from the difference between the positive input internally
connected to the 1.22V reference and the negative input
connected to FB. A simple compensation network is placed
from VC to ground. Internal clamps limit the minimum and
maximum error amplifier output voltage for improved large
signal transient response. A voltage divider from VOUT to
GND programs the output voltage via FB from 2V to 6V
and is defined by the following equation:
VOUT =1.22 •1+R1
R2
Current Sensing
Lossless current sensing converts the peak current signal
into a voltage which is summed with the internal slope
compensation. This summed signal is compared to the
error amplifier output to provide a peak current control
command for the PWM. Peak switch current is limited
to 750mA minimum.
Antiringing Control
The antiringing control connects a resistor across the
inductor to damp the ringing on SW in discontinuous
conduction mode. The LC resonant ringing (L = inductor,
CSW = capacitance on SW) is low energy, but can cause
EMI radiation if antiringing control is not present.
Zero Current Comparator
The zero current comparator monitors the inductor current
to the output and shuts off the synchronous rectifier once
this current reduces to approximately 40mA, preventing
negative inductor current.
LTC3499/LTC3499B
9
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OPERATION
Reverse-Battery Protection
Connecting the battery backwards poses a severe problem
to most power converters. At a minimum the battery will
be quickly discharged. Almost all ICs have an inherent diode
from VIN (cathode) to ground (anode) which conducts ap-
preciable current when VIN drops more than 0.7V below
ground. Under this condition the integrated circuit will
most likely be damaged due to the excessive current draw.
There exists the possibility for the battery and circuitry
powered by the device to also be damaged. The LTC3499/
LTC3499B have integrated circuitry which allows negligible
current flow under a reverse-battery condition, protecting
the battery, device and circuitry attached to the output. A
graph of the reverse-battery current drawn is shown in
the Typical Performance Characteristics.
Discrete methods of reverse battery protection put ad-
ditional dissipative elements in the high current path
reducing efficiency while increasing component count
to implement protection. The LTC3499/LTC3499B do not
suffer from either of these drawbacks.
Burst Mode Operation (LTC3499 only)
Portable devices frequently spend extended time in low
power or stand-by mode, only drawing high power when
specific functions are enabled. In order to improve battery
life in these types of products, high power converter ef-
ficiency needs to be maintained over a wide output power
range. In addition to its high efficiency at moderate and
heavy loads, the LTC3499 includes automatic Burst Mode
operation that improves efficiency of the power converter
at light loads. Burst Mode operation is initiated if the
output load current falls below an internally programmed
threshold (see Typical Performance graph, Output Load
Burst Mode Threshold vs VIN). Once initiated the Burst
Mode operation circuitry shuts down most of the circuitry
in the LTC3499, keeping alive only the circuitry required
to monitor the output voltage.
This state is referred to as sleep. In sleep, the LTC3499
only draws 20µA from the input supply, greatly enhancing
efficiency. When the output has drooped approximately
1% from its nominal regulation point, the LTC3499 wakes
up and commences normal PWM operation. The output
capacitor will recharge causing the LTC3499 to re-enter
sleep if the output load current remains less than the
sleep threshold. The frequency of this intermittent PWM
(or burst) operation is proportional to load current.
Therefore, as the load current drops further below the
burst threshold, the LTC3499 operates in PWM mode
less frequently. When the load current increases above
the burst threshold, the LC3499 will resume continuous
PWM operation seamlessly.
Referring to the Functional Block Diagram, an optional
capacitor, CFF, between VOUT and FB in some circumstances
can reduce peak-to-peak VOUT ripple and input quiescent
current during Burst Mode operation. Typical values for
CFF range from 10pF to 220pF.
Output Disconnect and Inrush Current Limiting
The LTC3499/LTC3499B are designed to allow true output
disconnect by eliminating body diode conduction of the
internal P-channel MOSFET switch. This allows VOUT to
go to zero volts during shutdown without drawing any
current from the input source. It also provides for inrush
current limiting at turn-on, minimizing surge current seen
by the input supply.
VIN > VOUT Operation
The LTC3499/LTC3499B will maintain voltage regulation
when the input voltage is above the output voltage. This is
achieved by terminating the switching on the synchronous
P-channel MOSFET and applying VIN statically on the gate.
This will ensure the volts • seconds of the inductor will
reverse during the time current is flowing to the output.
Since this mode will dissipate more power in the IC, the
maximum output current is limited in order to maintain
an acceptable junction temperature:
IOUT(MAX) ≅125 – TA
θJA •VIN +1.5
( )
– VOUT
( )
where TA = ambient temperature and θJA is the package
thermal resistance (45°C/W for the DD8 and 160°C/W
for the MS8).
For example at VIN = 4.5V, VOUT = 3.3V and TA = 85°C in
the DD8 package, the maximum output current is 330mA.
LTC3499/LTC3499B
10
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PCB LAYOUT GUIDELINES
The high speed operation of the LTC3499/LTC3499B
demand careful attention to board layout. Advertised per-
formance will not be achieved with careless layout. Figure 2
shows the recommended component placement. A large
copper area will help to lower the chip temperature. Traces
carrying high current (SW, VOUT, GND) are kept short.
The lead length to the battery should be kept as short as
possible. The VIN and VOUT ceramic capacitors should be
placed as close to the IC pins as possible.
APPLICATIONS INFORMATION
The inductor current ripple is typically set to 20% to 40%
of the maximum inductor current. For high efficiency,
choose an inductor with high frequency core material,
such as ferrite, to reduce core losses. The inductor should
have low ESR (equivalent series resistance) to reduce the
I2R power losses, and must be able to handle the peak
inductor current without saturating. To minimize radiated
noise, use a toroidal or shielded inductor. See Table 1 for
some suggested inductor suppliers.
Table 1. Inductor Vendor Information
PART NUMBER SUPPLIER WEB SITE
MSS5131 and
MOS6020 Series
Coilcraft www.coilcraft.com
SLF7028 and
SLF7045 Series
TDK www.component.tdk.com
LQH55D Series Murata www.murata.com
CDRH4D28 Series Sumida www.sumida.com
D53LC and
D62CB Series
Toko www.tokoam.com
DT0703 Series CoEV www.coev.net
MJPF2520 Series FDK www.fdk.com
Output Capacitor Selection
The output voltage ripple has three components to it. The
bulk value of the capacitor is set to reduce the ripple due
to charge into the capacitor each cycle. The maximum
ripple voltage due to charge is given by:
VRBULK =IP•VIN
COUT •VOUT •f
( )
where IP = peak inductor current and f = switching
frequency.
The ESR (equivalent series resistance) is usually the most
dominant factor for ripple in most power converters. The
ripple due to capacitor ESR is simply given by:
VRCESR = IP • CESR
where CESR = capacitor equivalent series resistance.
Figure 2: Recommended Component Placement
3499 F02
EXPOSED PAD FOR DD8
SW
CC1
CC2
R2
RZ
R1
L
VIN
VBATT
CIN
COUT
GND
FB
SS
VC
9
5
7
8
4
3
2
1
6VOUT
+
CSS
SHDN
COMPONENT SELECTION
Inductor Selection
The LTC3499/LTC3499B allow the use of small surface
mount inductors and chip inductors due to the fast 1.2MHz
switching frequency. A minimum inductance value of
2.2µH is required. Larger values of inductance will allow
greater output current capability by reducing the induc-
tor ripple current. Increasing the inductance above 10µH
will increase total solution area while providing minimal
improvement in output current capability.
LTC3499/LTC3499B
11
3499fc
APPLICATIONS INFORMATION
The ESL (equivalent series inductance) is also an important
factor for high frequency converters. Using small surface
mount ceramic capacitors, placed as close as possible to
VOUT, will minimize ESL.
Low ESR capacitors should be used to minimize output
voltage ripple. A 4.7µF to 10µF output capacitor is suf-
ficient for most applications and should be placed as close
to VOUT as possible. Larger values may be used to obtain
even lower output ripple and improve transient response.
X5R and X7R dielectric materials are preferred for their
ability to maintain capacitance over wide voltage and
temperature ranges.
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn
from the input source and reduces input switching noise.
Ceramic capacitors are a good choice for input decoupling
due to their low ESR and ability to withstand reverse voltage
(i.e. non-polar nature). The capacitor should be located
as close as possible to the device. In most applications a
2.2µF input capacitor is sufficient. Larger values may be
used without limitations. Table 2 shows a list of several
ceramic capacitor manufacturers.
Table 2. Capacitor Vendor Information
SUPPLIER WEB SITE
AVX www.avxcorp.com
Murata www.murata.com
TDK www.component.tdk.com
Taiyo Yuden www.t-yuden.com
Thermal Considerations
For the LTC3499/LTC3499B to deliver full output power, it
is imperative that a good thermal path be provided to dis-
sipate the heat generated within the package. For the DFN
package, this can be accomplished by taking advantage
of the large thermal pad on the underside of the device.
It is recommended that multiple vias in the printed circuit
board be used to conduct heat away from the part and
into a copper plane with as much area as possible. If the
junction temperature continues to rise, the part will go
into thermal shutdown where switching will stop until the
temperature drops.
Closing the Feedback Loop
The LTC3499/LTC3499B utilize current mode control,
with internal slope compensation. Current mode control
eliminates the 2nd order filter due to the inductor and out-
put capacitor exhibited in voltage mode controllers, thus
simplifying it to a single pole filter response. The product
of the modulator control to output DC gain and the error
amp open loop gain gives the DC gain of the system:
GDC =GCONTROL •GEA •VREF
VOUT •GCURRENT _ SENSE
GCONTROL =2•VIN
IOUT
,
GEA ≈1000, GCURRENT _ SENSE =1
RDS ON
( )
The output filter pole is given by:
fFILTER _ POLE =IOUT
π•VOUT •COUT
( )
where COUT is the output filter capacitor.
The output filter zero is given by:
fFILTER _ ZERO =1
2•π•RESR •COUT
( )
where RESR is the capacitor equivalent series resistance.
A troublesome feature of the boost regulator topology is
the right half plane (RHP) zero, given by:
fRHPZ =VIN2
2•π•IOUT •VOUT •L
( )
LTC3499/LTC3499B
12
3499fc
APPLICATIONS INFORMATION
There is a resultant gain increase with a phase lag which
makes it difficult to compensate the loop. At heavy loads
the right half plane zero can occur at a relatively low
frequency. The loop gain is typically rolled off before the
RHP zero frequency.
The typical error amp compensation is shown in Figure 3,
following the equations for the loop dynamics:
fPOLE1~1
2•π•10e6 •CC1
( )
which is extremely close to DC.
fZERO1 =1
2•π•RZ•CC1
( )
fPOLE2 =1
2•π•RZ•CC2
( )
Figure 3: Typical Error Amplifier Compensation
3499 F03
VOUT
CC1
RZCC2
FB
–
+
1.22V R1
R2
8
ERROR AMPLIFIER
6
7
VC
8
LTC3499/LTC3499B
13
3499fc
TYPICAL APPLICATIONS
L
4.7µH
3499 F05a
LTC3499
SW
FB
GND
VIN
VOUT
SHDN
VC
SS
COUT
10µF
×5R
VOUT
5V
175mA
VIN
2 AA CELLS
1.8V TO 3.2V
1M
324k
0.01µF330pF
100k
CIN
2.2µF
×5R
+
CIN: TAIYO YUDEN X5R JMK212BJ225MD
COUT: TAIYO YUDEN X5R JMK212BJ106MD
L: COILCRAFT MSS5131-472MLB
OFFON
Lithium-Ion to 5V, 350mA
Two Cells to 5V, 175mA
Lithium-Ion to 5V Efficiency
Two Cells to 5V Efficiency
L
4.7µH
3499 F04a
LTC3499
SW
FB
GND
VIN
VOUT
SHDN
VC
SS
OFFON
COUT
10µF
×5R
VOUT
5V
350mA
CIN: TAIYO YUDEN X5R JMK212BJ225MD
COUT: TAIYO YUDEN X5R JMK212BJ106MD
L: COILCRAFT MSS5131-472MLB
VIN
Li-Ion
3.1V TO 4.2V
1M
324k
0.01µF330pF
100k
CIN
2.2µF
×5R
+
LOAD CURRENT (mA)
0.1
70
80
100
100
3499 G03
60
50
1 10 1000
40
30
90
100
1000
100000
10
1
0.1
10000
EFFICIENCY (%)
POWER LOSS (mW)
VIN = 4.2V
VIN = 3.6V
VIN = 3V
POWER LOSS
EFFICIENCY
LOAD CURRENT (mA)
0.1
40
EFFICIENCY (%)
POWER LOSS (mW)
50
60
70
80
90
100
0.1
1
10
100
1000
10000
100000
1 10 100 1000
3499 G01
VIN = 3.2V
VIN = 2.4V
VIN = 1.8V
POWER LOSS
EFFICIENCY
LTC3499/LTC3499B
14
3499fc
PACKAGE DESCRIPTION
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ± 0.10
(2 SIDES)
0.75 ±0.05
R = 0.125
TYP
2.38 ±0.10
14
85
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(DD8) DFN 0509 REV C
0.25 ± 0.05
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
1.65 ±0.05
(2 SIDES)2.10 ±0.05
0.50
BSC
0.70 ±0.05
3.5 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
MSOP (MS8) 0307 REV F
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.18
(.007)
0.254
(.010)
1.10
(.043)
MAX
0.22 – 0.38
(.009 – .015)
TYP
0.1016 ± 0.0508
(.004 ± .002)
0.86
(.034)
REF
0.65
(.0256)
BSC
0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
1 2 34
4.90 ± 0.152
(.193 ± .006)
8765
3.00
±
0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
0.52
(.0205)
REF
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.42 ± 0.038
(.0165 ± .0015)
TYP
0.65
(.0256)
BSC
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev F)
LTC3499/LTC3499B
15
3499fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
C 3/11 Updated Pin Functions for Pins 4 and 9.
Corrected typo in Equation from fRPHZ to fRHPZ.
6
11
(Revision history begins at Rev C)
LTC3499/LTC3499B
16
3499fc
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
LINEAR TECHNOLOGY CORPORATION 2006
LT 0311 REV C • PRINTED IN USA
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L
4.7µH
3499 F06a
LTC3499
SW
FB
GND
VIN
VOUT
SHDN
VC
SS
COUT
10µF
×5R
VOUT
3.3V
250mA
332k
562k
0.01µF330pF
100k
CIN
2.2µF
×5R
VIN
2 AA CELLS
1.8V TO 3.2V
+
CIN: TAIYO YUDEN X5R JMK212BJ225MD
COUT: TAIYO YUDEN X5R JMK212BJ106MD
L: COILCRAFT MSS5131-472MB
OFFON
Two Cells to 3.3V, 250mA Two Cells to 5V Efficiency
LOAD CURRENT (mA)
0.1
40
EFFICIENCY (%)
POWER LOSS (mW)
50
60
70
80
90
100
0.1
1
10
100
1000
10000
100000
1 10 100 1000
3499 F06b
VIN = 3V
VIN = 2.4V
VIN = 1.8V
POWER LOSS
EFFICIENCY
