September 2013 Rev 2
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17
VND7N04, VND7N04-1
VNK7N04FM
"OMNIFET":
Fully autoprotected power MOSFET
Features
■Linear current limitation
■Thermal shut down
■Short circuit protection
■Integrated clamp
■Low current drawn from input pin
■Diagnostic feedback through input pin
■ESD protection
■Direct access to the gate of the power
MOSFET (analog driving)
■Compatible with standard power MOSFET Description
The VND7N04, VND7N04-1 and VNK7N04FM
are monolithic devices made using
STMicroeletronics VIPower M0 Technology,
intended for replacement of standard power
MOSFETS in DC to 50 KHz applications. Built-in
thermal shut-down, linear current limitation and
overvoltage clamp protect the chip in harsh
enviroments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
Type Vclamp RDS(on) Ilim
VND7N04
VND7N04-1
VNK7N04FM
42 V
42 V
42 V
0.14 Ω
0.14 Ω
0.14 Ω
7 A
7 A
7 A
Table 1. Device summary
Part number Order code
VND7N04 VND7N04, VND7N04-1-E,
VND7N04-E, VND7N0413TR,
VND7N04TR-E
VND7N04-1 VND7N04-1
VNK7N04FM VNK7N04FM
www.st.com
Contents VND7N04, VND7N04-1, VNK7N04FM
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Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
VND7N04, VND7N04-1, VNK7N04FM Block diagram
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1 Block diagram
Figure 1. Block diagram
Electrical specification VND7N04, VND7N04-1, VNK7N04FM
4/17
2 Electrical specification
2.1 Absolute maximum rating
2.2 Thermal data
2.3 Electrical characteristics
Table 2. Absolute maximum rating
Symbol Parameter
Value
Unit
DPAK
IPAK SOT-82FM
VDS Drain-source voltage (Vin = 0) Internally clamped V
Vin Input voltage 18 V
IDDrain current Internally limited A
IRReverse DC output current -7 A
Vesd Electrostatic discharge (C = 100 pF,
R=1.5 KΩ)2000 V
Ptot Total dissipation at Tc = 25 °C 60 9 W
TjOperating junction temperature Internally limited °C
TcCase operating temperature Internally limited °C
Tstg Storage temperature -55 to 150 °C
Table 3. Thermal data
DPAK/IPAK SOT82-FM
Rthj-case Thermal resistance junction-case max 3.75 14 °C/W
Rthj-amb Thermal resistance junction-ambient max 100 100 °C/W
Table 4. Electrical characteristics: off
(-40 < Tj < 125 °C unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCLAMP Drain-source clamp voltage ID = 200 mA Vin = 0 32 42 52 V
VCLTH Drain-source clamp threshold voltage ID = 2 mA Vin = 0 31 V
VINCL Input-source reverse clamp voltage Iin = -1 mA -1.1 -0.25 V
IDSS Zero input voltage drain current (Vin = 0) VDS = 13 V Vin = 0
VDS = 25 V Vin = 0 75
200 µA
µA
IISS Supply current from input pin VDS = 0 V Vin = 10 V 250 550 µA
VND7N04, VND7N04-1, VNK7N04FM Electrical specification
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Table 5. Electrical characteristics: on
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IN(th)
Input threshold voltage V
DS
= V
in
I
D
+ I
in
= 1 mA 0.8 3 V
R
DS(on)
Static drain-source on resistance
V
in
= 10 V I
D
= 3.5 A
V
in
= 5 V I
D
= 3.5 A
-40 < T
j
< 25 °C
V
in
= 10 V I
D
= 3.5 A
V
in
= 5 V I
D
= 3.5 A
T
j
= 125 °C
0.14
0.28
0.28
0.56
Ω
Ω
Ω
Ω
Table 6. Electrical characteristics: dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
g
fs
(1)
Forward
transconductance V
DS
= 13 V I
D
= 3.5 A 2 5 S
C
oss
Output capacitance V
DS
= 13 V f = 1 MHz V
in
= 0 250 500 pF
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
Table 7. Electrical characteristics: switching
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d
(on)
t
r
t
d
(off)
t
f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 15 V I
d
= 3.5 A
V
gen
= 10 V R
gen
= 10 Ω
(see Figure 26)
50
60
130
50
150
180
300
200
ns
ns
ns
ns
t
d
(on)
t
r
t
d
(off)
t
f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 15 V I
d
= 3.5 A
V
gen
= 10 V R
gen
= 1000 Ω
(see Figure 26)
140
0.4
2.5
1
500
1.1
7
4
ns
µs
µs
µs
(di/dt)on Turn-on current slope V
DD
= 15 V I
D
= 3.5 A
V
in
= 10 V R
gen
= 10 Ω50 A/µs
Q
i
Total input charge V
DD
= 12 V I
D
= 3.5 A V
in
= 10 V 18 nC
Table 8. Electrical characteristics: source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
SD
(1)
Forward on voltage I
SD
= 3.5 A V
in
= 0 1.7 V
t
rr
(2)
Q
rr
(2)
I
RRM (2)
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 3.5 A di/dt
= 100 A/µs
V
DD
= 30 V T
j
= 25 °C
(see test circuit, Figure 28)
40
0.2
3.6
ns
µC
A
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
2. Parameters guaranteed by design/characterization
Electrical specification VND7N04, VND7N04-1, VNK7N04FM
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Table 9. Electrical characteristics: protection
Symbol Parameter Test conditions Min. Typ. Max. Unit
Ilim Drain current limit Vin = 10 V VDS = 13 V
Vin = 5 V VDS = 13 V 4
47
711
11 A
A
tdlim (1) Step response
Current limit Vin = 10 V
Vin = 5 V 13
15 20
25 µs
µs
Tjsh (1) Overtemperature
shutdown 150 °C
Tjrs (1) Overtemperature reset 135 °C
Igf (1) Fault sink current Vin = 10 V VDS = 13 V
Vin = 5 V VDS = 13 V 50
20 mA
mA
Eas (1) Single pulse avalanche
energy starting Tj = 25°C VDD = 20 V
Vin = 10 V Rgen = 1 KΩ L = 30 mH 0.4 J
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
VND7N04, VND7N04-1, VNK7N04FM Protection features
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3 Protection features
During normal operation, the Input pin is electrically connected to the gate of the internal
power MOSFET. The device then behaves like a standard power MOSFET and can be used
as a switch from DC to 50 KHz. The only difference from the user’s standpoint is that a small
DC current (I
iss
) flows into the Input pin in order to supply the internal circuitry.
The device integrates:
●
Overvoltage clamp protection: internally set at 42 V, along with the rugged avalanche
characteristics of the Power MOSFET stage give this device unrivalled ruggedness and
energy handling capability. This feature is mainly important when driving inductive
loads.
●
Linear current limiter circuit: limits the drain current Id to Ilim whatever the Input pin
voltage. When the current limiter is active, the device operates in the linear region, so
power dissipation may exceed the capability of the heatsink. Both case and junction
temperatures increase, and if this phase lasts long enough, junction temperature may
reach the overtemperature threshold T
jsh
.
●
Overtemperature and short circuit protection: these are based on sensing the chip
temperature and are not dependent on the input voltage. The location of the sensing
element on the chip in the power stage area ensures fast, accurate detection of the
junction temperature. Overtemperature cutout occurs at minimum 150 °C. The device
is automatically restarted when the chip temperature falls below 135 °C.
●
Status feedback: in the case of an overtemperature fault condition, a Status Feedback
is provided through the Input pin. The internal protection circuit disconnects the input
from the gate and connects it instead to ground via an equivalent resistance of 100 Ω.
The failure can be detected by monitoring the voltage at the Input pin, which will be
close to ground potential.
Additional features of this device are ESD protection according to the Human Body model
and the ability to be driven from a TTL Logic circuit (with a small increase in R
DS(on)
).
Protection features VND7N04, VND7N04-1, VNK7N04FM
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Figure 2. Thermal impedance for DPAK /
IPAK Figure 3. Derating curve
Figure 4. Output characteristics Figure 5. Transconductance
Figure 6. Static drain-source on resistance
vs input voltage Figure 7. Static drain-source on resistance
(part 1/2)
VND7N04, VND7N04-1, VNK7N04FM Protection features
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Figure 8. Static drain-source on resistance
(part 2/2) Figure 9. Input charge vs input voltage
Figure 10. Capacitance variations Figure 11. Normalized input threshold voltage
vs temperature
Figure 12. Normalized on resistance vs
temperature (part 1/2) Figure 13. Normalized on resistance vs
temperature (part 2/2)
Protection features VND7N04, VND7N04-1, VNK7N04FM
10/17
Figure 14. Turn-on current slope(part 1/2) Figure 15. Turn-on current slope(part 2/2)
Figure 16. Turn-off drain-source voltage slope
(part 1/2) Figure 17. Turn-off drain-source voltage slope
(part 2/2)
Figure 18. Switching time resistive load (part
1/3) Figure 19. Switching time resistive load (part
2/3)
VND7N04, VND7N04-1, VNK7N04FM Protection features
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Figure 20. Switching time resistive load (part
3/3) Figure 21. Current limit vs junction
temperature
Figure 22. Step response current limit Figure 23. Source drain diode forward
characteristics
Protection features VND7N04, VND7N04-1, VNK7N04FM
12/17
Figure 24. Unclamped inductive load test
circuits Figure 25. Unclamped inductive waveforms
Figure 26. Switching times test circuits for
resistive load Figure 27. Input charge test circuit
Figure 28. Test circuit for inductive load
switching and diode recovery times Figure 29. Waveforms
VND7N04, VND7N04-1, VNK7N04FM Package information
13/17
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 30. TO-252 (DPAK) mechanical data
Package information VND7N04, VND7N04-1, VNK7N04FM
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Figure 31. TO-251 (IPAK) mechanical data
VND7N04, VND7N04-1, VNK7N04FM Package information
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Figure 32. SOT-82FM mechanical data
DocID4336 Rev 2 16/17
VND7N04, VND7N04-1, VNK7N04FM Revision history
17
5 Revision history
Table 10. Document revision history
Date Revision Changes
21-Jun-2004 1 Initial release.
25-Sep-2013 2 Updated Disclaimer
DocID4336 Rev 2 17/17
VND7N04, VND7N04-1, VNK7N04FM
17
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