MAC08BT1-D - ON Semiconductor

 Semiconductor Components Industries, LLC, 2000

May, 2000 – Rev. 3 1Publication Order Number:

MAC08BT1/D

MAC08BT1, MAC08MT1

Preferred Device

Sensitive Gate Triacs

Silicon Bidirectional Thyristors

Designed for use in solid state relays, MPU interface, TTL logic and

other light industrial or consumer applications. Supplied in surface

mount package for use in automated manufacturing.

•Sensitive Gate Trigger Current in Four Trigger Modes

•Blocking Voltage to 600 Volts

•Glass Passivated Surface for Reliability and Uniformity

•Surface Mount Package

•Device Marking: MAC08BT1: AC08B; MAC08MT1: A08M, and

Date Code

MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)

Rating Symbol Value Unit

Peak Repetitive Off–State Voltage(1)

(Sine W ave, 50 to 60 Hz, Gate Open,

TJ = 25 to 110°C) MAC08BT1

MAC08MT1

VDRM,

VRRM

200

600

Volts

On–State Current RMS (TC = 80°C)

(Full Sine Wave 50 to 60 Hz) IT(RMS) 0.8 Amps

Peak Non–repetitive Surge Current

(One Full Cycle Sine W ave, 60 Hz,

TC = 25°C)

ITSM 8.0 Amps

Circuit Fusing Considerations

(Pulse Width = 8.3 ms) I2t 0.4 A2s

Peak Gate Power

(TC = 80°C, Pulse Width

1.0 µs) PGM 5.0 Watts

Average Gate Power

(TC = 80°C, t = 8.3 ms) PG(AV) 0.1 Watt

Operating Junction Temperature Range TJ–40 to

+110 °C

Storage Temperature Range Tstg –40 to

+150 °C

(1) VDRM and VRRM for all types can be applied on a continuous basis. Blocking

voltages shall not be tested with a constant current source such that the

voltage ratings of the devices are exceeded.

TRIAC

0.8 AMPERE RMS

200 thru 600 VOLTS

Preferred devices are recommended choices for future use

and best overall value.

Device Package Shipping

ORDERING INFORMATION

MAC08BT1 SOT223 16mm Tape and Reel

(1K/Reel)

MAC08MT1 SOT223

http://onsemi.com

16mm Tape and Reel

(1K/Reel)

MT1

MT2

SOT–223

CASE 318E

STYLE 11

123

PIN ASSIGNMENT

3 Gate

Main Terminal 1

Main Terminal 2

4Main Terminal 2

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THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Thermal Resistance, Junction to Ambient

PCB Mounted per Figure 1 RθJA 156 °C/W

Thermal Resistance, Junction to Tab

Measured on MT2 Tab Adjacent to Epoxy RθJT 25 °C/W

Maximum Device Temperature for Soldering Purposes

(for 10 Seconds Maximum) TL260 °C

ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted; Electricals apply in both directions)

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Peak Repetitive Blocking Current

(VD = Rated VDRM, VRRM; Gate Open) TJ = 25°C

TJ = 110°C

IDRM,

IRRM —

——

—10

200 µA

µA

ON CHARACTERISTICS

Peak On–State Voltage(1)

(IT =

1.1 A Peak) VTM — — 1.9 Volts

Gate T rigger Current (Continuous dc) All Quadrants

(VD = 12 Vdc, RL = 100 Ω)IGT — — 10 mA

Holding Current (Continuous dc)

(VD = 12 Vdc, Gate Open, Initiating Current =

20 mA) IH— — 5.0 mA

Gate T rigger Voltage (Continuous dc) All Quadrants

(VD = 12 Vdc, RL = 100 Ω)VGT — — 2.0 Volts

DYNAMIC CHARACTERISTICS

Critical Rate of Rise of Commutation Voltage

(f = 250 Hz, ITM = 1.0 A, Commutating di/dt = 1.5 A/mS

On–State Current Duration = 2.0 mS, VDRM = 200 V,

Gate Unenergized, TC = 110°C,

Gate Source Resistance = 150 Ω, See Figure 10)

(dv/dt)c1.5 — — V/µs

Critical Rate–of–Rise of Off State Voltage

(Vpk = Rated VDRM, TC= 110°C, Gate Open, Exponential Method) dv/dt 10 — — V/µs

(1) Pulse Test: Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%.

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+ Current

+ Voltage

VTM

Symbol Parameter

VDRM Peak Repetitive Forward Off State Voltage

IDRM Peak Forward Blocking Current

VRRM Peak Repetitive Reverse Off State Voltage

IRRM Peak Reverse Blocking Current

Voltage Current Characteristic of Triacs

(Bidirectional Device)

IDRM at VDRM

on state

off state

IRRM at VRRM

Quadrant 1

MainTerminal 2 +

Quadrant 3

MainTerminal 2 – VTM

VTM Maximum On State Voltage

IHHolding Current

MT1

(+) IGT

GATE

(+) MT2

REF

MT1

(–) IGT

GATE

(+) MT2

REF

MT1

(+) IGT

GATE

(–) MT2

REF

MT1

(–) IGT

GATE

(–) MT2

REF

–

MT2 NEGATIVE

(Negative Half Cycle)

MT2 POSITIVE

(Positive Half Cycle)

Quadrant III Quadrant IV

Quadrant II Quadrant I

Quadrant Definitions for a Triac

IGT – + IGT

All polarities are referenced to MT1.

With in–phase signals (using standard AC lines) quadrants I and III are used.

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Figure 1. PCB for Thermal Impedance and

Power Testing of SOT-223

0.079

2.0

0.079

2.0

0.059

1.5

0.091

2.3

0.091

2.3

inches

0.472

12.0

0.096

2.44

BOARD MOUNTED VERTICALLY IN CINCH 8840 EDGE CONNECTOR.

BOARD THICKNESS = 65 MIL., FOIL THICKNESS = 2.5 MIL.

MATERIAL: G10 FIBERGLASS BASE EPOXY

0.984

25.0

0.244

6.2

0.059

1.5

0.059

1.5

0.096

2.44 0.096

2.44

0.059

1.5 0.059

1.5

0.15

3.8

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TA, MAXIMUM ALLOW ABLEAMBIENT TEMPERATURE ( C)°

110

100

IT(RMS), RMS ON-STATE CURRENT (AMPS)

110

100

TA, MAXIMUM ALLOW ABLEAMBIENT TEMPERATURE ( C)°

Figure 2. On-State Characteristics Figure 3. Junction to Ambient Thermal

Resistance versus Copper Tab Area

Figure 4. Current Derating, Minimum Pad Size

Reference: Ambient Temperature Figure 5. Current Derating, 1.0 cm Square Pad

Reference: Ambient Temperature

FOIL AREA (cm2)

θJA, JUNCTION TO AMBIENT THERMAL

vT, INST ANTANEOUS ON-STATE VOLTAGE (VOLTS)

IT, INSTANTANEOUS ON-STATE CURRENT (AMPS)

IT(RMS), RMS ON-STATE CURRENT (AMPS)

Figure 6. Current Derating, 2.0 cm Square Pad

Reference: Ambient Temperature

1.0

0.1

0.01 5.04.03.02.0 30

160

2.00

110

0.5

0.30.20.10 IT(RMS), RMS ON-STATE CURRENT (AMPS) 0.70.60.50.40.30.20.10

0.50.40.30.20.10

1.00 4.0 6.0 8.0 10

100

0.6 0.7 0.8

RESISTANCE, C/W°

150

140

130

120

110

100

TYPICAL

MAXIMUM

123

MINIMUM

FOOTPRINT = 0.076 cm2

DEVICE MOUNTED ON

FIGURE 1 AREA = L2

PCB WITH TAB AREA

AS SHOWN

0.4

TA, MAXIMUM ALLOWABLE

AMBIENT TEMPERATURE ( C)°

30°60°90°

α = 180°

30°

MINIMUM FOOTPRINT

50 OR 60 Hz

120°

T(tab), MAXIMUM ALLOWABLE

TAB TEMPERATURE ( C)°

110

105

100

IT(RMS), ON-ST ATE CURRENT (AMPS)

Figure 7. Current Derating

Reference: MT2 Tab

0.50.40.30.20.10 0.6 0.7 0.8

120°

30°

120°

90°

120°

90°

60°

30°

90°

TYPICAL AT TJ = 110°C

MAX AT TJ = 110°C

MAX AT TJ = 25°C

60°

α = 180°

1.0 cm2 FOIL AREA

50 OR 60 Hz

α = 180°α = 180°

REFERENCE:

FIGURE 1

60°

α = CONDUCTION

ANGLE

4.0 cm2 FOIL AREA

α = CONDUCTION

ANGLE

α = CONDUCTION

ANGLE

α = CONDUCTION

ANGLE

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COMMUTATING dv/dt

dv/dt , (V/ S)

cµ

Figure 8. Power Dissipation

P(AV), MAXIMUM AVERAGE

POWER DISSIPA TION (W ATTS)

1.0

0.8

0.7

0.5

0.4

0.2

IT(RMS), RMS ON-STATE CURRENT (AMPS)

Figure 9. Thermal Response, Device

Mounted on Figure 1 Printed Circuit Board

0.50.40.30.20.10 0.6 0.7 0.8

dc 90°

120°

1.0

di/dtc, RATE OF CHANGE OF COMMUTATING CURRENT (A/mS)

t, TIME (SECONDS)

r(t), TRANSIENT THERMAL

0.01

1.0

0.0010.0001

1.0

0.01 0.1 10 100

RESIST ANCE (NORMALIZED)

0.1

1.0

TJ, JUNCTION TEMPERATURE (°C)

90807060 100 110

VDRM = 200 V

400 Hz

300 Hz

0.9

0.6

0.3

0.1

1.0

110°

VDRM

ITM

60 Hz

30°

f = 1

2 tw

COMMUTATING dv/dt

dv/dt , (V/ S)

cµ

60°

80°180 Hz

α = 180°60°

(di

dt)c

6f ITM

1000

100°

α = CONDUCTION

ANGLE

Figure 10. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Voltage (dv/dt)c

LL1N4007

200 V

MEASURE

–

CHARGE

CONTROL

CHARGE TRIGGER

NON-POLAR

MT2

MT1

1N914

TRIGGER CONTROL

200 VRMS

ADJUST FOR

ITM, 60 Hz VAC

Note: Component values are for verification of rated (dv/dt)c. See AN1048 for additional information.

ADJUST FOR

dv/dt(c)

Figure 11. Typical Commutating dv/dt versus

Current Crossing Rate and Junction Temperature Figure 12. Typical Commutating dv/dt versus

Junction Temperature at 0.8 Amps RMS

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STATIC dv/dt (V/ s)

RG, GATE – MAIN TERMINAL 1 RESIST ANCE (OHMS)

Figure 13. Exponential Static dv/dt versus

Gate – Main Terminal 1 Resistance

10 10,000

Figure 14. Typical Gate Trigger Current Variation

TJ, JUNCTION TEMPERATURE (°C)

0.1

0– 40 20 100

1.0

V , GATE TRIGGER VOLT AGE (VOLTS)

1.1

0.3

TJ, JUNCTION TEMPERATURE (°C)

–40

600 Vpk

TJ = 110°C

IGT4

IGT1

1000100

IGT3

IGT2

GT, GATE TRIGGER CURRENT (mA)

–20 40 60 80

0 20 100–20 406080

VGT2 VGT1

VGT3 VGT4

MAIN TERMINAL #2

POSITIVE

MAIN TERMINAL #1

POSITIVE

HOLDING CURRENT (mA)

6.0

TJ, JUNCTION TEMPERATURE (°C)

Figure 15. Typical Holding Current Variation

–40

5.0

4.0

3.0

2.0

1.0

I ,

0 20 100–20 40 60 80

MAIN TERMINAL #2

POSITIVE

MAIN TERMINAL #1

POSITIVE

Figure 16. Gate Trigger Voltage Variation

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INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the

total design. The footprint for the semiconductor packages

must be the correct size to insure proper solder connection

interface between the board and the package. With the

correct pad geometry, the packages will self align when

subjected to a solder reflow process.

SOT-223

0.079

2.0

0.15

3.8

0.248

6.3

0.079

2.0

0.059

1.5 0.059

1.5

0.091

2.3

0.091

2.3

inches

SOT-223 POWER DISSIPATION

The power dissipation of the SOT-223 is a function of the

MT2 pad size. This can vary from the minimum pad size for

soldering to a pad size given for maximum power

dissipation. Power dissipation for a surface mount device is

determined by TJ(max), the maximum rated junction

temperature of the die, RθJA, the thermal resistance from

the device junction to ambient, and the operating

temperature, TA. Using the values provided on the data

sheet for the SOT-223 package, PD can be calculated as

follows:

PD = TJ(max) – TA

RθJA

The values for the equation are found in the maximum

ratings table on the data sheet. Substituting these values

into the equation for an ambient temperature TA of 25°C,

one can calculate the power dissipation of the device which

in this case is 550 milliwatts.

PD = 110°C – 25°C= 550 milliwatts

156°C/W

The 156°C/W for the SOT-223 package assumes the use

of the recommended footprint on a glass epoxy printed

circuit board to achieve a power dissipation of 550

milliwatts. There are other alternatives to achieving higher

power dissipation from the SOT-223 package. One is to

increase the area of the MT2 pad. By increasing the area of

the MT2 pad, the power dissipation can be increased.

Although one can almost double the power dissipation with

this method, one will be giving up area on the printed

circuit board which can defeat the purpose of using surface

mount technology . A graph of RθJA versus MT2 pad area is

shown in Figure 3.

Another alternative would be to use a ceramic substrate

or an aluminum core board such as Thermal Clad. Using

a board material such as Thermal Clad, an aluminum core

board, the power dissipation can be doubled using the same

footprint.

SOLDER STENCIL GUIDELINES

Prior to placing surface mount components onto a printed

circuit board, solder paste must be applied to the pads. A

solder stencil is required to screen the optimum amount of

solder paste onto the footprint. The stencil is made of brass

or stainless steel with a typical thickness of 0.008 inches.

The stencil opening size for the SOT-223 package should

be the same as the pad size on the printed circuit board, i.e.,

a 1:1 registration.

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SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the rated

temperature of the device. When the entire device is heated

to a high temperature, failure to complete soldering within

a short time could result in device failure. Therefore, the

following items should always be observed in order to

minimize the thermal stress to which the devices are

subjected.

•Always preheat the device.

•The delta temperature between the preheat and

soldering should be 100°C or less.*

•When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum

temperature ratings as shown on the data sheet. When

using infrared heating with the reflow soldering

method, the difference should be a maximum of 10 °C.

•The soldering temperature and time should not exceed

260°C for more than 10 seconds.

•When shifting from preheating to soldering, the

maximum temperature gradient should be 5°C or less.

•After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.

Gradual cooling should be used as the use of forced

cooling will increase the temperature gradient and

result in latent failure due to mechanical stress.

•Mechanical stress or shock should not be applied

during cooling.

* Soldering a device without preheating can cause

excessive thermal shock and stress which can result in

damage to the device.

TYPICAL SOLDER HEATING PROFILE

For any given circuit board, there will be a group of

control settings that will give the desired heat pattern. The

operator must set temperatures for several heating zones,

and a figure for belt speed. Taken together, these control

settings make up a heating “profile” for that particular

circuit board. On machines controlled by a computer, the

computer remembers these profiles from one operating

session to the next. Figure 17 shows a typical heating

profile for use when soldering a surface mount device to a

printed circuit board. This profile will vary among

soldering systems but it is a good starting point. Factors that

can affect the profile include the type of soldering system in

use, density and types of components on the board, type of

solder used, and the type of board or substrate material

being used. This profile shows temperature versus time.

The line on the graph shows the actual temperature that

might be experienced on the surface of a test board at or

near a central solder joint. The two profiles are based on a

high density and a low density board. The Vitronics

SMD310 convection/infrared reflow soldering system was

used to generate this profile. The type of solder used was

62/36/2 Tin Lead Silver with a melting point between

177–189°C. When this type of furnace is used for solder

reflow work, the circuit boards and solder joints tend to

heat first. The components on the board are then heated by

conduction. The circuit board, because it has a large surface

area, absorbs the thermal energy more efficiently, then

distributes this energy to the components. Because of this

effect, the main body of a component may be up to 30

degrees cooler than the adjacent solder joints.

STEP 1

PREHEAT

ZONE 1

“RAMP”

STEP 2

VENT

“SOAK”

STEP 3

HEATING

ZONES 2 & 5

“RAMP”

STEP 4

HEATING

ZONES 3 & 6

“SOAK”

STEP 5

HEATING

ZONES 4 & 7

“SPIKE”

STEP 6

VENT STEP 7

COOLING

200°C

150°C

100°C

50°C

TIME (3 TO 7 MINUTES TOTAL) TMAX

SOLDER IS LIQUID FOR

40 TO 80 SECONDS

(DEPENDING ON

MASS OF ASSEMBLY)

205° TO

219°C

PEAK AT

SOLDER

JOINT

DESIRED CUR VE FOR LOW

MASS ASSEMBLIES

DESIRED CUR VE FOR HIGH

MASS ASSEMBLIES

100°C

150°C160°C

170°C

140°C

Figure 17. Typical Solder Heating Profile

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PACKAGE DIMENSIONS

SOT–223

CASE 318E–04

ISSUE J

STYLE 11:

PIN 1. MT 1

2. MT 2

3. GATE

4. MT 2

123

0.08 (0003) C

DIM

AMIN MAX MIN MAX

MILLIMETERS

0.249 0.263 6.30 6.70

INCHES

B0.130 0.145 3.30 3.70

C0.060 0.068 1.50 1.75

D0.024 0.035 0.60 0.89

F0.115 0.126 2.90 3.20

G0.087 0.094 2.20 2.40

H0.0008 0.0040 0.020 0.100

J0.009 0.014 0.24 0.35

K0.060 0.078 1.50 2.00

L0.033 0.041 0.85 1.05

M0 10 0 10

S0.264 0.287 6.70 7.30

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

____

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Notes

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without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular

purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,

including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “T ypicals” must be

validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.

SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or

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alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Af firmative Action Employer.

PUBLICATION ORDERING INFORMATION

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4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031

Phone: 81–3–5740–2745

Email: r14525@onsemi.com

ON Semiconductor Website : http://onsemi.com

For additional information, please contact your local

Sales Representative.

MAC08BT1/D

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Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada

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