FQD19N10L / FQU19N10L January 2009 QFET (R) FQD19N10L / FQU19N10L 100V LOGIC N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as high efficiency switching DC/DC converters, and DC motor control. * * * * * * * 15.6A, 100V, RDS(on) = 0.1 @VGS = 10 V Low gate charge ( typical 14 nC) Low Crss ( typical 35 pF) Fast switching 100% avalanche tested Improved dv/dt capability RoHS Compliant D ! D " ! " " " G! G S I-PAK D-PAK FQD Series G D S FQU Series ! S Absolute Maximum Ratings Symbol VDSS ID TC = 25C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25C) Drain Current FQD19N10L / FQU19N10L 100 - Continuous (TC = 100C) IDM Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy IAR EAR dv/dt PD - Pulsed (Note 1) TL 15.6 A 9.8 A 62.4 A 20 V (Note 2) 220 mJ Avalanche Current (Note 1) 15.6 A Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25C) * (Note 1) 5.0 6.0 2.5 mJ V/ns W 50 0.4 -55 to +150 W W/C C 300 C (Note 3) Power Dissipation (TC = 25C) TJ, TSTG Units V - Derate above 25C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RJC Parameter Thermal Resistance, Junction-to-Case Typ -- Max 2.5 Units C/W RJA RJA Thermal Resistance, Junction-to-Ambient * -- 50 C/W Thermal Resistance, Junction-to-Ambient -- 110 C/W * When mounted on the minimum pad size recommended (PCB Mount) (c)2009 Fairchild Semiconductor Corporation Rev. A1. January 2009 Symbol TC = 25C unless otherwise noted Parameter Test Conditions Min Typ Max Units 100 -- -- V -- 0.09 -- V/C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 A BVDSS / TJ Breakdown Voltage Temperature Coefficient ID = 250 A, Referenced to 25C VDS = 100 V, VGS = 0 V -- -- 1 A VDS = 80 V, TC = 125C -- -- 10 A Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA Gate Threshold Voltage VDS = VGS, ID = 250 A 1.0 -- 2.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 7.8 A VGS = 5 V, ID = 7.8 A -- 0.074 0.082 0.10 0.11 gFS Forward Transconductance VDS = 30 V, ID = 7.8 A -- 14 -- S -- 670 870 pF -- 160 210 pF -- 35 45 pF IDSS IGSSF IGSSR Zero Gate Voltage Drain Current On Characteristics VGS(th) (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 50 V, ID = 19 A, RG = 25 (Note 4, 5) VDS = 80 V, ID = 19 A, VGS = 5 V (Note 4, 5) -- 14 38 ns -- 410 830 ns -- 20 50 ns -- 140 290 ns -- 14 18 nC -- 2.9 -- nC -- 9.2 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 15.6 A ISM -- -- 62.4 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 15.6 A Drain-Source Diode Forward Voltage -- -- 1.5 V trr Reverse Recovery Time -- 80 -- ns Qrr Reverse Recovery Charge -- 0.195 -- C VGS = 0 V, IS = 19 A, dIF / dt = 100 A/s (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 1.35mH, IAS = 15.6A, VDD = 25V, RG = 25 , Starting TJ = 25C 3. ISD 19A, di/dt 300A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300s, Duty cycle 2% 5. Essentially independent of operating temperature (c)2009 Fairchild Semiconductor Corporation Rev. A1. January 2009 FQD19N10L / FQU19N10L Electrical Characteristics VGS 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V 1 10 1 ID , Drain Current [A] ID, Drain Current [A] Top : 10 150 25 0 10 -55 Notes : 1. VDS = 30V 2. 250s Pulse Test Notes : 1. 250s Pulse Test 2. TC = 25 0 10 -1 -1 0 10 10 1 10 0 10 2 4 6 8 10 VGS , Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.30 0.24 IDR , Reverse Drain Current [A] RDS(ON) [ ], Drain-Source On-Resistance VGS = 5V 0.18 VGS = 10V 0.12 0.06 1 10 0 10 150 25 Notes : 1. VGS = 0V 2. 250s Pulse Test Note : TJ = 25 -1 0.00 0 15 30 45 60 75 10 0.2 0.4 0.6 ID, Drain Current [A] 0.8 1.0 1.2 1.4 1.6 1.8 VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 12 1800 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 1500 10 Ciss 900 Coss 600 Notes : 1. VGS = 0 V 2. f = 1 MHz Crss 300 VGS, Gate-Source Voltage [V] VDS = 50V 1200 Capacitance [pF] FQD19N10L / FQU19N10L Typical Characteristics 8 VDS = 80V 6 4 2 Note : ID = 19A 0 -1 10 0 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics (c)2009 Fairchild Semiconductor Corporation 0 5 10 15 20 25 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A1. January 2009 FQD19N10L / FQU19N10L Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 Notes : 1. VGS = 0 V 2. ID = 250 A 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 Notes : 1. VGS = 10 V 2. ID = 7.8 A 0.5 0.0 -100 200 -50 0 o 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 16 Operation in This Area is Limited by R DS(on) ID, Drain Current [A] 100 s 12 10 s ID, Drain Current [A] 2 10 1 ms 1 10 10 ms DC 0 10 Notes : 8 4 o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse -1 10 0 1 10 0 25 2 10 10 50 150 N o te s : 1 . Z J C ( t ) = 2 . 5 /W M a x . 2 . D u ty F a c t o r , D = t 1 /t 2 3 . T J M - T C = P D M * Z J C( t ) 0 .2 0 .0 5 -1 0 .0 2 0 .0 1 PDM t1 s in g le p u ls e t2 Z 10 125 Figure 10. Maximum Drain Current vs. Case Temperature 0 .1 10 100 D = 0 .5 0 JC ( t) , T h e r m a l R e s p o n s e Figure 9. Maximum Safe Operating Area 10 75 TC, Case Temperature [] VDS, Drain-Source Voltage [V] -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve (c)2009 Fairchild Semiconductor Corporation Rev. A1. January 2009 FQD19N10L / FQU19N10L Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50K Qg 200nF 12V 5V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG VGS DUT 5V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp (c)2009 Fairchild Semiconductor Corporation ID (t) VDS (t) VDD tp Time Rev. A1. January 2009 FQD19N10L / FQU19N10L Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD * dv/dt controlled by RG * ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop (c)2009 Fairchild Semiconductor Corporation Rev. A1. January 2009 FQD19N10L / FQU19N10L Package Dimensions TO-252 (DPAK) (FS PKG Code 36) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: millimeters Part Weight per unit (gram): 0.33 (c)2009 Fairchild Semiconductor Corporation Rev. A1. January 2009 (Continued) IPAK 2.30 0.20 6.60 0.20 5.34 0.20 0.76 0.10 2.30TYP [2.300.20] (c)2009 Fairchild Semiconductor Corporation 16.10 0.30 6.10 0.20 0.70 0.20 0.50 0.10 9.30 0.30 0.80 0.10 MAX0.96 (0.50) 1.80 0.20 (4.34) 0.60 0.20 (0.50) 2.30TYP [2.300.20] 0.50 0.10 Rev. A1. January 2009 FQD19N10L / FQU19N10L Package Dimensions TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I37 (c)2009 Fairchild Semiconductor Corporation Rev. A1. January 2009