SDAS277 − JANUARY 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
•3-State Buffer-Type Outputs Drive Bus
Lines Directly
•Bus-Structured Pinout
•Inverting-Logic Outputs
•Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N) and
Ceramic (J) 300-mil DIPs, and Ceramic Flat
(W) Packages
description
These octal D-type transparent latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, outputs
(Q) respond to the data (D) inputs. When LE is low,
the outputs are latched to retain the data that was
set up.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low) or a high-impedance state. In
the high-impedance state, the outputs neither load
nor drive the bus lines significantly. The
high-impedance state and the increased drive
provide the capability to drive bus lines without
interface or pullup components.
OE does not affect internal operations of the latches. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
The SN54ALS580B is characterized for operation over the full military temperature range of −55°C to 125°C.
The SN74ALS580B and SN74AS580 are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
OE LE D
OUTPUT
Q
L H H L
LHL H
LLX Q0
H X X Z
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
SN54ALS580B ...J OR W PACKAGE
SN74ALS580B, SN74AS580 . . . DW OR N PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
SN54ALS580B...FK PACKAGE
(TOP VIEW)
2D
1D
OE
8Q
7Q 1Q
8D
G
ND
LE VCC
!"# $ %&'# "$ (&)*%"# +"#',
+&%#$ %! # $('%%"#$ (' #-' #'!$ '."$ $#&!'#$
$#"+"+ /""#0, +&%# (%'$$1 +'$ # '%'$$"*0 %*&+'
#'$#1 "** (""!'#'$,
SDAS277 − JANUARY 1995
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
logic symbol†logic diagram (positive logic)
OE
1D
2
1D 3
2D 4
3D 5
4D 6
5D
11
LE
19
18
17
16
15
14
13
12
7
6D 8
7D 9
8D
EN
1OE
LE
1D 1Q
1
11
219
To Seven Other Channels
C1
1D
C1
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
†This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage, VCC 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: SN54ALS580B −55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ALS580B 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS580B SN74ALS580B
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.7 0.8 V
IOH High-level output current −1 −2.6 mA
IOL Low-level output current 12 24 mA
twPulse duration, LE high 15 15 ns
tsu Setup time, data before LE↓20 10 ns
thHold time, data after LE↓12 10 ns
TAOperating free-air temperature −55 125 0 70 °C
SDAS277 − JANUARY 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54ALS580B SN74ALS580B
UNIT
PARAMETER
TEST CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
VIK VCC = 4.5 V, II = −18 mA −1.2 −1.2 V
VCC = 4.5 V to 5.5 V, IOH = −0.4 mA VCC −2 VCC −2
V
OH
VCC = 4.5 V
IOH = −1 mA 2.4 3.3 V
VOH
VCC = 4.5 V IOH = −2.6 mA 2.4 3.2
V
VOL
VCC = 4.5 V
IOL = 12 mA 0.25 0.4 0.25 0.4
V
VOL VCC = 4.5 V IOL = 24 mA 0.35 0.5 V
IOZH VCC = 5.5 V, VO = 2.7 V 20 20 µA
IOZL VCC = 5.5 V, VO = 0.4 V −20 −20 µA
IIVCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 20 µA
IIL VCC = 5.5 V, VI = 0.4 V −0.13 −0.1 mA
IO‡VCC = 5.5 V, VO = 2.25 V −20 −112 −30 −112 mA
Outputs high 10 17 10 17
I
CC
V
CC
= 5.5 V Outputs low 16 26 16 26 mA
ICC
VCC = 5.5 V
Outputs disabled 17 29 17 29
mA
†All typical values are at VCC = 5 V, TA = 25°C.
‡The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER FROM
(INPUT) TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX§UNIT
(INPUT)
(OUTPUT)
SN54ALS580B SN74ALS580B
MIN MAX MIN MAX
tPLH
D
Q
3 26 3 18
ns
tPHL DQ3 15 3 14 ns
tPLH
LE
Q
8 29 6 22
ns
tPHL LE Q4 22 6 21 ns
tPZH
OE
Q
4 25 3 18
ns
tPZL OE Q 4 21 4 18 ns
tPHZ
OE
Q
2 12 1 10
ns
tPLZ
OE
Q
3 22 1 15
ns
§For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
SDAS277 − JANUARY 1995
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: SN74AS580 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN74AS580
UNIT
MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 V
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
IOH High-level output current −15 mA
IOL Low-level output current 48 mA
tw*Pulse duration, LE high 2 ns
tsu*Setup time, data before LE↓2 ns
th*Hold time, data after LE↓3 ns
TAOperating free-air temperature 0 70 °C
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN74AS580
UNIT
PARAMETER
TEST CONDITIONS
MIN TYP‡MAX
UNIT
VIK VCC = 4.5 V, II = −18 mA −1.2 V
VOH
VCC = 4.5 V to 5.5 V, IOH = −2 mA VCC −2
V
VOH VCC = 4.5 V, IOH = −15 mA 2.4 3.3 V
VOL VCC = 4.5 V, IOL = 48 mA 0.33 0.5 V
IOZH VCC = 5.5 V, VO = 2.7 V 50 µA
IOZL VCC = 5.5 V, VO = 0.4 V −50 µA
IIVCC = 5.5 V, VI = 7 V 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 µA
IIL VCC = 5.5 V, VI = 0.4 V −0.5 mA
IO§VCC = 5.5 V, VO = 2.25 V −30 −112 mA
Outputs high 62 100
I
CC
V
CC
= 5.5 V Outputs low 65 106 mA
ICC
VCC = 5.5 V
Outputs disabled 71 115
mA
‡All typical values are at VCC = 5 V, TA = 25°C.
§The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
SDAS277 − JANUARY 1995
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
switching characteristics (see Figure 1)
PARAMETER FROM
(INPUT) TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX†UNIT
(INPUT)
(OUTPUT)
SN74AS580
MIN MAX
tPLH
D
Q
3 7.5
ns
tPHL DQ3 7 ns
tPLH
LE
Q
5 9
ns
tPHL LE Q4 8 ns
tPZH
OE
Q
2 6.5
ns
tPZL OE Q 4 9.5 ns
tPHZ
OE
Q
2 6.5
ns
tPLZ
OE
Q
2 7
ns
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
SDAS277 − JANUARY 1995
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
tPHZ
tPLZ
tPHL tPLH
0.3 V
tPZL
tPZH
tPLH tPHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
From Output
Under Test Test
Point
R1
S1
CL
(see Note A)
7 V
1.3 V
1.3 V1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
1.3 V 1.3 V 3.5 V
3.5 V
0.3 V
0.3 V
High-Level
Pulse
Low-Level
Pulse
tw
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note C)
1.3 V 1.3 V
1.3 V1.3 V
1.3 V 1.3 V
1.3 V1.3 V
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
VOL
VOH
VOH
VOL
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B) [0 V
VOH
VOL
[3.5 V
In-Phase
Output
0.3 V
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
R2
VCC
RL
Test
Point
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
From Output
Under Test Test
Point
CL
(see Note A) RL
RL = R1 = R2
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
84012022A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 84012022A
SNJ54ALS
580BFK
8401202RA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 8401202RA
SNJ54ALS580BJ
8401202SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 8401202SA
SNJ54ALS580BW
SN54ALS580BJ ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54ALS580BJ
SN74ALS580BDWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS580B
SN74ALS580BDWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS580B
SN74ALS580BDWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS580B
SN74ALS580BN ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74ALS580BN
SN74ALS580BN3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70
SN74ALS580BNE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74ALS580BN
SN74ALS580BNSR ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS580B
SN74ALS580BNSRE4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS580B
SN74ALS580BNSRG4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS580B
SN74AS580DW OBSOLETE SOIC DW 20 TBD Call TI Call TI 0 to 70
SN74AS580DWR OBSOLETE SOIC DW 20 TBD Call TI Call TI 0 to 70
SN74AS580N OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70
SNJ54ALS580BFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 84012022A
SNJ54ALS
580BFK
SNJ54ALS580BJ ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 8401202RA
SNJ54ALS580BJ
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SNJ54ALS580BW ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 8401202SA
SNJ54ALS580BW
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54ALS580B, SN74ALS580B :
•Catalog: SN74ALS580B
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74ALS580BDWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74ALS580BNSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74ALS580BDWR SOIC DW 20 2000 367.0 367.0 45.0
SN74ALS580BNSR SO NS 20 2000 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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