FDMS003N08C N-Channel Shielded Gate PowerTrench® MOSFET
Semiconductor Components Industries, LLC, 2017 Publication Order Number:
May, 2017, Rev. 1.0 FDMS003N08C/D
1
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FDMS003N08C
N-Channel Shielded Gate PowerTrench® MOSFET
80 V, 147 A, 3.1 mΩ
Features
Shielded Gate MOSFET Technology
Max rDS(on) = 3.1 mΩ at VGS = 10 V, ID = 56 A
Max rDS(on) = 8.1 mΩ at VGS = 6 V, ID = 28 A
50% lower Qrr than other MOSFET suppliers
Lowers switching noise/EMI
MSL1 robust package design
100% UIL tested
RoHS Compliant
General Description
This N-Channel MV MOSFET is produced using ON
Semiconductor’s advanced PowerTrench® process that
incorporates Shielded Gate technology. This process has been
optimized to minimise on-state resistance and yet maintain
superior switching performance with best in class soft body
diode.
Applications
Primary DC-DC MOSFET
Synchronous Rectifier in DC-DC and AC-DC
Motor Drive
Solar
Bottom
Power 56
Top
Pin 1
G
SSS
D
DDD
D
D
D
D
S
S
S
G
Pin 1
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Ratings Units
VDS Drain to Source Voltage 80 V
VGS Gate to Source Voltage ±20 V
ID
Drain Current -Continuous TC = 25 °C (Note 5) 147
A
-Continuous TC = 100 °C (Note 5) 92
-Continuous TA = 25 °C (Note 1a) 22
-Pulsed (Note 4) 658
EAS Single Pulse Avalanche Energy (Note 3) 486 mJ
PD
Power Dissipation TC = 25 °C 125 W
Power Dissipation TA = 25 °C (Note 1a) 2.7
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C
RθJC Thermal Resistance, Junction to Case 1 °C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 45
Device Marking Device Package Reel Size Tape Width Quantity
FDMS003N08C FDMS003N08C Power 56 13 ’’ 12 mm 3000 units
FDMS003N08C N-Channel Shielded Gate PowerTrench® MOSFET
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2
Electrical Characteristics TJ = 25 °C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min Typ Max Units
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 80 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250 μA, referenced to 25 °C 60 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 64 V, VGS = 0 V 1 μA
IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V 100 nA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 310 μA 2.0 2.9 4.0 V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient ID = 310 μA, referenced to 25 °C -8.2 mV/°C
rDS(on) Static Drain to Source On Resistance
VGS = 10 V, ID = 56 A 2.6 3.1
mΩVGS = 6 V, ID = 28 A 3.8 8.1
VGS = 10 V, ID = 56 A, TJ = 125 °C 4.3 5.2
gFS Forward Transconductance VDS = 5 V, ID = 56 A 123 S
Ciss Input Capacitance VDS = 40 V, VGS = 0 V,
f = 1 MHz
3820 5350 pF
Coss Output Capacitance 1335 1870 pF
Crss Reverse Transfer Capacitance 44 80 pF
RgGate Resistance 0.1 0.6 1.3 Ω
td(on) Turn-On Delay Time
VDD = 40 V, ID = 56 A,
VGS = 10 V, RGEN = 6 Ω
20 36 ns
trRise Time 816ns
td(off) Turn-Off Delay Time 40 64 ns
tfFall Time 12 23 ns
QgTotal Gate Charge VGS = 0 V to 10 V
VDD = 40 V,
ID = 56 A
52 73 nC
QgTotal Gate Charge VGS = 0 V to 6 V 33 46 nC
Qgs Gate to Source Charge 17 nC
Qgd Gate to Drain “Miller” Charge 10 nC
Qoss Output Charge VDD = 40 V, VGS = 0 V 77 nC
Qsync Total Gate Charge Sync VDS = 0 V, ID = 56 A 44 nC
VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 2.2 A (Note 2) 0.7 1.2 V
VGS = 0 V, IS = 56 A (Note 2) 0.8 1.3
trr Reverse Recovery Time IF = 28 A, di/dt = 300 A/μs28 45 ns
Qrr Reverse Recovery Charge 53 84 nC
trr Reverse Recovery Time IF = 28 A, di/dt = 1000 A/μs23 36 ns
Qrr Reverse Recovery Charge 121 194 nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθCA is determined by the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 486 mJ is based on starting TJ = 25 °C; N-ch: L = 3 mH, IAS = 18 A, VDD = 80 V, VGS =10 V. 100% test at L = 0.1 mH, IAS = 57 A.
4. Pulsed Id please refer to Fig 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
G
DF
DS
SF
SS
G
DF
DS
SF
SS
a. 45 °C/W when mounted on a
1 in2 pad of 2 oz copper.
b. 115 °C/W when mounted on a
minimum pad of 2 oz copper.
FDMS003N08C N-Channel Shielded Gate PowerTrench® MOSFET
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3
Typical Characteristics TJ = 25 °C unless otherwise noted.
Figure 1.
012345
0
50
100
150
200
250
300
VGS = 5 V
VGS = 6 V
VGS = 10 V
VGS = 7 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 5.5 V
VGS = 8 V
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
On Region Characteristics Figure 2.
0 50 100 150 200 250 300
0
1
2
3
4
5
VGS = 10 V
VGS = 8 V
VGS = 5 V
VGS = 6 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 7 V
VGS = 5.5 V
N o r m a l i z e d O n - R e s i s t a n c e
vs. Drain Current and Gate Voltage
F i g u r e 3 . N o r m a l i z e d O n R e s i s t a n c e
-75 -50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
ID = 56 A
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
TJ, JUNCTION TEMPERATURE (oC)
vs. Junction Temperature
Figure 4.
45678910
0
5
10
15
20
TJ = 125 oC
ID = 56 A
TJ = 25 oC
VGS, GATE TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
SOURCE ON-RESISTANCE (mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
O n- Re si st an ce vs . Ga t e to
Source Voltage
Figure 5. Transfer Characteristics
234567
0
50
100
150
200
250
300
TJ = 150 oC
VDS = 5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
ID, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6.
0.00.20.40.60.81.01.2
0.001
0.01
0.1
1
10
100
300
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
IS, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
S ou rc e t o D ra in D i o de
Forward Voltage vs. Source Current
FDMS003N08C N-Channel Shielded Gate PowerTrench® MOSFET
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4
Figure 7.
0 102030405060
0
2
4
6
8
10
ID = 56 A
VDD = 50 V
VDD = 40 V
VGS, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = 30 V
Gate Charge Characteristics Figure 8.
0.1 1 10 80
1
10
100
1000
10000
f = 1 MHz
VGS = 0 V
CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
C a p a c i t a n c e v s . D r a i n
to Source Voltage
Figure 9.
0.001 0.01 0.1 1 10 100 1000
1
10
100
TJ = 125 oC
TJ = 25 oC
TJ = 100 oC
tAV, TIME IN AVALANCHE (ms)
IAS, AVALANCHE CURRENT (A)
U n c l a m p e d I n d u c t i v e
Switching Capability
Figure 10.
25 50 75 100 125 150
0
30
60
90
120
150
VGS = 6 V
RθJC = 1.0 oC/W
VGS = 10 V
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
M a x i m u m C o n t i n u o u s D r a i n
Current vs. Case Temperature
Figure 11.
0.1 1 10 100 500
0.1
1
10
100
1000
CURVE BENT TO
MEASURED DATA
10 μs
100 ms/DC
10 ms
1 ms
100 μs
ID, DRAIN CURRENT (A)
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJC = 1.0 oC/W
TC = 25 oC
Forward Bias S a f e
Operating Area
F i g u r e 1 2 . S i n g l e P u l s e M a xi m u m
Power Dissipation
10-5 10-4 10-3 10-2 10-1 1
10
100
1000
10000
100000
SINGLE PULSE
RθJC = 1.0 oC/W
TC = 25 oC
P(PK), PEAK TRANSIENT POWER (W)
t, PULSE WIDTH (sec)
Typical Characteristics TJ = 25 °C unless otherwise noted.
FDMS003N08C N-Channel Shielded Gate PowerTrench® MOSFET
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5
Figure 13.
10-5 10-4 10-3 10-2 10-1 1
0.001
0.01
0.1
1
2
SINGLE PULSE
DUTY CYCLE-DESCENDING ORDER
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0.2
0.1
0.05
0.02
0.01
NOTES:
ZθJC(t) = r(t) x RθJC
RθJC = 1.0 oC/W
Duty Cycle, D = t1 / t2
Peak TJ = PDM x ZθJC(t) + TC
PDM
t1
t2
Junction-to-Case Transient Thermal Response Curve
Typical Characteristics TJ = 25 °C unless otherwise noted.
FDMS003N08C N-Channel Shielded Gate PowerTrench® MOSFET
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6
Dimensional Outline and Pad Layout
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