RT9361A/B
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DS9361A/B-13 April 2011 www.richtek.com
Pin Configurations
Ordering Information
General Description
The RT9361A/B is a high performance charge pump
DC/DC converter that produces a regulated 4.5V and 5V
output. No external inductor is required for operation. The
operating voltage range is 2.8V to VOUT. Internal soft-start
circuitry effectively reduces the in-rush current both while
start-up and mode change.
The RT9361A/B features very low quiescent current, over
current protection and short circuit protection.
The RT9361A/B is available in WDFN-6L 2x2, SOT-23-6
and TSOT-23-6 package.
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
Tiny Package, High Performance, Regulated Charge Pump
Features
zz
zz
zInput Voltage Range : 2.8V to VOUT
zz
zz
zInternal Soft Start Function
zz
zz
z5V/4.5V Fixed Output Voltage
zz
zz
zOver Current Protection Function
zz
zz
zShort Circuit Protection Function
zz
zz
zRoHS Compliant and 100% Lead (Pb)-Free
Applications
zMobile phone, Smart Phone LED Backlight
zCamera Flash White LED
zLCD Display Supply
(TOP VIEW)
SOT-23-6/TSOT-23-6
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
CP
VIN
VOUT
GND
ENCN
5
4
1
2
3
6
7
WDFN-6L 2x2
VOUT GND EN
CP VIN CN
4
23
56
RT9361A/B
Package Type
E : SOT-23-6
J6 : TSOT-23-6
QW : WDFN-6L 2x2 (W-Type)
Output Voltage
A : 5V
B : 4.5V
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
RT9361A/B
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DS9361A/B-13 April 2011www.richtek.com
Function Block Diagram
Part No. Application Configuration CIN (μF) CPUMP (μF) COUT (μF)
RT9361A IOUT < 6 0mA @ V IN > 3.2V, 1 or 2.2 0.22 1 or 2.2
IOUT < 110mA @ VIN > 3.2V, 10 1 10
RT9361B IOUT < 8 0mA @ V IN > 3.2V, 1 or 2.2 0. 22 1 or 2.2
IOUT < 1 50mA @ V IN > 3. 2V, 10 1 10
Typical Application Circuit
RRR
VIN
EN GND
VOUT
CN
CPUMP
CP
VIN
2.8V to VOUT
3
COUT
+
5
CIN
LED LED LED
RT9361A/B
1
2
4
6
Functional Pin Description
Pin Number Pin Name Pin Function
T/SOT-23-6 WDFN-6L 2x2
1 6 VOU T Output Voltage
2 5,
Exposed Pad (7) GND Ground. The exposed pad must be soldered to a large PCB and
connected to GND for maximum pow er dissipation.
3 4 EN Chip Enable (Active High)
4 3 CN Flying Capacitor Negative Terminal
5 2 VIN Power Input Voltage
6 1 CP Flying Capa citor Po sitive Termi nal
+
-VREF
Load
Disconnect
CP CN
VOUT
VIN
EN
GND
Short
Circuit
Protection
1MHz
OSC
Current
Bias
Voltage
Reference
RT9361A/B
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DS9361A/B-13 April 2011 www.richtek.com
Electrical Characteristics
(VIN = 3.7V, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Operation Voltage Range VIN V
OUT = 5V 2.8 --
VOUT V
RT9361A , VIN>3.2V, IOUT<110mA 4.8 5 5.2 V
Output Voltage VOUT RT9361B , VIN>3.2V ,IOUT<150mA 4.32 4.5 4.68 V
Quiescent Current IQ IOUT = 0, -- 2 4 mA
RT9361A , VIN>3.2V, CPUMP = 1μF 110 -- --
Maximum Output Current IOUT RT9361B , VIN>3.2V, CPUMP = 1μF 150 -- -- mA
OCP IOCP 250 350 500 mA
Short Circuit Current -- 60 90 mA
Output Ripple IOUT = 60mA, COUT = 2.2μF -- 30 -- mV
Shut Down Current ISHDN V
IN = 4.5V, VEN<0.4V -- 0.1 1 μA
Operation Frequency FOSC 0.8 1 1.3 MHz
Digital Input High Level VIH 1.5 -- -- V
Digital Input Low Level VIL -- -- 0.4 V
Absolute Maximum Ratings (Note 1)
zSupply Input Voltage ------------------------------------------------------------------------------------------------------ −0.3V to 6V
zOther I/O Pin Voltages --------------------------------------------------------------------------------------------------- −0.3V to 6V
zPower Dissipation, PD @ TA = 25°C
T/SOT-23-6 ------------------------------------------------------------------------------------------------------------------ 0.4W
WDFN-6L 2x2 -------------------------------------------------------------------------------------------------------------- 0.606W
zPackage Thermal Resistance (Note 2)
T/SOT-23-6, θJA ------------------------------------------------------------------------------------------------------------ 250°C/W
WDFN-6L 2x2, θJA --------------------------------------------------------------------------------------------------------- 265°C/W
zJunction Temperature ----------------------------------------------------------------------------------------------------- 150°C
zLead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C
zStorage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C
zESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V
Recommended Operating Conditions (Note 4)
zAmbient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
zJunction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
RT9361A/B
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DS9361A/B-13 April 2011www.richtek.com
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on the single layer low effective thermal conductivity test board
of JEDEC 51-3 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
RT9361A/B
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DS9361A/B-13 April 2011 www.richtek.com
Typical Operating Characteristics
Output Voltage vs. Output Current
4.4
4.5
4.6
4.7
4.8
4.9
5
5.1
10 20 30 40 50 60 70 80
Output Current (mA)
Output Voltage (V)
VIN = 3.2V
VIN = 3.7V
VIN = 4.3V
VIN = 5V
Operation Frequency vs. Temperature
0.8
0.9
1
1.1
1.2
1.3
1.4
-40-30-20-100 1020304050607080
Temperature
Operation Frequency (MHz)
IOUT = 60mA
IOUT = 0mA
(°C)
Output Voltage vs. Temperature
5.03
5.035
5.04
5.045
5.05
5.055
5.06
5.065
5.07
5.075
5.08
-40-30-20-10 0 1020304050607080
Temperature
Output Voltage (V)
IOUT = 60mA
IOUT = 0mA
(°C)
(For RT9361A, CIN = COUT = 2.2μF, CPUMP = 0.22μF, T A = 25°C, unless otherwise specified )
Quiescent Current vs. Input Voltage
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5
Input Voltage (V)
Quiescent Current (mA)
TA = 85°C
TA = 25°C
TA = -40°C
TA = -20°C
Output Voltage vs. Input Voltage
4.8
4.84
4.88
4.92
4.96
5
5.04
5.08
2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5
Input Voltage (V)
Output Voltage (V)
TA = 85°C
TA = 25°C
TA = -40°C
IOUT = 60mA
Output Voltage vs. Input Voltage
4.5
4.6
4.7
4.8
4.9
5
5.1
2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5
Input Voltage (V)
Output Voltage (V)
IOUT = 10mA
IOUT = 20mA
IOUT = 30mA
IOUT = 40mA
IOUT = 50mA
IOUT = 60mA
IOUT = 70mA
IOUT = 80mA
RT9361A/B
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DS9361A/B-13 April 2011www.richtek.com
VIL vs. Input Voltage
0.8
0.9
1
1.1
1.2
1.3
1.4
2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5
Input Voltage (V)
VIL (V)
VIH vs. Input Voltage
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5
Input Voltage (V)
VIH
(V)
Inrush Current
Time (40μs/Div)
VIN
EN
IIN
(2V/Div)
(2V/Div)
(2V/Div)
(500mA/Div)
VIN = 5V, IOUT = 60mA
VOUT
Inrush Current
Time (40μs/Div)
VIN
EN
IIN
VOUT
(2V/Div)
(2V/Div)
(2V/Div)
(500mA/Div)
VIN = 2.8V, IOUT = 60mA
TA = 85°C
TA = 25°C
TA = -40°C
TA = 85°C
TA = 25°C
TA = -40°C
Efficiency vs. Output Curent
0.4
0.45
0.5
0.55
0.6
0.65
0.7
0.75
0.8
0.85
10 15 20 25 30 35 40 45 50 55 60
Output Curent (mA)
Efficiency (%)
VIN = 3V
VIN = 4.2V
VIN = 3.4V
85
80
75
70
65
60
55
50
45
40
Efficiency vs. Input Voltage
0.4
0.5
0.6
0.7
0.8
0.9
1
2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5
Input Voltage (V)
Efficiency (%)
IOUT = 10mA
IOUT = 20mA
IOUT = 30mA
IOUT = 40mA
IOUT = 50mA
IOUT = 60mA
100
90
80
70
60
50
40
RT9361A/B
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DS9361A/B-13 April 2011 www.richtek.com
Normal Operation
Time (400ns/Div)
VIN
VOUT
IOUT
CN
(1V/Div)
(2V/Div)
(2V/Div)
(50mA/Div)
VIN = 2.8V, IOU T = 60mA
VIN
VOUT
IOUT
CN
Normal Operation
Time (400ns/Div)
(2V/Div)
(2V/Div)
(2V/Div)
(50mA/Div)
VIN = 5V, IOUT = 60mA
Dimming Operation
Time (10ms/Div)
VOUT
VIN
IIN
PWM
(2V/Div)
(2V/Div)
(50mA/Div) VIN = 3.7V
(2V/Div)
Refer to Application Informatiom “Figure 1”
Dimming Operation
Time (40μs/Div)
VOUT
VIN
IIN
PWM
(2V/Div)
(2V/Div)
(2V/Div)
(50mA/Div) VIN = 3.7V
Refer to Application Informatiom “Figure 1”
Maximum Output Current vs. Input Voltage
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
150
160
2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5
Input Voltage (V)
Maximum Output Current (mA)
TA = -40°C
TA = -20°C
TA = 25°C
TA = 85°C
RT9361A/B
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DS9361A/B-13 April 2011www.richtek.com
Application Information
Capacitor Selection
Careful selection of the three external capacitors CIN, COUT
and CPUMP is very important because they will affect ramp-
up time, output ripple and transient performance. Optimum
performance will be obtained when low ESR (<100mΩ)
ceramic capacitors are used for CIN and COUT and CPUMP.
In general, low ESR may be defined as less than 100mΩ.
In all cases, X7R or X5R dielectric are recommended. For
particular application, low ESR Tantalum capacitors may
be substituted; however optimum output ripple performance
may not be realized. Aluminum electrolytic capacitors are
not recommended for using with the RT9361A/B due the
their inherent high ESR characteristic.
In general, lower values for CIN, COUT and CPUMP may be
utilized for light load current applications (<60mA). Drawing
a load current of 60mA or less may use a CIN and COUT
capacitor value as low as 2.2μF and a CPUMP value of
0.22μF. C IN and COUT may range from 1μF for light loads
to 10μF for heavy output load conditions (<110mA). CPUMP
may range from 0.22μF for light loads to 1μF for heavy
output load conditions. If CPUMP is increased, COUT should
also be increased by the same ratio to minimize output
ripple. As a basic rule, the ratio between CIN, COUT and
CPUMP should be approximately 10 to 1. Lowering the CIN,
COUT and CPUMP value can decrease the ramp-up time of
VOUT, but it will increase the output ripple oppositely.
Figure 1. Application Circuits for Backlight Dimming
Figure 2. Application Circuits for Flash LEDs
Figure 3. Application Circuits for Constant Load
Figure 4. Application Circuits for Doubling the Output
Current
RR
R
VIN
EN GND
VOUT
CN
CPUMP
CP
VIN
COUT
+
CIN
LED LED LED
RT9361A/B
2.2µF
0.22µF
2.2µF
VOUT
4.5V/150mA
VIN
EN GND
VOUT
CN
CPUMP
CP
VIN COUT
+
CIN
RT9361A/B
10µF
1µF
10µF
1µF
L
1µH
VOUT
5V/110mA
VIN
EN GND
VOUT
CN
CPUMP
CP
VIN
3.3V
COUT
+
CIN
RT9361A/B
10µF
0.22µF
10µF
VOUT
5V/180mA
VIN
EN GND
VOUT
CN
CPUMP
CP
RT9361A/B
0.22µF
RR
R
VIN
EN GND
VOUT
CN
CPUMP
CP
VIN
COUT
+
CIN
LED LED LED
RT9361A/B
100 100 100
20mA 20mA 20mA
2.2µF
0.22µF
2.2µF
RT9361A/B
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DS9361A/B-13 April 2011 www.richtek.com
PCB Board Layout
The RT9361A/B is a high-frequency switched-capacitor
converter, and therefore large transient currents will flow
in VIN and VOUT. For best performance and to minimize
ripple, place all of the components as close to IC as
possible. Besides a solid ground plane is recommended
on the bottom layer of the PCB. The ground of CIN and
COUT should be connected together and as close to the IC
as possible. Figure 6 and Figure 7 shows the typical PCB
layout of RT9361A/B EVB board.
Thermal Considerations
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
PD(MAX) = ( TJ(MAX) - TA ) / θJA
Where TJ(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and
the θJA is the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT9361, where TJ(MAX) is the maximum junction
temperature of the die (125°C) and TA is the operated
ambient temperature. The junction to ambient thermal
resistance θJA for T/SOT-23-6 is 250°C/W and WDFN-6L
2x2 is 165°C/W on the standard JEDEC 51-3 single layer
thermal test board. The maximum power dissipation at
TA = 25°C can be calculated by following formula :
PD(MAX) = (125°C − 25°C) / 250°C/W = 0.4W for
T/SOT-23-6 packages
PD(MAX) = (125°C − 25°C) / 165°C/W = 0.606W for
WDFN-6L 2x2 packages
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA. For RT9361 packages, the Figure 5 of de-
rating curves allows the designer to see the effect of rising
ambient temperature on the maximum power allowed.
Mode) Operating Pump Charge 2(100
2V
V
100
2IV
IV
100
P
P
(%) Efficiency
IN
OUT
OUTIN
OUT
T
OU
IN
OUT
×−−−×=
×
×
×
=×=
Efficiency
The efficiency of the charge pump regulator varies with
the output voltage version, the applied input voltage, the
load current, and the internal operation mode of the device.
The approximate efficiency is given by :
For a charge pump with an output of 5 volts and a nominal
input of 3 volts, the theoretical efficiency is 83.33%. Due
to internal switching losses and IC quiescent current
consumption, the actual efficiency can be measured as
82.72%.
Figure 6
Figure 7
Figure 5. Derating Curves for RT9361 Packages
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0 25 50 75 100 125
Ambient Temperature (°C)
Power Dissipation (W)
Single Layer PCB
WDFN-6L 2x2
T/SOT-23-6
RT9361A/B
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DS9361A/B-13 April 2011www.richtek.com
AA1
e
b
B
D
C
H
L
SOT-23-6 Surface Mount Package
Dimensions In Millimeters Dimensions In Inches
Symbol Min Max Min Max
A 0.889 1.295 0.031 0.051
A1 0.000 0.152 0.000 0.006
B 1.397 1.803 0.055 0.071
b 0.250 0.560 0.010 0.022
C 2.591 2.997 0.102 0.118
D 2.692 3.099 0.106 0.122
e 0.838 1.041 0.033 0.041
H 0.080 0.254 0.003 0.010
L 0.300 0.610 0.012 0.024
Outline Dimension
RT9361A/B
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DS9361A/B-13 April 2011 www.richtek.com
TSOT-23-6 Surface Mount Package
Dimensions In Millimeters Dimensions In Inches
Symbol Min Max Min Max
A 0.700 1.000 0.028 0.039
A1 0.000 0.100 0.000 0.004
B 1.397 1.803 0.055 0.071
b 0.300 0.559 0.012 0.022
C 2.591 3.000 0.102 0.118
D 2.692 3.099 0.106 0.122
e 0.838 1.041 0.033 0.041
H 0.080 0.254 0.003 0.010
L 0.300 0.610 0.012 0.024
AA1
e
b
B
D
C
H
L
RT9361A/B
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DS9361A/B-13 April 2011www.richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Dimensions In Millimeters Dimensions In Inches
Symbol Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250
0.007 0.010
b 0.200 0.350 0.008 0.014
D 1.950 2.050 0.077 0.081
D2 1.000 1.450 0.039 0.057
E 1.950 2.050 0.077 0.081
E2 0.500 0.850 0.020 0.033
e 0.650 0.026
L 0.300 0.400
0.012 0.016
W-Type 6L DFN 2x2 Package
D
1
E
A3
A
A1
eb
L
D2
E2
SEE DETAIL A
11
2
2
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
DETAIL A
Pin #1 ID and Tie Bar Mark Options
