NTE5351
Silicon Controlled Rectifier (SCR)
for High Speed Switching
Features:
DFast Turn–Off Time
DHigh di/dt and dv/dt Capabilities
DShorted–Emitter Gate–Cathode Construction
DCenter Gate Construction
Non–Repetitive Peak Reverse Voltage (Gate Open, Note 1), VRSOM 700V. . . . . . . . . . . . . . . . . . . . .
Non–Repetitive Peak Off–State Voltage (Gate Open, Note 1), VDSOM 700V. . . . . . . . . . . . . . . . . . . .
Repetitive Peak Reverse Voltage (Gate Open, Note 1), VRROM 600V. . . . . . . . . . . . . . . . . . . . . . . . . .
Repetitive Peak Off–State Voltage (Gate Open, Note 1), VDROM 600V. . . . . . . . . . . . . . . . . . . . . . . . .
RMS On–State Current (TC = +60°C, 180° conduction angle), IT(RMS) 5.0A. . . . . . . . . . . . . . . . . . . .
Average On–State Current (TC = +60°C, 180° conduction angle), IT(AV) 3.2A. . . . . . . . . . . . . . . . . .
Peak Surge (Non–Repetitive) On–State Current, ITSM
(TC = +60°C, for one full cycle at applied voltage)
60Hz (Sinusoidal) 80A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
50Hz (Sinusoidal) 65A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Rate of Change of On–State Current (VD = 600V, IGT = 50mA, t = 1 to 8.3ms), di/dt 200A/µs. . . . .
Fusing Current (TJ = –40° to +100°C, t = 1 to 8.3ms), I2t 25A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak Forward Gate Power Dissipation (10µs Max, Note 2), PGM 3W. . . . . . . . . . . . . . . . . . . . . . . . .
Peak Reverse Gate Power Dissipation (10µs Max, Note 2), PRGM 3W. . . . . . . . . . . . . . . . . . . . . . . .
Average Gate Power Dissipation (10µs Max, Note 2), PG(AV) 0.5W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Case Temperature Range, TC–40° to +100°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature Range, Tstg –40° to +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance, Junction–to–Case, RthJC 8°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance, Junction–to–Ambient, RthJA 40°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (During Soldering, 1/32” from seating plane, 10sec max), TL+225°C. . . . . . . . .
Note 1. These values do not apply if there is a positive gate signal. Gate must be negatively biased.
Note 2. A n y pr oduct of gate c urr ent a nd g ate v oltage w hic h r esults i n a g ate p ower l ess t han t he m axim um
is permitted .