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© Andigilog, Inc. 2006 www.andigilog.com October 2006 - 70A05011
LOW-OLTAGE 1-WIRE DIGITAL TEMPERATURE SENSOR
aSC7521
A
V
PRODUCT SPECIFICATION
Product Description
The aSC7521A is a high-precision CMOS temperature sensor
and voltage monitor with Simple Serial Transport (SST)
compatible serial digital interface, intended for use in PC
hardware monitor applications.
Communication of device capabilities and temperature
readings takes place over the high-speed bi-directional SST
interface.
The SST temperature sensor provides a means for an analog
signal to travel over a digital bus enabling remote temperature
sensing in areas previously not monitored in the PC. The
temperature sensor supports an internal and external thermal
diode.
Sensor localization is aided by two address pins that
distinguish multiple sensors on the same bus.
The aSC7521A is available in MSOP-8 surface mount
package.
Features
On-chip and remote temperature sensors
Accuracy:
o +/- 3°C over operational range
o Internal +/- 2°C over 40°C to 70°C
o Remote +/- 1°C over 50°C to 70°C
Operational Range: -40°C to 125°C
Temperature resolution: 0.125°C
1-wire SST serial interface
Negotiable SST signaling rate up to 2-Mbps
Temperature and errors reported over SST
Internally corrected for diode non-ideality and series
resistance
3-state address pins set one of 9 SST bus address
0x48 through 0x50
8-lead MSOP package
MSL-1 per JEDEC J-STD-020C
Pb-free Matte Sn leadfinish & RoHS Compliant
Packages
Pin Configuration
VDD 8 SST
1
7
GND
A
DD0
2
3
D+ GND
6
Applications
Desktop and Notebook Computers
Application Diagram
Ordering Information
Part Number Package Temp. Range and Operating
Voltage Marking Supplied In
aSC7521AM8 8-Lead MSOP -40°C to 125°C, 3.3V 521A
Ayww
2500 units Tape &
Reel
Ayww – Assembly site, year, workweek
4
D-
aSC7521A
ADD1
CPU
3.3V
aSC7521A
SST
Interface SST ADD0
1
3
4
5
ADD1
5
7
8
2, 6
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aSC7521A
Absolute Maximum Ratings1
Parameter Rating
Supply Voltage, VDD -0.3, +3.63V
Voltage on any Digital Input or Output3-0.3V to VDD +
0.3V
Input Current on any pin3±5mA
Package Input Current3±20mA
Relative Humidity (non-operating) 5% - 85% RH
@ 25°C to 70°C
Maximum Junction Temperature, TJmax 150°C
Storage Temperature Range -60°C to +150°
C
IR Reflow Peak Temperature 260°C
Lead Soldering Temperature (10 sec.) 300°C
Human Body Model 2000 V
Machine Model 250 V
ESD5
Charged-Device Model >1000 V
Notes:
1. Absolute maximum ratings are limits beyond which operation
may cause permanent damage to the device. These are
stress ratings only; functional operation at or above these
limits is not implied. For guaranteed specifications and test
conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some
performance characteristics may degrade when the device is
not operated under the listed test conditions.
2. All voltages are measured with respect to GND, unless
otherwise specified.
3. When the input voltage (VIN) at any pin exceeds the power
supplies (VIN< (GND or GNDA) or VIN>V+, except for SST
and analog voltage inputs), the current at that pin should be
limited to 5mA. The 20mA maximum package input current
rating limits to number of pins that can safely exceed the
power supplies with an input current of 5mA to four.
4. The maximum power dissipation must be de-rated at elevated
temperatures and is dictated by TJmax, JA and the ambient
temperature, TA. The maximum allowable power dissipation at
any temperature is PD = (TJmax - TA) / JA. It must also take
into account self-heating that can adversely affect the
accuracy of internal sensors.
5. Human Body Model: 100pF capacitor discharged through a
1.5kΩ resistor into each pin. Machine Model: 200pF capacitor
discharged directly into each pin. Charged-Device Model is
per JESD22-C101C.
Electrical Characteristics6
(-40°CT+125°C, V = 3.3V unless otherwise noted. Specifications subject to change without notice)
ADD
Parameter Conditions Min Typ Max Units
Supply Voltage VDD 3.0 3.3 3.6 V
SST Signal Meets SST Specification Version 1.0
for 1.5V interface
-40°CTA+125°C ±3 °C
Local Sensor Accuracy7, 8
40°CTA70°C ±2 °C
Local Sensor Resolution 0.125 °C
0°CTA70°C,
-40°CTD +125°C ±3 °C
Remote Diode Sensor Accuracy7, 8, 9
0°CTA70°C,
50°CTD 70°C ±1 °C
Remote Diode Sensor Resolution 0.125 °C
Temperature Monitor Cycle Time10 tC 0.2 Sec
Notes:
6. These specifications are guaranteed only for the test conditions listed.
7. Accuracy (expressed in °C) = Difference between the aSC7521A reported temperature and the device temperature.
8. The aSC7521A can be read at any time without interrupting the temperature conversion process.
9. Calibration of the remote diode sensor input is set to meet the accuracy limits with a CPU thermal diode that has a non-ideality factor of
1.009 with a series resistance of 4.52.
10. Total monitoring cycle time for all temperature and analog input voltage measurements is 0.2 second.
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© Andigilog, Inc. 2006 www.andigilog.com October 2006 - 70A05011
aSC7521A
Pin Descriptions
Pin # Name Direction Description
1 VDD (3.3V) Supply Supply Voltage, 3.3V +/- 10%
2 GND Supply Ground
3 D+ Current Source Remote Diode Anode or Positive Lead
4 D- Current Sink Remote Diode Cathode or Negative Lead
5 ADD1 Input
Device Address Tri-State selector: Ground, Float or VDD select device
address
6 GND Supply Ground
7 ADD0 Input
Device Address Tri-State selector: Ground, Float or VDD select device
address
8 SST Input Digital Input / Output. SST Bi-directional Data Line.
Figure 1. Block Diagram
On-
Chip
Sensor
Control and SST Interface
ADC
Remote
Diode
Open / Short
ADD1ADD0 SST
D +
D -
On
-
Chip
T
emp
Remote
Temp
DIB Register
VDD VSS
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© Andigilog, Inc. 2006 www.andigilog.com October 2006 - 70A05011
aSC7521A
SST Sensors
The SST temperature sensor provides a means for an analog
signal to travel over a single-wire digital bus enabling remote
temperature sensing in areas previously not monitored in the
PC. The temperature sensor supports an internal temperature
sensor and external thermal diodes.
This section outlines general requirements for Simple Serial
Transport (SST) sensors intended for use in PC desktop
applications that conform to SST Version 1.0 specification.
The aSC7521A reports external temperature sensed by a
remote diode-connected transistor and an internal temperature
measurement.
Addressing
The aSC7521A complies with the address range set aside for
fixed-address, discoverable devices as defined in the SST
Specification Version 1.0. Simple Temperature sensors use
fixed addresses in the range of 0x48 to 0x50. The aSC7521A
may be programmed to any of these addresses via the
address select pins AD0 and AD1.
Frame Check Sequence (FCS)
Each message requires a frame check sequence byte to
ensure reliable data exchange between host and client. The
message originator and client both make an FCS calculation.
One FCS byte must be returned from the message target to
the originator after all bytes including the header and the data
block are written. If data is read from the target, a second FCS
byte must follow the data block read.
The FCS byte is the result of an 8-bit cyclic redundancy check
(CRC) of the each data block preceding the FCS up to the
most recent, earlier FCS byte. The first FCS in the message
does not include the two address timing negotiation ‘0’ bits that
precede the address byte or the message timing negotiation bit
after the address byte. The first FCS does include the address
byte in its computation. The FCS is initialized at 0x00 and is
calculated in a way that conforms to a CRC-8 represented by
the CRC polynomial, C(x) = x8 + x2 + x + 1.
Bus Voltage
All SST sensor devices used for PC applications must be
capable of operating the SST interface portion of the sensor
device at 1.5 volts as defined in 1.5 Volt Static (DC)
Characteristics section of the SST Version 1.0 specification.
Bus Timing
All SST sensor devices must be able to negotiate timing and
operate at a maximum bus transfer rate of 2-Mbps. If the bus
address timing is negotiated at a lower rate due to the
performance limitations of other devices on the bus, the sensor
device will operate at that lower rate.
Device Po wer-on Timing
Following a power-on reset, such as a system transitioning
from S3-S5 to S0, the aSC7521A will be able to participate in
the address and message timing negotiation and respond to
required SST bus commands such as respond to a GetDIB()
command within 10ms of the device’s VDD rail reaching 90%.
The aSC7521A has an internal power on reset and will be fully
functional within 50ms of power on.
The aSC7521A does not employ any device power
management.
Voltage and Temperature Sensor Data
Little Endian Format
The bit level transfer is defined in the SST specification. The 2-
byte data values are returned in little Endian format, in other
words, the LSB is sent first followed by MSB.
For multi-function devices that allow access to multiple
sensors, the data is returned LSB followed by the MSB for the
first sensor, LSB followed by the MSB for the second sensor,
and so on. The specific order is explicitly specified in the
command description.
Atomic Readings
The aSC7521A ensures that every value returned is derived
from a single analog to digital conversion and is not skewed
(e.g. the MSB and the LSB come from two different
conversions).
Conversion Time
The maximum refresh time for all temperature values is
200ms. The aSC7521A provides the logic to ensure all
readings meet the conversion time requirements.
Temperature Data
Data Precision, Accuracy and Resolution
The temperature data meets the following minimum
requirements:
Operational Range: -40°C to +125°C
Internal Sensor Accuracy:
o +/- 3°C over operational range
o +/- 2°C over 40°C to 70°C
Remote Sensor Accuracy (when TA is from 0°C to
70°C):
o +/- 3°C over operational range
o +/- 1°C over 50°C to 70°C
Resolution: 0.125°C
Temperature Data Format
The data format is capable of reporting temperature values in
the range of +/-512°C. The temperature sensor data is
returned as a 2’s complement 16-bit binary value. It represents
the number of 1/64°C increments in the actual reading. This
allows temperatures to be represented with approximately a
0.016°C resolution.
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aSC7521A
Values that would represent temperatures below -273.15°C (0
K or absolute zero) are reserved and are not be returned
except as specifically noted.
For the aSC7521A the required resolution is 0.125°C. Bits
[2:0] will be defined but they are beyond the required
resolution. The sign bit will indicate a negative temperature
except when reporting an error condition (see Sensor Error
Condition).
Temperature 2’s complement representation
80°C 0001 0100 0000 0000
79.875°C 0001 0011 1111 1000
1°C 0000 0000 0100 0000
0°C 0000 0000 0000 0000
-1°C 1111 1111 1100 0000
-5°C 1111 1110 1100 0000
Table 1. Temperature Representation
Sign Integer Temperature 0°C to 512°C
Fractional
Temperature
LSB 0.125°C
Always Zero
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Figure 2. Temperature Reading
A to D Converter Resolution and Mapping
The mapping of the A-D converter bit values is a two’s
complement representation with the binary point between bits
5 and 6 of the 16-bit data word. Bit 15 is the sign, bits 14
through 6 are integer temperature in degrees, bits 5 down to
3 are the fractional part with 0.125°C as the LSB. The lowest
3 bits are set to zero.
Temperature Inputs
The simple temperature sensor has an internal thermal
sensor plus an external sensor using a remote diode. Both
temperature readings are internally corrected for lead
resistance and non-ideality for the thermal diode of a
Pentium™ 4, 65nM process (1.009 non-ideality, 4.35 lead
resistance). The range of measurement currents falls within
the Intel recommended range of 10A and 170A to
minimize the impact of Beta variation in the CPU substrate
thermal diode. Note that Pentium 4, 90 nM process is 1.011
non-ideality and series resistance of 3.33.
If a diode connected discrete transistor is used instead of a
CPU diode, a correction must be applied to the reading to
compensate for the difference in non-ideality. A 2N3904 NPN
transistor has a non-ideality () factor of approximately 1.04.
To correct the value reported to the actual temperature use
the following formula:
TACTUAL = TREPORTED x Transistor / 1.009
It is recommended that the actual transistor type and
manufacturers chosen for the remote sensor be
characterized for non-ideality as part of system qualification.
Sensor Error Condition
The aSC7521A has the capability to detect and report open
or shorted external diode inputs per Sensor Error Condition.
When an error or failure condition is detected, the sensor
device must return a large negative value in response to
either the GetIntTemp() or GetExtTemp() command. In this
manner software is provided with a means to determine
whether or not the sensor is working normally and that the
data returned is good.
The aSC7521A will write one of the values from the table
below to appropriate memory locations for GetIntTemp()
and/or GetExtTemp().
The aSC7521A uses the OEM defined values of 0x8102
(open) and 0x8103 (short) rather than the generic errors
defined for codes 0x8000 to 0x8003.
Error Code Description
0x8000 to 0x80FF Reserved
0x8102 Remote Diode Open
0x8103 Remote Diode Short
0x8100-0x81FF Reserved
Table 2. Error Codes
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aSC7521A
SST Interface
Multi Client Mode
Sensors operate in multi-client mode for read bit timing. Reference the SST Specification Version 1.0 for details.
SST Device Commands
GetDIB() Command (0xF7)
Read the Device Identifier Block (DIB). The read length of the command is either 8 or 16 bytes. 8 bytes is the minimum number of
bytes populated by a fixed address discoverable client.
Write Data Length: 0x01
Read Data Length: 0x08/0x10
Command Code: 0xF7
Note: Un-shaded table entries are created by the host. Shaded entries are the response bytes from the aSC7521A to the host.
# Bits # Bits
Host Sending aSC7521A Sending
Hex Value Hex Value
8 8 8 8 8
Target Address Write Length Read Length GetDIB Cmd FCS
0x48 0x01 0x10 0xF7 0xDC
8 8 8 8 8
DIB Byte 1 DIB Byte 15 DIB Byte 16 FCS
(data) (data) (data) (data) (data dependent)
Figure 3. GetDIB() Command (16-byte read length)
8 8 8 8 8
Target Address Write Length Read Length GetDIB Cmd FCS
0x48 0x01 0x08 0xF7 0x23
8 8 8 8 8
DIB Byte 1 DIB Byte 7 DIB Byte 8 FCS
(data) (data) (data) (data) (data dependent)
Figure 4. GetDIB() Command (8-byte read length)
Ping() Command
The Ping() command provides a safe means for software to verify that a device is responding at a particular address.
Write Data Length: 0x00
Read Data Length: 0x00
Command Code: none
8 8 8 8
Target Address Write Length Read Length FCS
0x48 0x00 0x00 0xD7
Figure 5. Example of Ping()
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aSC7521A
ResetDevice() Command
The ResetDevice() command is used to reset all device functions to their power-on reset values. It is used by the system to recover
from serious hardware or bus errors.
Write Data Length: 0x01
Read Data Length: 0x00
Command Code: 0xF6
8 8 8 8 8
Target Address Write Length Read Length ResetDevice
Command FCS
0x48 0x01 0x00 0xF6 0x8C
Figure 6. ResetDevice() format ta rgeting a non-default address
8 8 8 8
Target Address Write Length Read Length ResetDevice
Command
0x00 0x01 0x00 0xF6
Figure 7. ResetDevice() format ta rgeting the default address
Sensor Command Summary
GetIntTemp()
Returns the temperature of the device’s internal thermal sensor.
Write Data Length: 0x01
Read Data Length: 0x02
Command Code: 0x00
Example bus transaction for a thermal sensor device located at address 0x48 returning a value of 60°C:
8 8 8 8
Target Address Write Length Read Length Command
0x48 0x01 0x02 0x00
8 8 8 8
FCS LSB MSB FCS
0x6A 0x00 0x0F 0x2D
Figure 8. Get Internal Temperature Command Example
GetExtTemp()
Returns the temperature of the external thermal diode.
Write Data Length: 0x01
Read Data Length: 0x02
Command Code: 0x01
GetAllTemps()
Returns a 4-byte block of data containing both the Internal and External temperatures in the following order Internal then External
temperatures.
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aSC7521A
Write Data Length: 0x01
Read Data Length: 0x04
Command Code: 0x00
Optional SST Device Commands
The optional SST commands Alert(), Suspend() are not supported in the aSC7521A.
Vendor Specific Extensions
The vendor specific command codes are in the range from 0xE0 and 0xE7. Reading and writing to specific internal registers is
provided for custom tuning of sensor response characteristics.
WriteReg()
Writes to the sensor’s internal registers.
Write Data Length: 2+N (command + address + Number of bytes to write)
Read Data Length: 0x00
Command Code: 0xE0
Example bus transaction to write to a sensor located at address 0x48. This example writes 2 consecutive locations (0x20 and 0x21)
to values 0x25 and 0x28.
8 8 8 8
Target Address Write Length Read Length Command
0x48 0x04 0x00 0xE0
8 8 8 8
RAM Addr Write Data Write Data FCS
0x20 0x25 0x28 0x1B
Figure 9. Example Register Write
ReadReg()
Reads from the sensor’s internal registers.
Write Data Length: 0x02 (command + address)
Read Data Length: N (Number of bytes to read)
Command Code: 0xE1
Example bus transaction to read a sensor located at address 0x48. This example reads 2 consecutive locations (0x20 and 0x21).
8 8 8 8
Target Address Write Length Read Length Command
0x48 0x02 0x02 0xE1
8 8 8 8
RAM Addr FCS Read Data Read Data FCS
0x20 0x9D 0x25 0x28 0x37
Figure 10. Example Register Read
VenCmdEnable()
Vendor Command Enable enables the Vendor Specified Extensions.
Write Data Length: 0x01
Read Data Length: 0x00
Command Code: 0xE2
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aSC7521A
8 8 8 8 8
Target Address Write Length Read Length Command FCS
0x48 0x01 0x00 0xE2 0xE0
Figure 11. Vendor Command Enable
VenCmdDisable()
Vendor Command Disable disables the Vendor Specified Extensions.
Write Data Length: 0x01
Read Data Length: 0x00
Command Code: 0xE3
8 8 8 8 8
Target Address Write Length Read Length Command FCS
0x48 0x01 0x00 0xE3 0xE7
Figure 12. Vendor Command Disable
Reserved or Unsupported Commands
Attempts to access the sensor using a reserved or unsupported command will not result in the device or bus failure. The sensor will
return a modified FCS when any of the following commands are received. To modify the FCS the sensor will invert all of the bits in
the correct FCS (1’s complement). A modified FCS is also called an Abort FCS.
The sensor will return an Abort FCS (modified FCS) for a reserved and unsupported command code (commands codes between
0xE4 to 0xF5 and 0xF8 to 0xFF).
The sensor will return an Abort FCS (modified FCS) for reserved commands (command codes 0x02 to 0xDF.
The sensor will return an Abort FCS (modified FCS) for unused vendor specific test and manufacturing command codes (command
codes 0xE8 to 0xEF). If any of these types of commands exist, they will be disabled during normal operation.
Malformed Commands
A malformed command is one which is valid but has an incorrect write or read length for the given command.
If a get temperature command with a write length not equal to 1 is sent, then the aSC7521A will send an Abort FCS and wait for a
new command. An Abort FCS will be formed by creating a 1’s complement of the the good FCS.
If a get temperature command and the read length is not equal to 2 or 4 then te aSC7521A will send an Abort FCS and wait for a
stop on the SST bus. See the Command Summary section for the expected Write and Read lengths of the legal commands.
There will be no checking for malformed WriteReg() and ReadReg() commands (Vendor Specific Extensions).
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aSC7521A
Command Summary
Hex Cmd Command Name Received Bytes Wr Len Rd Len Bytes Sent by Client
- Ping() 3(target,wr,rd) 0 0 FCS
0x00 GetIntTemp() 4(target,wr,rd,cmd) 1 2 FCS/2/FCS
0x01 GetExtTemp() 4(target,wr,rd,cmd) 1 2 FCS/2/FCS
0x00 GetAllTemps() 4(target,wr,rd,cmd) 1 4 FCS/4/FCS
0x02-0xDF Unsupported Abort FCS
0xE0 WriteReg() 4(target,wr,rd,cmd) 3+ 0 FCS
0xE1 ReadReg() 4(target,wr,rd,cmd) 2 1+ FCS/1+/FCS
0xE2 VenCmdEnable() 4(target,wr,rd,cmd) 1 0 FCS
0xE3 VenCmdDisable() 4(target,wr,rd,cmd) 1 0 FCS
0xE4-0xF5 Unsupported Abort FCS
0xF6 ResetDevice() 4(target,wr,rd,cmd) 1 0 FCS
0xF6 ResetDevice() 4(target,wr,rd,cmd) 1 0 None if default address (0x00)
0xF7 GetDIB() 4(target,wr,rd,cmd) 1 8 FCS/8/FCS
0xF7 GetDIB() 4(target,wr,rd,cmd) 1 16 FCS/16/FCS
0xF8-0xFF Unsupported Abort FCS
Table 3. Command Summary
Device Identifier Block (DIB)
The Device Identifier Block describes the identity and functions of a client device on the SST bus. Sixteen bytes are allocated for
this function as shown in Figure 13. Device Identifier Block is returned by the aSC7521A with a GetDIB() command. The aSC7521A
returned values are shown with the description of each field below.
8 8 16 16 8
Vendor ID Device ID
Device
Capabilities
Version/
Revision LSB MSB LSB MSB
Device
Interface
8 8 8 16 24 8
Function
Interface
Device
Interface
Extension
Reserved Reserved Vendor
Specific ID
Client
Device
Address
Figure 13. Device Identifier Block
Device Capabilities Field (1-byte)
MSB 6 5 4 3 2 1 LSB
Address
Type Reserved Wake
Capable
Alert
Support
Suspend
Support
Slow
Device
110 0 0 0 0 0
Figure 14. Device Capabilities Field
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aSC7521A
Version / Revision Field (1-byte)
MSB 6 5 4 3 2 1 LSB
Pre-
release SST Version Minor Revision
1 001 0000 (default) for V1.0 Pre-production
0 001 0000 for V1.0 Production
Figure 15. Version / Revision Field
Vendor ID Field (2-by tes)
Andigilog Vendor ID is 16 bits = 0x19C9 (This field is stored in the format LS Byte, MS Byte = 0xC919). Vendor IDs can be found
at: http://www.pcisig.com/membership/vid_search
Device ID Field (2-bytes)
This field uniquely identifies the device from a specific vendor. Place the least significant byte as the first byte and the most
significant byte as the second byte.
Part Number Value (MS,LS) Stored Value (LS,MS)
aSC7521A 0x7521 0x2175
Device Interface Field (1-byte)
The vendor sets to ‘1’, bit positions in this field in the event the device supports higher layer protocols that are industry specific using
Table 4.
Value = 0x02
Bit Protocol Meaning
7 - Reserved for future use , must be set = ‘0’
6 - Reserved for future use , must be set = ‘0’
5 IPMI Device supports additional access and capabilities per the IPMI specification.
4 ASF Device supports additional access and capabilities per the ASF specification.
3 Serial-ATA Device supports additional access and capabilities per the serial-ATA specification.
2 PCI-Express Device supports additional access and capabilities per the PCI Express
specification.
1 SST
Device supports additional access and capabilities per the SST Functional
Descriptor Specification (to be published at a future date).
0 OEM
Device supports vendor-specific additional access and capabilities per the Vendor
ID and Device ID.
Table 4. Device Interface Field
Function Interface Field (1-byte)
This field provides a mechanism for a device to pass higher-layer SST device-specific information.
Value = 0x00
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aSC7521A
Device Interface Extension Field (1-byte)
This field is used to provide additional information about the device to the upper layers of software.
Value = 0x00
Reserved Field (3-bytes)
Value = 0x00 0x00 0x00
Vendor Specific ID Field (1-byte)
This field is set by the vendor in a way that uniquely identifies this device apart from all others with an otherwise common DIB
content.
Value = 0x00 – For Fixed address devices this field may be set to zero.
Client Device Address (1-by te)
SST Client Device Address is set according to the connection of pins ADD0 and ADD1. Float is defined as an unconnected pin.
ADD0 ADD1 Address
Ground Ground 0x48
Float Ground 0x49
VDD Ground 0x4A
Ground Float 0x4B
Float Float 0x4C
VDD Float 0x4D
Ground VDD 0x4E
Float VDD 0x4F
VDD VDD 0x50
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aSC7521A
Applications Information
Remote Diodes
The aSC7521A is designed to work with a variety of remote
sensors in the form of a diode-connected transistor or the
substrate thermal diode of a CPU or graphics controller.
Actual diodes are not suited for these measurements.
There is some variation in the performance of these diodes,
described in terms of its departure from the ideal diode
equation. This factor is called diode non-ideality,
.nf
The equation relating diode temperature to a change in
thermal diode voltage with two driving currents is:
Δ
VBE = (nf)KT
qln(N)
where:
nf = Pentium 4, 65nM non-ideality factor, (nominal 1.009).
K
= Boltzman’s constant, (1.38 x 10-23).
T
= diode junction temperature in Kelvins.
q= electron charge (1.6 x 10-19 Coulombs).
N= ratio of the two driving currents (10).
The aSC7521A is designed and trimmed for an expected
value of 1.009, based on the typical value for the Pentium 4,
65nM. There is also a tolerance on the value provided. The
values for CPUs may have different nominal values and
tolerances. Consult the CPU or GPU manufacturer’s data
sheet for the factor.
nf
nf Table 5 gives a representative
sample of what one may expect in the range of non-ideality.
The trend with CPUs is for a lower value with a larger spread.
When thermal diode has a non-ideality factor other than
1.0046 the difference in temperature reading at a particular
temperature may be interpreted with the following equation:
=actual
reportedactual n
T T 009.1
where:
reported
T= reported temperature in temperature register.
actual
T= actual remote diode temperature.
actual
n= selected diode’s non-ideality factor, .
nf
Temperatures are in Kelvins or °C + 273.15.
This equation assumes that the series resistance of the
remote diode 4.52.
Although the temperature error caused by non-ideality
difference is directly proportional to the difference from 1.009,
but a small difference in non-ideality results in a relatively
large difference in temperature reading. For example, if there
were a ±1% tolerance in the non-Ideality of a diode it would
result in a ±2.7 degree difference (at 0°C) in the result (0.01 x
273.15).
This difference varies with temperature such that a fixed
offset value may only be used over a very narrow range.
Typical correction method required when measuring a wide
range of temperature values is to scale the temperature
reading in the host firmware.
Part nf Min nf Nom nf Max Series
Res
Pentium™ III
(CPUID 68h) 1.0057 1.008 1.0125
Pentium 4,
130nM 1.001 1.002 1.003 3.64
Pentium 4, 90nM 1.011 3.33
Pentium 4, 65nM 1.000 1.009 1.050 4.52
Intel Pentium M 1.0015 1.0022 1.0029 3.06
2N3904 1.003 1.0046 1.005 0.6
Table 5 Representative CPU Thermal Diode and
Transistor Non-Ideality Factors
CPU or ASIC Substrate Remote Dio des
A substrate diode is a parasitic PNP transistor that has its
collector tied to ground through the substrate and the base
(D-) and emitter (D+) brought out to pins. Connection to
these pins is shown in Figure 16 CPU Remote Diode
Connection. The non-ideality figures in Table 5
Representative CPU Thermal Diode and Transistor Non-
Ideality Factors include the effects of any package resistance
and represent the value seen from the CPU socket. The
temperature indicated will need to be compensated for the
departure from a non-ideality of 1.0046 and series resistance
of 0.6 .
Figure 16 CPU Remote Diode Connection
Discrete Remote Diodes
When sensing temperatures other than the CPU or GPU
substrate, an NPN or PNP transistor may be used. Most
commonly used are the 2N3904 and 2N3906. These have
characteristics similar to the CPU substrate diode with non-
ideality around 1.0046. They are connected with base to
collector shorted as shown in Figure 17 Discrete Remote
Diode Connection.
D+
D-
CPU aSC7521
Substrate
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© Andigilog, Inc. 2006 www.andigilog.com October 2006 - 70A05011
aSC7521A
While it is important to minimize the distance to the remote
diode to reduce high-frequency noise pickup, they may be
located many feet away with proper shielding. Shielded,
twisted-pair cable is recommended, with the shield
connected only at the aSC7521A end as close as possible to
the ground pin of the device.
Figure 17 Discrete Remote Diode Connection
As with the CPU substrate diode, the temperature reported
will be subject to the same errors due to non-ideality variation
and series resistance. However, the transistor’s die
temperature is usually not the temperature of interest and
care must be taken to minimize the thermal resistance and
physical distance between that temperature and the remote
diode. The offset and response time will need to be
characterized by the user.
Series Resistance
Any external series resistance in the connections from the
aSC7521A to the CPU pins should be accounted for in
interpreting the results of a measurement.
The impact of series resistance on the measured
temperature is a result of measurement currents developing
offset voltages that add to the diode voltage. This is relatively
constant with temperature and may be corrected with a fixed
value in the offset register. To determine the temperature
impact of resistance is as follows:
Ω°×=
°
×=Δ
Δ××=Δ
/675.0
/200
135
,
CR
CV A
R T
or
IT R T
SSR
DVSR
μ
μ
where:
Δ
TR= difference in the temperature reading from actual.
S
R= total series resistance of interconnect (both leads).
Δ
ID= difference in the two diode current levels (135µA).
V
T= scale of temperature vs. VBE (200µV/°C).
For example, a total series resistance of 10 would give an
offset of +6.75°C.
Board Layout Considerations
The distance between the remote sensor and the aSC7521A
should be minimized. All wiring should be defended from high
frequency noise sources and a balanced differential layout
maintained on D+ and D-.
Any noise, both common-mode and differential, induced in
the remote diode interconnect may result in an offset in the
temperature reported. Circuit board layout should follow the
recommendation of Figure 18. Basically, use 10-mil lines and
spaces with grounds on each side of the differential pair.
Choose the ground plane closest to the CPU when using the
CPU’s remote diode.
Figure 18 Recommended Remote Diode Circuit
Board Interconnect
Noise filtering is accomplished by using a bypass capacitor
placed as close as possible to the aSC7521A D+ and D-
pins. A 1.0nF ceramic capacitor is recommended, but up to
3.3nF may be used. Additional filtering takes place within the
aSC7521A.
It is recommended that the following guidelines be used to
minimize noise and achieve highest accuracy:
1. Place a 0.1µF bypass capacitor to digital ground as
close as possible to the power pin of the aSC7521A.
2. Match the trace routing of the D+ and D- leads and
use a 1.0nF filter capacitor close to the aSC7521A.
Use ground runs along side the pair to minimize
differential coupling as in Figure 18.
3. Place the aSC7521A as close to the CPU or GPU
remote diode leads as possible to minimize noise and
series resistance.
4. Avoid running diode connections close to or in parallel
with high-speed busses, staying at least 2cm away.
5. Avoid running diode connections close to on-board
switching power supply inductors.
6. PC board leakage should be minimized by maintaining
minimum trace spacing and covering traces over their
full length with solder mask.
Thermal Considerations
The temperature of the aSC7521A will be close to that of the
PC board on which it is mounted. Conduction through the
leads is the primary path for heat flow. The reported local
10 mils
D +
10 mils D -
GND
GND
D -
2N3904
D +
aSC7521A
2N3906
D +
aSC7521A
D -
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© Andigilog, Inc. 2006 www.andigilog.com October 2006 - 70A05011
aSC7521A
sensor is very close to the circuit board temperature and
typically between the board and ambient.
In order to measure PC board temperature in an area of
interest, such as the area around the CPU where voltage
regulator components generate significant heat, a remote
diode-connected transistor should be used. A surface-mount
SOT-23 or SOT-223 is recommended. The small size is
advantageous in minimizing response time because of its low
thermal mass, but at the same time it has low surface area
and a high thermal resistance to ambient air. A compromise
must be achieved between minimizing thermal mass and
increasing the surface area to lower the junction-to-ambient
thermal resistance.
In order to sense temperature of air-flows near board-
mounted heat sources, such as memory modules, the sensor
should be mounted above the PC board. A TO-92 packaged
transistor is recommended.
The power consumption of the aSC7521A is relatively low
and should have little self-heating effect on the local sensor
reading. At the highest measurement rate the dissipation is
less than 2mW, resulting in only a few tenths of a degree
rise.
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© Andigilog, Inc. 2006 www.andigilog.com October 2006 - 70A05011
aSC7521A
M8 Package – 8-Lead MSOP Package Dimensions
Pb-Free Package
2.85mm (min)
3.05mm (max)
4.75mm (min)
5.05mm (max)
0.95mm BSC
2.90mm (min)
3.10mm (max)
0.25mm (min)
0.40mm (max)
2.90mm (min)
3.10mm (max)
4.75mm (min)
5.05mm (max)
0.65mm BSC
1.10mm (max)
0.525mm BSC
α 0° (min)
(max)
2.85mm (min)
3.05mm (max)
0.10mm
0.78mm (min)
0.94mm (max)
0.05mm (min)
0.15mm (max)
2.90mm (min)
3.10mm (max)
A
A
0.25mm (min)
0.40mm (max)
0.25mm (min)
0.35mm (max)
0.13mm (min)
0.23mm (max)
0.13mm (min)
0.18mm (max)
β
γ
0° (min)
6° (max)
9° (min)
15°
(max)
0.40mm (min)
0.70mm (max)
Detail B
Section A
Detail B
Andigilog, Inc.
8380 S. Kyrene Rd., Suite 101
Tempe, Arizona 85284
Tel: (480) 940-6200
Fax: (480) 940-4255
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© Andigilog, Inc. 2006 www.andigilog.com October 2006 - 70A05011
aSC7521A
Notes:
Andigilog, Inc.
8380 S. Kyrene Rd., Suite 101
Tempe, Arizona 85284
Tel: (480) 940-6200
Fax: (480) 940-4255
- 18 -
© Andigilog, Inc. 2006 www.andigilog.com October 2006 - 70A05011
aSC7521A
Data Sheet Classifications
Preliminary Specification
This classification is shown on the heading of each page of a specification for products that are either under
development (design and qualification), or in the formative planning stages. Andigilog reserves the right to change or
discontinue these products without notice.
New Release Specification
This classification is shown on the heading of the first page only of a specification for products that are either under
the later stages of development (characterization and qualification), or in the early weeks of release to production.
Andigilog reserves the right to change the specification and information for these products without notice.
Fully Released Specification
Fully released datasheets do not contain any classification in the first page header. These documents contain
specification on products that are in full production. Andigilog will not change any guaranteed limits without written
notice to the customers. Obsolete datasheets that were written prior to January 1, 2001 without any header
classification information should be considered as obsolete and non-active specifications, or in the best case as
Preliminary Specifications.
Pentium™ is a trademark of Intel Corporation
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ANDIGILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF ANDIGILOG,
INC. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b)
support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected
to cause the failure of the life support device or system, or to affect its safety or effectiveness.