REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R231-93. 93-09-21 M. A. Frye B Updated boilerplate. Added device types 03-05. Removed programming requirements from drawing. TABLE I. changes. Editorial changes throughout. 94-08-19 M. A. Frye C Boilerplate update, part of 5 year review. ksr 07-01-30 Joseph Rodenbeck REV SHEET REV SHEET REV STATUS REV C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY James E. Jamison STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY Ray Monnin APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE Michael A. Frye DRAWING APPROVAL DATE 88-09-22 AMSC N/A REVISION LEVEL C MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1K X 8 REGISTERED PROM, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 . 1 OF 5962-88636 11 5962-E204-07 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88636 01 K A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type 01 02 03 04 05 Generic number 1/ 7C235 7C235 7C235A 7C235A 7C235A Circuit function Access time 1K X 8-bit registered PROM 1K X 8-bit registered PROM 1K X 8-bit registered PROM 1K X 8-bit registered PROM 1K X 8-bit registered PROM 40 30 40 30 25 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter K L 3 Descriptive designator CDFP3-F24 or GDFP2-F24 CDIP4-T24 or GDIP3-T24 CQCC1-N28 Terminals Package style 24 24 28 flat package Dual-in-line Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range to ground potential (VCC)--------------------------- -0.5 V dc to +7.0 V dc DC voltage range applied to the outputs in the high Z state----------- -0.5 V dc to +7.0 V dc DC input voltage - - - - - - - - - - - - - - - - - - - - - -------------------------- -3.0 V dc to +7.0 V dc Maximum power dissipation ------------------------------------------------- 1.0 W 3/ Lead temperature (soldering, 10 seconds) ------------------------------- +260C Thermal resistance, junction-to-case (JC) - - - - - - - - - --------------- See MIL-STD-1835 Junction temperature (TJ) - - - - - - - - - - - - - - - - - - ------------------- +150C 4/ Storage temperature range (TSTG) - - - - - - - - - - - - - - ---------------- -65C to +150C Temperature under bias ------------------------------------------------------- -55C to +125C Data retention -------------------------------------------------------------------- 10 years, minimum 1.4 Recommended operating conditions. Supply voltage range (VCC) ---------------------------------------------------Ground voltage (GND) -------------------------------------------------------Input high voltage range (VIH) -----------------------------------------------Input low voltage range (VIL) -------------------------------------------------Case operating temperature range (TC) ----------------------------------- +4.5 V dc minimum to +5.5 V dc maximum 0 V dc +2.0 V dc to VCC -0.5 V dc to +0.8 V dc -55C to +125C 1/ Generic numbers are also listed on the Standard Microcircuit Drawing Source Approval Bulletin and in MIL-HDBK-103. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ Must withstand the added PD due to short circuit test; e.g., IOS. 4/ Maximum junction temperature may be increased to +175C during burn-in and steady state life tests. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88636 A REVISION LEVEL C SHEET 2 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MILPRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MILPRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.2.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, C, or D (see 4.3), the devices shall be programmed by the manufacturer prior to test with a minimum of 50 percent of the total number of gates programmed or to any altered item drawing pattern which includes at least 25 percent of the total number of gates programmed. 3.2.2.2 Programmed devices. The truth tables for programmed devices shall be as specified by an attached altered item drawing. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88636 A REVISION LEVEL C SHEET 3 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Limits Min Unit Max Output high voltage VOH VCC =Min, IOH = -4.0 mA, VIN = VIH or VIL 1, 2, 3 All 2.4 V Output low voltage VOL VCC = Min, IOL = 16.0 mA, VIN = VIH or VIL 1, 2, 3 All Input high voltage VIH 1/ 1, 2, 3 All Input low voltage VIL 1/ 1, 2, 3 All Input leakage current IIX VCC =Max VIN = 5.5 V and GND 1, 2, 3 All -10 10 A Output leakage current IOZ VCC = Max 1, 2, 3 All -10 10 A VCC = Max 3/, 4/ VOUT = GND 1, 2, 3 All -20 -90 mA VCC = Max 1, 2, 3 All 120 mA 4 All 10 pF 4 All 10 pF 7, 8A, 8B All 9, 10, 11 01, 03 40 02, 04 30 0.4 2.0 V V 0.8 V VOUT = 5.5 V and GND 2/ Outputs disabled Output short circuit current IOS Power supply current ICC IOUT = 0 mA Input capacitance Output capacitance CIN COUT Functional tests Address setup to clock VCC = 5.0 V TC = +25C f = 1 MHz VIN = 0 V (see 4.3.1c) VOUT = 0 V See 4.3.1e tSA high 5/ Address hold from clock ns 05 25 tHA 9, 10, 11 All 0 tCO 9, 10, 11 01, 03 20 02, 04 15 ns high Clock high to output valid 05 Clock pulse width Es setup to clock high tPWC 9, 10, 11 9, 10, 11 tSEs 01, 03 ns 12 20 02, 04 15 05 12 01, 03 15 02, 04 05 10 ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88636 A REVISION LEVEL C SHEET 4 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device type unless otherwise specified Es hold from clock high tHEs Inactive to valid output tCOS Min 5/ tHZC 9, 10, 11 01, 03 25 02, 04, 05 20 01, 03 25 02, 04, 05 20 01, 03 25 02, 04, 05 20 01, 03 25 02, 04, 05 20 01, 03 35 02, 04, 05 25 9, 10, 11 9, 10, 11 tDOE 8/ Inactive output from E high tHZE 9, 10, 11 3/, 7/, 8/ Delay from INIT to valid output tDI Max All clock high 3/, 6/, 7/ Valid output from E low Unit 9, 10, 11 from clock high 6/ Inactive output from Limits 9, 10, 11 3/ INIT recovery to clock high 3/ tRI 9, 10, 11 All 20 INIT pulse width tPWI 9, 10, 11 01, 03 25 02, 04, 05 20 3/ ns 5 ns ns ns ns ns ns ns 1/ These are absolute values with respect to device ground pin and include all overshoots due to system or tester noise. Do not attempt to test these values without suitable equipment. 2/ For devices using synchronous enable, the device must be clocked after applying these voltages to perform this measurement. 3/ These parameters may not be tested, but shall be guaranteed to the limits specified in table I. 4/ For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds. 5/ AC tests are performed with input rise and fall times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 V to 3.0 V, output loading of the specified IOL or IOH and 50 pF load capacitance. See figure 3. 6/ Applies only when the synchronous Es function is used. 7/ Transition is measured at steady state high level -500 mV or steady state low level +500 mV on the output from the 1.5 V level on the input and 5 pF load capacitance. See figure 3. 8/ Applies only when the asynchronous E function is used. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88636 A REVISION LEVEL C SHEET 5 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. 3.5.1 Certification/compliance mark. A compliance indicator "C" shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator "C" shall be replaced with a "Q" or "QML" certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations; two processing options are provided for selection in the contract, using an altered item drawing. 3.10.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.2.1 and table II. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.10.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. 3.11 Data retention. A data retention stress test shall be completed as part of the vendor's reliability monitors. This test shall be done initially and after any design or process change which may affect data retention. The methods procedures may be vendor specific, but will guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request. and 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88636 A REVISION LEVEL C SHEET 6 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MILSTD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CIN and COUT measurement) shall be measured only for the initial test and after process or design changes which may affect capacitance. Sample size is fifteen devices with no failures and all input and output terminals tested. d. Unprogrammed devices shall be tested for programmability and ac performance compliance to the requirements of group A, subgroups 9, 10, and 11. Either of two techniques is acceptable: (1) Testing the entire lot using additional built-in test circuitry which allows the manufacturer to verify programmability and ac performance without programming the user array. If this is done, the resulting test patterns shall be verified on all devices during subgroups 9, 10, and 11, group A testing in accordance with the sampling plan specified in MIL-STD-883, method 5005. (2) If such compliance cannot be tested on an unprogrammed device, a sample shall be selected to satisfy programmability requirements prior to performing subgroups 9, 10, and 11. Twelve devices shall be submitted to programming (see 3.2.2.2). If more than two devices fail to program, the lot shall be rejected. At the manufacturer's option, the sample may be increased to 24 total devices with no more than 4 total device failures allowable. Ten devices from the programmability sample shall be submitted to the requirements of group A, subgroups 9, 10, and 11. If more than two devices fail, the lot shall be rejected. At the manufacturer's option, the sample may be increased to 20 total devices with no more than 4 total device failures allowable. e. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. c. Group C, subgroup 1 sample shall include devices tested in accordance with 4.3.1d. 4.4 Programming procedures. The programming procedures shall be as specified by the device manufacturer. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88636 A REVISION LEVEL C SHEET 7 All Device types Case outlines K, L 3 Terminal symbol Terminal number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND O3 O4 O5 O6 O7 CP Es NC A7 A6 A5 A4 A3 A2 A1 A0 NC O0 O1 O2 GND NC O3 O4 O5 O6 20 INIT O7 21 E NC 22 23 A9 A8 CP 24 INIT 25 VCC --- 26 27 28 ------- A9 A8 VCC Es E NC = no connection FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88636 A REVISION LEVEL C SHEET 8 Read or Output disable Mode A2 Read 1/ 2/ 3 CP Es INIT Outputs A1 E X X VIL VIH VIL X Data out Output disable 1/ 4/ X X VIH VIH X X High Z Output disable 1/ X X X VIH VIH X High Z X X X VIL VIL X 1025th INIT 1/ 5/ word 1/ 2/ 3/ 4/ 5/ X = don't care, but not to exceed VPP = 13.0 V, maximum. During read operation, the output latches are loaded on a "0" to "1" transition of CP. Pin 19 must be LOW prior to the "0" to "1" transition on CP (18) that loads the register. Pin 19 must be HIGH prior to the "0" to "1" transition on CP (18) that loads the register. Low to high clock transition required to enable outputs. FIGURE 2. Truth table. NOTES: 1. CL includes probe and jig capacitance. CL = 50 pF for all switching characteristics except tHZC and tHZE. CL = 5 pF for tHZC and tHZE. 2. Tests are performed with rise and fall times of 5 ns or less. 3. All device test loads should be located within two inches of device outputs. FIGURE 3. Output load circuit and test conditions. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88636 A REVISION LEVEL C SHEET 9 NOTE: Transition is measured at steady-state high level -500 mV or steady-state low level +500 mV on output, from the 1.5 V level on the input and 5 pF load capacitance. See figure 3. FIGURE 4. Switching waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88636 A REVISION LEVEL C SHEET 10 the TABLE II. Electrical test requirements. MIL-STD-883 test requirements 1/ 2/ 3/ 4/ Subgroups (per method 5005, table I) Interim electrical parameters (method 5004) --- Final electrical test parameters (method 5004) f 1*, 2, 3, 7*, 8A, 8B, 9, 10,11 Group A test requirements (method 5005) 1,2,3,4**,7,8A,8B, 9, 10,11 Groups C and D end-point electrical parameters (method 5005) 2, 3, 7, 8A, 8B 1/ * indicates PDA applies to subgroups 1 and 7. 2/ Any or all subgroups may be combined when using high-speed testers. 3/ ** see 4.3.1c. 4/ As a minimum, subgroups 7 and 8 shall consist of verifying the data pattern. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MILHDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-88636 A REVISION LEVEL C SHEET 11 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 07-01-30 Approved sources of supply for SMD 5962-88636 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 5962-8863601KA 3/ 0C7V7 0C7V7 CY7C235-40KMB 7C235A-40 QP7C235A-40KMB 5962-8863601LA 3/ 0C7V7 0C7V7 CY7C235-40DMB 7C235A-40 QP7C235A-40DMB 5962-88636013A 3/ 0C7V7 0C7V7 CY7C235-40LMB 7C235A-40 QP7C235A-40LMB 5962-8863602KA 3/ 0C7V7 0C7V7 CY7C235-30KMB 7C235A-30 QP7C235A-30KMB 5962-8863602LA 3/ 0C7V7 0C7V7 CY7C235-30DMB 7C235A-30 QP7C235A-30DMB 5962-88636023A 3/ 0C7V7 0C7V7 CY7C235-30LMB 7C235A-30 QP7C235A-30LMB 5962-8863603KA 3/ 0C7V7 0C7V7 CY7C235A-40KMB 7C235A-40 QP7C235A-40KMB 5962-8863603LA 65786 0C7V7 CY7C235A-40DMB QP7C235A-40DMB 5962-88636033A 3/ 0C7V7 0C7V7 CY7C235A-40LMB 7C235A-40 QP7C235A-40LMB 5962-8863604KA 3/ 0C7V7 0C7V7 CY7C235A-30KMB 7C235A-30 QP7C235A-30KMB 5962-8863604LA 3/ 3/ 0C7V7 CY7C235A-30DMB 7C235A-30 QP7C235A-30DMB 5962-88636043A 3/ 0C7V7 0C7V7 CY7C235A-30LMB 7C235A-30 QP7C235A-30LMB See footnotes at end of table. Page 1 of 2 2/ STANDARD MICROCIRCUIT DRAWING BULLETIN - Continued. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 5962-8863605KA 3/ 0C7V7 0C7V7 CY7C235A-25KMB 7C235A-25 QP7C235A-25KMB 5962-8863605LA 3/ 0C7V7 0C7V7 CY7C235A-25DMB 7C235A-25 QP7C235A-25DMB 5962-88636053A 3/ 0C7V7 0C7V7 CY7C235A-25LMB 7C235A-25 QP7C235A-25LMB 2/ 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed, contact the Vendor to determine its availability. 2/ Caution: Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source. Vendor CAGE number Vendor name and address 0C7V7 QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 65786 Cypress Semiconductor 3901 North First Street San Jose, CA 95134-1506 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin. Page 2 of 2