REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADP3302
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703 © Analog Devices, Inc., 1997
High Precision anyCAP™
Dual Low Dropout Linear Regulator
FUNCTIONAL BLOCK DIAGRAM
(1/2 IS SHOWN)
Q2
THERMAL
PROTECTION
GM
Q1
CC
BANDGAP
REF
DRIVER
R1
R2
ADP3302
OUT
IN
ERR
SD
GND
ADP3302
76
2
OUT1
IN
1
5
ERR 330kΩ
E
OUT
0.47µF
V
OUT1
ON
OFF
0.47µF
8
V
IN
GND
SD1
3
IN
4
OUT2
0.47µF
V
OUT2
SD2
Figure 1. Application Circuit
FEATURES
High Accuracy: 60.8%
Ultralow Dropout Voltage: 120 mV @ 100 mA Typical
Requires only CO = 0.47 mF for Stability
anyCAP™ = Stable with All Types of Capacitors
Current and Thermal Limiting
Low Noise
Dropout Detector
Multiple Voltage Options
Thermally Enhanced SO-8 Package
APPLICATIONS
Cellular Telephones
Notebook and Palmtop Computers
Battery Powered Systems
Portable Instruments
High Efficiency Linear Regulators
GENERAL DESCRIPTION
The ADP3302 is a member of the ADP330X family of precision
micropower low dropout anyCAP™ regulators. The ADP3302
contains two fully independent 100 mA regulators with separate
shutdown and merged error outputs. It features 1.4% overall
output accuracy and very low, 120 mV typical, dropout voltage.
The ADP3302 has a wide input voltage range from 13 V to
112 V. It features an error flag that signals when either of the
two regulators is about to lose regulation. It has short circuit
current protection as well as thermal shutdown.
The ADP3302’s enhanced lead frame design allows for a maxi-
mum power dissipation of 630 mW @ +70°C ambient temperature
and 1.0 W at room temperature without any external heat sink.
anyCAP™ is a trademark of Analog Devices, Inc.
–2– REV. 0
ADP3302–SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Units
GROUND CURRENT I
GND
I
L1
= I
L2
= 100 mA 2 4 mA
I
L1
= I
L2
= 0.1 mA 0.4 0.8 mA
GROUND CURRENT IN DROPOUT I
GND
V
IN
= 2.5 V 1.0 2 mA
I
L1
= I
L2
= 0.1 mA
DROPOUT VOLTAGE V
DROP
V
OUT
≤ 98% of V
O
, Nominal
I
L
= 100 mA 0.12 0.2 V
I
L
= 10 mA 0.05 0.1 V
I
L
= 1 mA 0.02 0.05 V
SHUTDOWN THRESHOLD V
THSD
ON 2.0 0.9 V
OFF 0.9 0.3 V
SHUTDOWN PIN INPUT CURRENT I
SDIN
0 < V
SD
< 5 V 0 1 µA
5 ≤ V
SD
≤ 12 V, @ V
IN
= 12 V 22 µA
GROUND CURRENT IN SHUTDOWN I
Q
V
SDI
= V
SD2
= 0, T
A
= +25°C,
MODE @ V
IN
=12 V 0 1 µA
V
SDI
= V
SD2
= 0, T
A
= +85°C,
@ V
IN
=12 V 5 µA
OUTPUT CURRENT IN SHUTDOWN I
OSD
T
A
= +85°C, @ V
IN
= 12 V 12 µA
MODE T
A
= +25°C, @ V
IN
= 12 V 2 µA
ERROR PIN OUTPUT LEAKAGE I
EL
V
EO
= 5 V 13 µA
ERROR PIN OUTPUT “LOW” VOLTAGE V
EOL
I
SINK
= 400 µA 0.15 0.3 V
PEAK LOAD CURRENT I
LDPK
V
IN
= Nominal V
OUT
+1 V 200 mA
THERMAL REGULATION V
IN
= 12 V, I
L
= 100 mA 0.05 %/W
T = 10 ms
OUTPUT NOISE V
NOISE
f = 10 Hz–100 kHz, @ T
A
= +25°C
V
OUT
= 3.3 V 75 µV rms
V
OUT
= 5 V 110 µV rms
NOTES
1
Ambient temperature of
1
85°C corresponds to a typical junction temperature of
+125°C.
Specifications subject to change without notice.
ADP3302-3.0–SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Units
OUTPUT VOLTAGE V
OUT1
or V
IN
= 3.3 V to 12 V 2.976 3 3.024 V
V
OUT2
I
L
= 0.1 mA to 100 mA
T
A
= +25°C
V
IN
= 3.3 V to 12 V 2.958 3 3.042 V
I
L
= 0.1 mA to 100 mA
LINE REGULATION V
IN
= 3.3 V to 12 V 0.024 mV/V
T
A
= +25°C, I
L
= 0.1 mA
LOAD REGULATION I
L
= 0.1 mA to 100 mA 0.030 mV/mA
T
A
= +25°C
CROSS REGULATION I
L
= 0.1 mA to 100 mA 1 µV/mA
T
A
= +25°C
or
Specifications subject to change without notice.
(@ TA = –208C to +858C, VIN = 7 V, CIN = 0.47 mF, COUT = 0.47 mF, unless otherwise
noted)1
∆V
O
V
O
(@ TA = –208C to +858C, VIN = 3.3 V, CIN = 0.47 mF, COUT = 0.47 mF, unless
otherwise noted)
∆V
O
∆V
IN
∆V
O
∆I
L
∆V
01
∆I
L2
∆V
02
∆I
L1
–3–
REV. 0
ADP3302
ADP3302-3.2–SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Units
OUTPUT VOLTAGE V
OUT1
or V
IN
= 3.5 V to 12 V 3.174 3.2 3.226 V
V
OUT2
I
L
= 0.1 mA to 100 mA
T
A
= +25°C
V
IN
= 3.5 V to 12 V 3.155 3.2 3.245 V
I
L
= 0.1 mA to 100 mA
LINE REGULATION V
IN
= 3.5 V to 12 V 0.026 mV/V
T
A
= +25°C, I
L
= 0.1 mA
LOAD REGULATION I
L
= 0.1 mA to 100 mA 0.032 mV/mA
T
A
= +25°C
CROSS REGULATION I
L
= 0.1 mA to 100 mA 1 µV/mA
T
A
= +25°C
or
Specifications subject to change without notice.
ADP3302-3.3–SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Units
OUTPUT VOLTAGE V
OUT1
or V
IN
= 3.6 V to 12 V 3.273 3.3 3.327 V
V
OUT2
I
L
= 0.1 mA to 100 mA
T
A
= +25°C
V
IN
= 3.6 V to 12 V 3.253 3.3 3.347 V
I
L
= 0.1 mA to 100 mA
LINE REGULATION V
IN
= 3.6 V to 12 V 0.026 mV/V
T
A
= +25°C, I
L
= 0.1 mA
LOAD REGULATION I
L
= 0.1 mA to 100 mA 0.033 mV/mA
T
A
= +25°C
CROSS REGULATION I
L
= 0.1 mA to 100 mA 1 µV/mA
T
A
= +25°C
or
Specifications subject to change without notice.
ADP3302-5.0–SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Units
OUTPUT VOLTAGE V
OUT1
or V
IN
= 5.3 V to 12 V 4.960 5.0 5.040 V
V
OUT2
I
L
= 0.1 mA to 100 mA
T
A
= +25°C
V
IN
= 5.3 V to 12 V 4.930 5.0 5.070 V
I
L
= 0.1 mA to 100 mA
LINE REGULATION V
IN
= 5.3 V to 12 V 0.04 mV/V
T
A
= +25°C, I
L
= 0.1 mA
LOAD REGULATION I
L
= 0.1 mA to 100 mA 0.05 mV/mA
T
A
= +25°C
CROSS REGULATION I
L
= 0.1 mA to 100 mA 1 µV/mA
T
A
= +25°C
or
Specifications subject to change without notice.
(@ TA = –208C to +858C, VIN = 3.5 V, CIN = 0.47 mF, COUT = 0.47 mF, unless
otherwise noted)
∆V
O
∆V
IN
∆V
O
∆I
L
∆V
01
∆I
L2
∆V
02
∆I
L1
∆V
O
∆V
IN
∆V
O
∆I
L
∆V
01
∆I
L2
∆V
02
∆I
L1
(@ TA = –208C to +858C, VIN = 3.6 V, CIN = 0.47 mF, COUT = 0.47 mF, unless
otherwise noted)
∆V
O
∆V
IN
∆V
O
∆I
L
∆V
01
∆I
L2
∆V
02
∆I
L1
(@ TA = –208C to +858C, VIN = 5.3 V, CIN = 0.47 mF, COUT = 0.47 mF, unless
otherwise noted)
–4– REV. 0
ADP3302
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3302 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS*
Input Supply Voltage . . . . . . . . . . . . . . . . . . . .–0.3 V to +16 V
Please note: Pins 5 and 8 should be connected exter-
nally for proper operation.
Shutdown Input Voltage . . . . . . . . . . . . . . . . . –0.3 V to +16 V
Error Flag Output Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V
Power Dissipation . . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Ambient Temperature Range . . . .–55°C to +125°C
Operating Junction Temperature Range . . . .–55°C to +125°C
θ
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
θ
JC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C/W
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
*This is a stress rating only; functional operation of the device at these or any other
conditions above those indicated in the operation section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
ORDERING GUIDE
Voltage Package
Model
Outputs Option*
ADP3302AR1 OUT 1 3.0 V SO-8
OUT 2 3.0 V SO-8
ADP3302AR2 OUT 1 3.2 V SO-8
OUT 2 3.2 V SO-8
ADP3302AR3 OUT 1 3.3 V SO-8
OUT 2 3.3 V SO-8
ADP3302AR4 OUT 1 3.3 V SO-8
OUT 2 5.0 V SO-8
ADP3302AR5 OUT 1 5.0 V SO-8
OUT 2 5.0 V SO-8
NOTES
*SO = Small Outline Package.
Contact factory for availability of customized options available with mixed
output voltages.
PIN FUNCTION DESCRIPTIONS
Pin Name Function
1 OUT1 Output of Regulator 1, fixed 3.0 V, 3.2 V,
3.3 V or 5 V output voltage. Sources up to
200 mA. Bypass to ground with a 0.47 µF
capacitor.
2 ERR Open Collector Output. Active low indicates
that one of the two outputs is about to go out
of regulation.
3 GND Ground Pin.
4 OUT2 Output Regulator 2. Independent of Regula-
tor 1. Fixed 3.0 V, 3.2 V, 3.3 V or 5 V output
voltage. Bypass to ground with a 0.47 mF
capacitor.
5, 8 IN Regulator Input. Supply voltage can range
from 13.0 V to 112 V. Pins 5 and 8 must be
connected together for proper operation.
6SD2 Active Low Shutdown Pin for Regulator 2.
Connect to ground to disable the Out 2 out-
put. When shutdown is not used, this pin
should be connected to the input pin.
7SD1 Shutdown Pin for Regulator 1, otherwise
identical to SD2.
PIN CONFIGURATION
IN
SD1
SD2
IN
OUT1
ERR
GND
OUT2
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
ADP3302
–5–
REV. 0
ADP3302
INPUT VOLTAGE – Volts
5.1
OUTPUT VOLTAGE – Volts
6168101214
5.001
5
4.999
4.998
4.997
4.996
4.995 5.55.45.35.2
I
L
= 0mA
I
L
= 1mA
I
L
= 20mA
I
L
= 100mA
Figure 2. Line Regulation Output
Voltage vs. Supply Voltage on
ADP3302AR5
OUTPUT LOAD – mA
GROUND CURRENT – mA
0050
100 150 200
4
3
2
1
5
IL1 = 0 TO 200mA
IL2 = 0 TO 200mA
IL1 = 0 TO 200mA
IL2 = 0mA
VIN = 7V
Figure 5. Quiescent Current vs. Load
Current
OUTPUT LOAD – mA
INPUT-OUTPUT VOLTAGE – mV
250
200
00 20 200
40 60 80 100 120 140 160 180
150
100
50
Figure 8. Dropout Voltage vs. Output
Current
Typical Performance Characteristics–
OUTPUT LOAD – mA
OUTPUT VOLTAGE – Volts
5.005
5.000
4.980 025
50 75
4.995
4.990
4.985
V
IN
= 7V
100 125 150 175 200
Figure 3. Output Voltage vs.
Load Current Up to 200 mA
on ADP3302AR5
TEMPERATURE –
°
C
OUTPUT VOLTAGE – %
0.2
–0.4
–45 –25 135–5 15 35 75 95 11555
0.1
0.0
–0.1
–0.2
–0.3
I
L
= 0
Figure 6. Output Voltage Variation %
vs. Temperature
INPUT VOLTAGE – Volts
5
003 0
432
4
2
1
3
211
INPUT/OUTPUT VOLTAGE – Volts
R
L
= 33Ω
Figure 9. Power-Up/Power-Down on
ADP3302AR3.
SD
= 3 V or V
IN
INPUT VOLTAGE – Volts
1
GROUND CURRENT – mA
3165 7 9 11 13
1.6
0.0
1.4
0.8
0.6
0.4
0.2
1.2
1.0
IL = IL2 =0
Figure 4. Quiescent Current vs.
Supply Voltage–ADP3302AR3
TEMPERATURE – °C
GROUND CURRENT – µA
3000
0
–45 –25 135–5 15 35 75 95 11555
2500
2000
1500
1000
500
IL1 = 100mA
IL2 = 100mA
IL1 = 100mA
IL2 = 0mA IL1 = 0mA
IL2 = 0mA
Figure 7. Quiescent Current vs.
Temperature
TIME – µs
00 100 200
2.0 V
SD
= V
IN
C
L
= 0.47µF
R
L
= 33Ω
1.0
3.0
4.0
5.0
6.0
7.0
8.0
20
INPUT/OUTPUT VOLTAGE – Volts
40 60 80 120 140 160 180
V
IN
V
OUT
Figure 10. Power-Up Transient on
ADP3302AR1
–6– REV. 0
ADP3302
–Typical Performance Characteristics
Volts
TIME – µs
3.31
70 40 400
80 120 160 200 240 280 320 360
3.3
3.29
3.3
7.5
3.31
3.29
3.3kΩ, 0.47µF LOAD
33Ω, 0.47µF LOAD
VIN
Figure 11. Line Transient Response—
(0.47
µ
F Load) on ADP3302AR4
5.01
Volts
Volts
TIME – µs
3.302
00 1000
200 400 600 800
3.3
3.298
5
100 I (V
OUT2
) 100mA
4.99
mA
5.03
4.97
V
OUT1
V
OUT2
C
L
= 10µF
Figure 14. Load Transient on
V
OUT2
and Crosstalk on V
OUT1
on
ADP3302AR4 for 1 mA to 100 mA
Pulse
TIME – µs
Volts
4
1
05 50
10 15 20 25 30 35 40 45
3
2
0
0
5
V
OUT
V
SD
C = 0.47µF
R = 33Ω ON 3.3V OUTPUT
Figure 17. Turn Off on ADP3302AR3
5.002
5
4.998
Volts
TIME – µs
3.305
00 1000
200 400 600 800
3.3
3.295
100
Volts
mA
I (V
OUT1
) 100mA
V
OUT1
V
OUT2
C
L
= 0.47µF
Figure 13. Load Transient on
V
OUT1
and Crosstalk of V
OUT2
on
ADP3302AR4 for 1 mA to 100 mA
Pulse
Volts
TIME – µs
5
0
0 20 200
40 60 80 100 120 140 160 180
4
3
1
5
2
0
Volts
3V
C
L
= 4.7µF
C
L
= 0.47µF R
L
= 33Ω
3.3V
Figure 16. Turn On ADP3302AR3
FREQUENCY = Hz
VOLTAGE NOISE SPECTRAL DENSITY – µV/ Hz
0.8
0.6
0102 103 105
104
0.4
0.2 a. 0.47µF @ NO LOAD
b. 0.47µF @ 33Ω
c. 10µF @ NO LOAD
d. 10µF @ 33Ω
0.47µF BYPASS
PIN 5, 8 TO PIN 3
d
b
ac
b d
a
c
Figure 19. Output Noise Density on
ADP3302AR5
Volts
TIME – µs
3.31
7.5
0 40 400
80 120 160 200 240 280 320 360
3.3
3.29
3.3
3.31
3.29
3.3kΩ, 10µF LOAD
33Ω, 10µF LOAD
VIN
7
Figure 12. Line Transient Response
(10
µ
F Load) on ADP3302AR4
Volts
TIME – sec
3.5
0
05
12 34
0
300
100
400
200
3.3V
mA
Figure 15. Short Circuit Current
FREQUENCY – Hz
RIPPLE REJECTION – dB
0
–100
10 100 10M
1k 10k 100k 1M
–10
–60
–70
–80
–90
–20
–30
–50
–40
a. 0.47µF @ NO LOAD
b. 0.47µF @ 33Ω
c. 10µF @ NO LOAD
d. 10µF @ 33Ω
b d
ac
b
d
a
c
Figure 18. Power Supply Ripple
Rejection on ADP3302AR3
–7–
REV. 0
ADP3302
APPLICATION INFORMATION
anyCAP
™
The ADP3302 is an easy to use dual low dropout voltage
regulator. The ADP3302 requires only a very small 0.47 µF bypass
capacitor on the outputs for stability. Unlike the conventional
LDO designs, the ADP3302 is stable with virtually any type of
capacitors (anyCAP™) independent of the capacitor’s ESR
(Effective Series Resistance) value.
Capacitor Selection
Output Capacitors: As with any micropower device, output
transient response is a function of the output capacitance. The
ADP3302 is stable with a wide range of capacitor values, types
and ESR (anyCAP™). A capacitor as low as 0.47 mF is all that
is needed for stability. However, larger capacitors can be used if
high output current surges are anticipated. The ADP3302 is
stable with extremely low ESR capacitors (ESR ≈ 0), such as
multilayer ceramic capacitors (MLCC) or OSCON.
Input Bypass Capacitor: An input bypass capacitor is not
required. However, for applications where the input source is
high impedance or far from the input pins, a bypass capacitor is
recommended. Connecting a 0.47 mF capacitor from the input
pins (Pins 5 and 8) to ground reduces the circuit’s sensitivity to
PC board layout.
Low ESR capacitors offer better performance on a noisy supply;
however, for less demanding requirements a standard tantalum
or aluminum electrolytic capacitor is adequate.
Thermal Overload Protection
The ADP3302 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit,
which limits the die temperature to a maximum of 165°C.
Under extreme conditions (i.e., high ambient temperature and
power dissipation) where die temperature starts to rise above
165°C, the output current is reduced until the die temperature
has dropped to a safe level. The output current is restored when
the die temperature is reduced.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally limited
so that junction temperatures will not exceed 125°C.
Calculating Junction Temperature
Device power dissipation is calculated as follows:
PD = (V
IN
– V
OUT1
) I
LOAD1
+ (V
IN
– V
OUT2
) I
LOAD2
+ (V
IN
) I
GND
Where I
LOAD1
and I
LOAD2
are Load currents on Outputs 1 and 2,
I
GND
is ground current, V
IN
and V
OUT
are input and output
voltages respectively.
Assuming I
LOAD1
= I
LOAD2
= 100 mA, I
GND
= 2 mA, V
IN
= 7.2 V
and V
OUT1
= V
OUT2
= 5.0 V, device power dissipation is:
PD = (7.2 V – 5 V) 100 mA + (7.2 V – 5 V) 100 mA + (7.2 V)
2 mA = 0.454 W
The proprietary thermal coastline lead frame used in the
ADP3302 yields a thermal resistance of 96°C/W, which is signi-
ficantly lower than a standard 8-pin SOIC package at 170°C/W.
Junction temperature above ambient temperature will be
approximately equal to:
0.454 W 3 96°C/W = 43.6°C
To limit the maximum junction temperature to 125°C, maxi-
mum ambient temperature must be lower than:
TA
MAX
= 125°C 2 43.6°C = 81.4°C
PRINTED CIRCUIT BOARD LAYOUT CONSIDERATION
All surface mount packages rely on the traces of the PC board to
conduct heat away from the package.
In standard packages the dominant component of the heat
resistance path is the plastic between the die attach pad and the
individual leads. In typical thermally enhanced packages one or
more of the leads are fused to the die attach pad, significantly
decreasing this component. However, to make the improvement
meaningful, a significant copper area on the PCB has to be
attached to these fused pins.
The ADP3302’s patented thermal coastline lead frame design
uniformly minimizes the value of the dominant portion of the
thermal resistance. It ensures that heat is conducted away by all
pins of the package. This yields a very low 96°C/W thermal
resistance for an SO-8 package, without any special board lay-
out requirements, relying just on the normal traces connected to
the leads. The thermal resistance can be decreased by, approxi-
mately, an additional 10% by attaching a few square cm of
copper area to the two V
IN
pins of the ADP3302 package.
It is not recommended to use solder mask or silkscreen on the
PCB traces adjacent to the ADP3302 pins since it will increase
the junction to ambient thermal resistance of the package.
Shutdown Mode
Applying a TTL high signal to the shutdown pin or tying it to
the input pin will turn the output ON. Pulling the shutdown pin
down to a TTL low signal or tying it to ground will turn the
output OFF. Outputs are independently controlled. In shutdown
mode, quiescent current is reduced to less than 2 mA.
Error Flag Dropout Detector
The ADP3302 will maintain its output voltage over a wide
range of load, input voltage and temperature conditions. If
regulation is lost, for example, by reducing the supply voltage
below the combined regulated output and dropout voltages, the
ERRor flag will be activated. The ERR output is an open
collector, which will be driven low.
Once set, the ERRor flag’s hysteresis will keep the output low
until a small margin of operating range is restored, either by
raising the supply voltage or reducing the load.
A single ERR pin serves both regulators in the ADP3302 and
indicates that one or both regulators are on the verge of losing
regulation.
APPLICATION CIRCUIT
Dual Post Regulator Circuit for Switching Regulators
The ADP3302 can be used to implement a dual 3 V/100 mA
post regulator power supply from a 1 cell Li-Ion input (Figure
20). This circuit takes 2.5 V to 4.2 V as the input and delivers
dual 3 V/100 mA outputs. Figure 21 shows the typical efficiency
curve.
For ease of explanation, let’s partition the circuit into the
ADP3000 step-up regulator section and the ADP3302 low
dropout regulation section. Furthermore, let’s divide the operation
of this application circuit into the following three phases.
–8–
C2989-12-1/97
PRINTED IN U.S.A.
Phase One: When the input voltage is equal to 3.7 V or higher,
the ADP3000 is off and the ADP3302 operates on its own to
regulate the output voltage. At this phase, current is flowing into
the input pins of the ADP3302 via the inductor L1 and the
Schottky diode. At the same time, the ADP3000 is set into sleep
mode by pulling the FB pin (via R9 and R10 resistor divider
network) to about 10% higher than its internal reference which
is set to be 1.245 V.
Phase Two: As the input voltage drops below 3.7 V, the
decreasing input voltage causes the voltage of the FB pin to be
within 5% of the 1.245 V reference. This triggers the ADP3000
to turn on, providing a 3.4 V regulated output to the inputs of
the ADP3302. The ADP3000 continues to supply the 3.4 V
regulated voltage to the ADP3302 until the input voltage drops
below 2.5 V.
Phase Three: When the input voltage drops below 2.5 V, the
ADP3302 will shut down and the ADP3000 will go into sleep
mode. With the input voltage below 2.5 V, the resistor divider
network, R1 and R2, applies a voltage that is lower than the
ADP3000’s internal 1.245 V reference voltage to the SET pin.
This causes the A
O
pin to have a voltage close to 0 V, which
causes the ADP3302 to go into shutdown directly and Q1 to
turn on and pull the FB pin 10% or higher than the internal
1.245 V reference voltage. With the FB pin pulled high, the
ADP3000 goes into sleep mode.
80
75
70
65
% EFFICIENCY
AT V
IN
≤ 2.5V
SHDN IQ = 500µA
I
O
= 50mA + 50mA
I
O
= 100mA + 100mA
2.6 3.0 3.4 3.8 4.2 V
IN
(V)
Figure 21. Typical Efficiency of the Circuit of Figure 20
Refer to Figure 20. R9 and R10 set the output voltage of the
ADP3000. R1, R2, and R3 set the shutdown threshold voltage
for the circuit. For further details on the ADP3000, please refer
to the ADP3000 data sheet.
Supply Sequencing Circuit
Figure 22 shows a simple and effective way to achieve sequenc-
ing of two different output voltages, 3.3 V and 5 V, in a mixed
supply voltage system. In most cases, these systems need careful
sequencing for the supplies to avoid latchup.
At turn-on, D1 rapidly charges up C1 and enables the 5 V out-
put. After a R2-C2 time constant delay, the 3.3 V output is
enabled. At turn-off, D2 quickly discharges C2 and R3 pulls
SD1 low, turning off the 3.3 V output first. After a R1-C1 time
constant delay, the 5 V output turns off.
ADP3302
2
OUT1
IN 1
8ERR VOUT1
3.3V
C5
1µF 5
VIN = 6V TO 12V
GND
SD1
IN
OUT2 VOUT2
5.0V
SD2
C2
0.01µF
C1
0.01µF
C4
0.5µF
C3
0.5µF
ON/OFF
3.3V
D2
D1
R2
220kΩ
R1
220kΩ
D3
R3
330kΩ4
7
6
3
Figure 22. Turn-On/Turn-Off Sequencing for Mixed Supply
Voltages
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Pin SOIC
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
85
41
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.0688 (1.75)
0.0532 (1.35)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0500
(1.27)
BSC 0.0098 (0.25)
0.0075 (0.19) 0.0500 (1.27)
0.0160 (0.41)
8°
0°
0.0196 (0.50)
0.0099 (0.25) x 45°
REV. 0
ADP3302
3V
100mA
3V
100mA
1µF
6V
(MLC)
1µF
6V
(MLC)
C4
C5
IN
IN
SD
GND V
O2
V
O2
ADP3302
C3
100µF
10V
AVX-TPS
R9
348kΩ
1%
R10
200kΩ
1%
IN5817
L1
6.6µF
(SUMIDA–CDRH62)
Q1
2N2907
R5
330kΩ
R6
100kΩR8
10kΩ
R7
90kΩ
C2
33nF
R4
120kΩ
R1
100kΩ
C1 100µF
10V
AVX-TPS
R3
1MΩ
R2
90kΩ
2.5V → 4.2V
V
IN
I
LIM
SET
A
O
GND SW2
SW1
FB
ADP3000
Figure 20. Cell Li-Ion to 3 V/200 mA Converter with Shutdown at V
IN
< 2.5 V
