VND5E050MCJ-E VND5E050MCK-E Double-channel high-side driver with analog current sense for automotive applications Features Max transient supply voltage VCC Operating voltage range VCC 4.5 V to 28 V Max on-state resistance (per ch.) RON 41 V Current limitation (typ) ILIMH 27 A Off-state supply current IS 2 A(1) 1. Typical value with all loads connected. General - Inrush current active management by power limitation - Very low standby current - 3.0 V CMOS compatible inputs - Optimized electromagnetic emissions - Very low electromagnetic susceptibility - Compliance with European directive 2002/95/EC - Very low current sense leakage Diagnostic functions - Proportional load current sense - High-precision current sense for wide currents range - Current sense disable - Overload and short to ground (power limitation) indication - Thermal shutdown indication Protections - Undervoltage shutdown - Overvoltage clamp - Load current limitation - Self limiting of fast thermal transients - Protection against loss of ground and loss of VCC - Overtemperature shutdown with auto restart (thermal shutdown) - Reverse battery protected September 2013 PowerSSO-12 50 m PowerSSO-24 - Electrostatic discharge protection Applications All types of resistive, inductive and capacitive loads Suitable as LED driver Description The VND5E050MCJ-E and VND5E050MCK-E are double channel high-side drivers manufactured using ST proprietary VIPower(R) M0-5 technology and housed in PowerSSO-12 and PowerSSO-24 packages. The devices are designed to drive 12 V automotive grounded loads, and to provide protection and diagnostics. They also implement a 3 V and 5 V CMOScompatible interface for the use with any microcontroller. The devices integrate advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto-restart and overvoltage active clamp. A dedicated analog current sense pin is associated with every output channel providing enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication and overtemperature indication. The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to share the external sense resistor with similar devices. Doc ID 022514 Rev 2 1/40 www.st.com 1 Contents VND5E050MCJ-E, VND5E050MCK-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1 4 5 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22 3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.5 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 25 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.2 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.1 ECOPACK(R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.2 PowerSSO-12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.3 PowerSSO-24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.4 PowerSSO-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.5 PowerSSO-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 2/40 Doc ID 022514 Rev 2 VND5E050MCJ-E, VND5E050MCK-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13 V, Tj = 25 C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Current sense (8 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Doc ID 022514 Rev 2 3/40 List of figures VND5E050MCJ-E, VND5E050MCK-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. 4/40 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Delay response time between rising edge of output current and rising edge of current sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Maximum current sense ratio drift vs load current(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 OFF-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input voltage clamp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 High-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Hysteresis input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 ON-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ON-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 High-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 CS_DIS voltage clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Low-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Application schematic(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 25 PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Rthj-amb vs PCB copper area in open box free air condition (one channel on) . . . . . . . . . 26 PowerSSO-12 thermal impedance junction ambient single pulse (one channel on) . . . . . 27 Thermal fitting model of a double-channel HSD in PowerSSO-12 . . . . . . . . . . . . . . . . . . . 27 PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Rthj-amb vs PCB copper area in open box free air condition (one channel on) . . . . . . . . . 29 PowerSSO-24 thermal impedance junction ambient single pulse (one channel on) . . . . . 30 Thermal fitting model of a double-channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 30 PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 PowerSSO-12 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 PowerSS0-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 PowerSSO-24 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Doc ID 022514 Rev 2 VND5E050MCJ-E, VND5E050MCK-E Block diagram and pin description Figure 1. Block diagram VCC Signal Clamp Undervoltage IN1 Control & Diagnostic 1 Power Clamp DRIVER IN2 CH 1 VON Limitation Over temp. Current Limitation CS_ DIS VSENSEH CS1 CONTROL & DIAGNOSTIC Channels 2 1 Block diagram and pin description CH 2 Current Sense OUT2 CS2 OUT1 OVERLOAD PROTECTION (ACTIVE POWER LIMITATION) LOGIC GND Table 1. Pin function Name VCC OUT1,2 Function Battery connection. Power output. GND Ground connection. Must be reverse battery protected by an external diode/resistor network. IN1,2 Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state. CS1,2 Analog current sense pin, delivers a current proportional to the load current. CS_DIS Active high CMOS compatible pin, to disable the current sense pin. Doc ID 022514 Rev 2 5/40 Block diagram and pin description Figure 2. VND5E050MCJ-E, VND5E050MCK-E Configuration diagram (top view) TAB = Vcc GND IN2 IN1 CS1 CS2 CS_DIS 1 2 3 4 5 6 12 11 10 9 8 7 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 VCC GND N.C. INPUT2 N.C. INPUT1 N.C. CURRENT SENSE1 N.C. CURRENT SENSE2 CS_DIS. VCC Vcc OUT2 OUT2 OUT1 OUT1 Vcc TAB = VCC PowerSSO-12 Table 2. 6/40 PowerSSO-24 Suggested connections for unused and not connected pins Connection / pin Current sense N.C. Output Input CS_DIS Floating Not allowed X X X X To ground Through 1 K resistor X Not allowed Doc ID 022514 Rev 2 Through 10 K Through 10 K resistor resistor VND5E050MCJ-E, VND5E050MCK-E 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions(1) IS VCC VCC VFn ICSD OUT1 CS_DIS VCSD CS1 IN1 IIN2 VIN2 VOUT1 ISENSE1 IIN1 VIN1 IOUT1 OUT2 VSENSE1 IOUT2 VOUT2 IN2 CS2 GND ISENSE2 VSENSE2 IGND 1. VFn = VOUTn - VCC during reverse battery condition. 2.1 Absolute maximum ratings Stressing the device above the rating listed in Table 3: Absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Table 3. Absolute maximum ratings Symbol Parameter Value Unit VCC DC supply voltage 41 V -VCC Reverse DC supply voltage 0.3 V -IGND DC reverse ground pin current 200 mA IOUT DC output current Internally limited A -IOUT Reverse DC output current 20 A DC input current -1 to 10 mA DC current sense disable input current -1 to 10 mA 200 mA VCC - 41 to +VCC V IIN ICSD -ICSENSE DC reverse CS pin current VCSENSE Current sense maximum voltage Doc ID 022514 Rev 2 7/40 Electrical specifications Table 3. VND5E050MCJ-E, VND5E050MCK-E Absolute maximum ratings (continued) Symbol Value Unit 104 mJ EMAX Maximum switching energy (single pulse) (L = 3 mH, RL = 0, Vbat = 13.5 V, Tjstart = 150 C, IOUT = IlimL(Typ.)) VESD Electrostatic discharge (human body model: R = 1.5 K C = 100 pF) - IN - CS - CS_DIS - OUT - VCC 4000 2000 4000 5000 5000 V V V V V VESD Charge device model (CDM-AEC-Q100-011) 750 V Junction operating temperature -40 to 150 C Storage temperature -55 to 150 C Tj Tstg 2.2 Parameter Thermal data Table 4. Thermal data Max. value Symbol 8/40 Parameter Rthj-case Thermal resistance junction-case (with one channel on) Rthj-amb Thermal resistance junction-ambient Doc ID 022514 Rev 2 Unit PowerSSO-12 PowerSSO-24 2.7 2.7 C/W See Figure 33 See Figure 37 C/W VND5E050MCJ-E, VND5E050MCK-E 2.3 Electrical specifications Electrical characteristics Values specified in this section are for 8 V < VCC < 28 V, -40 C < Tj < 150 C, unless otherwise stated. Table 5. Power section Symbol Parameter Test conditions Min. Typ. Max. Unit 4.5 13 28 V 4.5 V VCC Operating supply voltage VUSD Undervoltage shutdown 3.5 VUSDhyst Undervoltage shutdown hysteresis 0.5 RON Vclamp(2) IS ON-state resistance(1) IOUT = 2 A, Tj = 25 C 50 IOUT = 2 A, Tj = 150 C 100 IOUT = 2 A, VCC = 5 V, Tj = 25 C 65 Clamp voltage IS = 20 mA 41 Supply current OFF-state: VCC = 13 V, Tj = 25 C, VIN = VOUT = VSENSE = VCSD = 0 V ON-state: VCC = 13 V, VIN = 5 V, IOUT = 0 A IL(off1) VF (2) OFF-state output current (1) Output-VCC diode voltage(1) V VIN = VOUT = 0 V, VCC = 13 V, Tj = 25 C 0 VIN = VOUT = 0 V, VCC = 13 V, Tj = 125 C 0 m 46 52 V 2(3) 5(3) A 3 6 mA 0.01 3 A 5 -IOUT = 4 A, Tj = 150 C 0.7 V 1. For each channel. 2. Special characteristic according to ISO/TS 16949. 3. PowerMOS leakage included. Table 6. Switching (VCC = 13 V, Tj = 25 C) Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 6.5 (see Figure 5) -- 20 -- s td(off) Turn-off delay time RL = 6.5 (see Figure 5) -- 45 -- s dVOUT/dt(on) Turn-on voltage slope RL = 6.5 -- See Figure 23 -- Vs dVOUT/dt(off) Turn-off voltage slope RL = 6.5 -- See Figure 25 -- Vs Doc ID 022514 Rev 2 9/40 Electrical specifications Table 6. Symbol Switching (VCC = 13 V, Tj = 25 C) (continued) Parameter Test conditions Min. Typ. Max. Unit WON Switching energy losses during twon RL = 6.5 (see Figure 5) -- 0.15 -- mJ WOFF Switching energy losses during twoff RL = 6.5 (see Figure 5) -- 0.3 -- mJ Max. Unit 0.9 V Table 7. Symbol Logic inputs Parameter Test conditions VIL Low-level input voltage IIL Low-level input current VIH High-level input voltage IIH High-level input current VI(hyst) Hysteresis input voltage VICL Input voltage clamp VCSDL Low-level CS_DIS voltage ICSDL Low-level CS_DIS current VCSDH High-level CS_DIS voltage ICSDH High-level CS_DIS current VCSD(hyst) CS_DIS hysteresis voltage VCSCL Table 8. Min. VIN = 0.9 V Typ. 1 A 2.1 V VIN = 2.1 V 10 0.25 IIN = 1 mA 7 V -0.7 0.9 VCSD = 0.9 V A 2.1 V 10 0.25 ICSD = 1 mA V 1 VCSD = 2.1 V CS_DIS voltage clamps A V 5.5 IIN = -1 mA A V 5.5 7 V ICSD = -1 mA -0.7 Protections and diagnostics (1) Symbol Parameter IlimH DC short circuit current IlimL Short circuit current during thermal cycling TTSD(2) Shutdown temperature Test conditions VCC = 13 V Min. Typ. Max. Unit 19 27 38 A 38 A 5 V < VCC < 28 V TR Reset temperature TRS Thermal reset of status THYST 10/40 VND5E050MCJ-E, VND5E050MCK-E VCC = 13 V, TR < Tj < TTSD Thermal hysteresis (TTSD - TR) 7 150 175 TRS + 1 TRS + 5 135 200 C C C 7 Doc ID 022514 Rev 2 A C VND5E050MCJ-E, VND5E050MCK-E Table 8. Electrical specifications Protections and diagnostics (1) (continued) Symbol Parameter VDEMAG(2) Turn-off output voltage clamp IOUT = 2 A, VIN = 0, L = 6 mH Output voltage drop limitation IOUT = 0.1 A, Tj = -40 C to +150 C (see Figure 7) VON Test conditions Min. Typ. Max. Unit VCC - 41 VCC - 46 VCC - 52 V 25 mV 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. 2. Special characteristic according to ISO/TS 16949. Table 9. Symbol Current sense (8 V < VCC < 18 V) Parameter Test conditions Min. Typ. Max. Unit K0 IOUT/ISENSE IOUT = 0.05 A, VSENSE = 0.5 V, VCSD = 0 V, Tj = -40 C to 150 C K1 IOUT/ISENSE IOUT = 1 A, VSENSE = 4 V, VCSD = 0 V, 1740 2070 2820 Tj = -40 C to 150 C 1750 2070 2562 Tj= 25C...150C Current sense ratio drift IOUT = 1 A, VSENSE = 4 V, VCSD = 0 V, Tj = -40 C to 150 C IOUT/ISENSE IOUT = 2 A, VSENSE = 4 V, VCSD = 0 V, 1900 2000 2395 Tj = -40 C to 150 C Tj = 25 C to 150 C 1899 2000 2282 Current sense ratio drift IOUT = 2 A; VSENSE = 4 V, VCSD = 0 V, Tj = -40 C to 150 C IOUT/ISENSE IOUT = 4 A, VSENSE = 4 V, VCSD = 0 V, 1969 1990 2210 Tj = -40 C to 150 C 1950 1990 2153 Tj = 25 C to 150 C Current sense ratio drift IOUT = 4 A, VSENSE = 4 V, VCSD = 0 V, Tj = -40 C to 150 C -6 6 IOUT = 0 A, VSENSE = 0 V, VCSD = 5 V, VIN = 0 V, Tj = -40 C to 150 C 0 1 IOUT = 0 A, VSENSE = 0 V, VCSD = 0 V, VIN = 5 V, Tj = -40 C to 150 C 0 2 IOUT = 2 A, VSENSE = 0 V, VCSD = 5 V, VIN = 5 V, Tj = -40 C to 150 C 0 1 20 dK1/K1(1) K2 dK2/K2(1) K3 dK3/K3(1) ISENSE0(2) Analog sense leakage current 1440 2250 3630 -15 -9 IOL Open load on-state current detection threshold VIN = 5 V, 8 V < VCC < 18 V ISENSE = 5 A 4 VSENSE Max analog sense output voltage IOUT = 4 A, VCSD = 0 V 5 Doc ID 022514 Rev 2 15 9 % % % A mA V 11/40 Electrical specifications Table 9. VND5E050MCJ-E, VND5E050MCK-E Current sense (8 V < VCC < 18 V) (continued) Symbol Parameter VSENSEH Analog sense output voltage in fault condition(3) VCC = 13 V, RSENSE = 3.9 K 8 V ISENSEH Analog sense output current in fault condition(3) VCC = 13 V, VSENSE = 5 V 9 mA Delay response time tDSENSE1H from falling edge of CS_DIS pin VSENSE < 4 V, 0.5 A < IOUT < 4 A ISENSE = 90% of ISENSE max (see Figure 4) 40 100 s Delay response time from rising edge of CS_DIS pin VSENSE < 4 V, 0.5 A < IOUT < 4 A ISENSE = 10% of ISENSE max (see Figure 4) 5 20 s Delay response time tDSENSE2H from rising edge of INPUT pin VSENSE < 4 V, 0.5 A < IOUT < 4 A ISENSE = 90% of ISENSE max (see Figure 4) 80 250 s Delay response time between rising edge tDSENSE2H of output current and rising edge of current sense VSENSE < 4 V, ISENSE = 90% of ISENSEMAX, IOUT = 90% of IOUTMAX IOUTMAX = 2 A (see Figure 6) 40 s 250 s tDSENSE1L tDSENSE2L Test conditions Delay response time from falling edge of INPUT pin Min. Typ. Max. Unit VSENSE < 4 V, 0.5 A < IOUT < 4 A ISENSE = 10% of ISENSE max (see Figure 4) 80 1. Parameter guaranteed by design; it is not tested. 2. Special characteristic according to ISO/TS 16949. 3. Fault condition includes: power limitation and overtemperature. Figure 4. Current sense delay characteristics INPUT CS_DIS LOAD CURRENT SENSE CURRENT tDSENSE2H 12/40 tDSENSE1L Doc ID 022514 Rev 2 tDSENSE1H tDSENSE2L VND5E050MCJ-E, VND5E050MCK-E Figure 5. Electrical specifications Switching characteristics VOUT tWon tWoff 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% tr tf t INPUT td(on) td(off) t Figure 6. Delay response time between rising edge of output current and rising edge of current sense (CS enabled) VIN tDSENSE2H t IOUT IOUTMAX 90% IOUTMAX t ISENSE ISENSEMAX 90% ISENSEMAX t Doc ID 022514 Rev 2 13/40 Electrical specifications Figure 7. VND5E050MCJ-E, VND5E050MCK-E Output voltage drop limitation Vcc-Vout Tj=150oC Tj=25oC Tj=-40oC Von Iout Von/Ron(T) Figure 8. IOUT/ISENSE vs IOUT Iout / Isense 3000 2800 A 2600 B 2400 2200 C 2000 E 1800 D 1600 1400 1200 1 1,5 2 2,5 3 3,5 IOUT (A) A: Max, Tj = -40 C to 150 C B: Max, Tj = 25 C to 150 C C: Typical, Tj = -40 C to 150 C 14/40 D: Min, Tj = 25 C to 150 C) E: Min, Tj = -40 C to 150 C) Doc ID 022514 Rev 2 4 VND5E050MCJ-E, VND5E050MCK-E Electrical specifications Maximum current sense ratio drift vs load current(1) Figure 9. dk/k(%) 20 15 A 10 5 0 -5 B -10 -15 -20 1 2 IOUT (A) A: Max, Tj = -40 C to 150 C 3 4 B: Min, Tj = 25 C to 150 C 1. Parameter guaranteed by design; it is not tested. Table 10. Truth table Input Output Sense (VCSD = 0 V)(1) Normal operation L H L H 0 Nominal Overtemperature L H L L 0 VSENSEH Undervoltage L H L L 0 0 H X (no power limitation) Cycling (power limitation) Nominal Conditions Overload H VSENSEH Short circuit to GND (power limitation) L H L L 0 VSENSEH Negative output voltage clamp L L 0 1. If the VCSD is high, the SENSE output is at a high-impedance, its potential depends on leakage currents and external circuit. Doc ID 022514 Rev 2 15/40 Electrical specifications Table 11. ISO 7637-2: 2004(E) Test pulse VND5E050MCJ-E, VND5E050MCK-E Electrical transient requirements (part 1) Test levels(1) III IV 1 -75 V -100 V 2a +37 V 3a Number of pulses or test times Burst cycle/pulse repetition time Delays and Impedance Min. Max. 5000 pulses 0.5 s 5s 2 ms, 10 +50 V 5000 pulses 0.2 s 5s 50 s, 2 -100 V -150 V 1h 90 ms 100 ms 0.1s, 50 3b +75 V +100 V 1h 90 ms 100 ms 0.1s, 50 4 -6 V -7 V 1 pulse 100 ms, 0.01 +65 V +87 V 1 pulse 400 ms, 2 5b (2) 1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b. 2. Valid in case of external load dump clamp: 40 V maximum referred to ground. Table 12. Electrical transient requirements (part 2) ISO 7637-2: 2004(E) Test level results Test pulse III IV 1 C C 2a C C 3a C C 3b C C 4 C C 5b(1) C C 1. Valid in case of external load dump clamp: 40 V maximum referred to ground. 16/40 Table 13. Electrical transient requirements (part 3) Class Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. Doc ID 022514 Rev 2 VND5E050MCJ-E, VND5E050MCK-E 2.4 Electrical specifications Waveforms Figure 10. Normal operation Normal operation INPUT Nominal load Nominal load IOUT VSENSE VCS_DIS Figure 11. Overload or short to GND Overload or Short to GND INPUT ILimH > Power Limitation Thermal cycling ILimL > IOUT VSENSE VCS_DIS Doc ID 022514 Rev 2 17/40 Electrical specifications VND5E050MCJ-E, VND5E050MCK-E Figure 12. Intermittent overload Intermittent Overload INPUT Overload ILimH > ILimL > Nominal load IOUT VSENSEH> VSENSE VCS_DIS Figure 13. TJ evolution in overload or short to GND TJ evolution in Overload or Short to GND INPUT Self-limitation of fast thermal transients TTSD THYST TR TJ_START TJ ILimH > Power Limitation < ILimL IOUT 18/40 Doc ID 022514 Rev 2 VND5E050MCJ-E, VND5E050MCK-E 2.5 Electrical specifications Electrical characteristics curves Figure 14. OFF-state output current Figure 15. High-level input current Iloff (nA) Iih (A) 550 5 500 4,5 Vin=2.1V Off State Vcc=13V Vin=Vout=0V 450 400 4 3,5 350 3 300 2,5 250 2 200 1,5 150 100 1 50 0,5 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) 50 75 100 125 150 175 150 175 150 175 Tc (C) Figure 16. Input voltage clamp Figure 17. Low-level input voltage Vicl (V) Vil (V) 7 2 6,8 1,8 lin=1mA 6,6 1,6 6,4 1,4 6,2 1,2 6 1 5,8 0,8 5,6 0,6 5,4 0,4 5,2 0,2 5 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) 50 75 100 125 Tc (C) Figure 18. High-level input voltage Figure 19. Hysteresis input voltage Vihyst (V) Vih (V) 1 4 0,9 3,5 0,8 3 0,7 2,5 0,6 0,5 2 0,4 1,5 0,3 1 0,2 0,5 0,1 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 Tc (C) Tc (C) Doc ID 022514 Rev 2 19/40 Electrical specifications VND5E050MCJ-E, VND5E050MCK-E Figure 20. ON-state resistance vs Tcase Figure 21. ON-state resistance vs VCC Ron (mOhm) Ron (mOhm) 300 100 Iout= 2A Vcc=13V 250 Tc=150C 80 Tc=125C 200 60 150 Tc=25C 40 Tc=-40C 100 20 50 0 0 -50 -25 0 25 50 75 100 125 150 0 175 5 10 15 20 25 30 35 40 Vcc (V) Tc (C) Figure 22. Undervoltage shutdown Figure 23. Turn-on voltage slope Vusd (V) (dVout/dt )On (V/ms) 16 1000 900 14 Vcc=13V RI=6.5 Ohm 800 12 700 10 600 500 8 400 6 300 4 200 2 100 0 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 24. ILIMH vs Tcase Figure 25. Turn-off voltage slope Ilimh (A) (dVout/dt )Off (V/ms) 40 600 550 35 500 Vcc=13V Vcc=13V RI= 6.5 Ohm 450 30 400 350 25 300 250 20 200 150 15 100 50 10 0 -50 -25 0 25 50 75 100 125 150 175 -50 Tc (C) 20/40 -25 0 25 50 75 Tc (C) Doc ID 022514 Rev 2 100 125 150 175 VND5E050MCJ-E, VND5E050MCK-E Figure 26. Electrical specifications High-level CS_DIS voltage Figure 27. CS_DIS voltage clamp Vcsdh (V) Vcsdcl(V) 4 10 3,5 9 8 Icsd = 1 mA 3 7 2,5 6 2 5 1,5 4 3 1 2 0,5 1 0 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) -50 -25 0 25 50 75 100 125 150 175 Tc (C) Figure 28. Low-level CS_DIS voltage Vcsdl (V) 3 2,5 2 1,5 1 0,5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Doc ID 022514 Rev 2 21/40 Application information 3 VND5E050MCJ-E, VND5E050MCK-E Application information Figure 29. Application schematic(1) +5V VCC Rprot CS_DIS Dld CU Rprot INPUT OUTPUT Rprot CURRENT SENSE GND RSENSE VGND CEXT RGND DGND 1. Channel 2 has the same internal circuit as channel 1. 3.1 GND protection network against reverse battery This section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 Solution 1: resistor in the ground line (RGND only) This can be used with any type of load. The following is an indication of how to resize the RGND resistor. 1. RGND 600 mV / (IS(on)max) 2. RGND VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC < 0: during reverse battery situations) is: Equation 1 PD = (-VCC)2 / RGND 22/40 Doc ID 022514 Rev 2 VND5E050MCJ-E, VND5E050MCK-E Application information This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift varies depending on how many devices are on in case of several high-side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see Section 3.1.2). 3.1.2 Solution 2: diode (DGND) in the ground line A resistor (RGND = 1 kshould be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network produces a shift (600 mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift not varies if more than one HSD share the same diode/resistor network. 3.2 Load dump protection Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table. 3.3 MCU I/Os protection If a ground protection network is used and negative transients are present on the VCC line, the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/O pins from latching-up. The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os: Equation 2 -VCCpeak / Ilatchup Rprot (VOHC - VIH - VGND) / IIHmax Calculation example: For VCCpeak = - 100 V, Ilatchup 20 mA and VOHC 4.5 V 5 k Rprot 180 k Recommended values: Rprot =10 k, CEXT = 10 nF. Doc ID 022514 Rev 2 23/40 Application information 3.4 VND5E050MCJ-E, VND5E050MCK-E Current sense and diagnostic The current sense pin performs a double function (see Figure 30: Current sense and diagnostic): Current mirror of the load current in normal operation, delivering a current proportional to the load current according to a known ratio KX. The current ISENSE can be easily converted to a voltage VSENSE by means of an external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5 V minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The current sense accuracy depends on the output current (refer to current sense electrical characteristics Table 9: Current sense (8 V < VCC < 18 V)). Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a maximum current ISENSEH in case of the following fault conditions (refer to Table 10: Truth table): - Power limitation activation - Overtemperature A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high-impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices. Figure 30. Current sense and diagnostic VBAT VCC Main MOSn 41V Overtemperature IOUT/KX ISENSEH Pwr_Lim VSENSEH CS_DIS CURRENT SENSEn RPROT To uC ADC 24/40 OUTn RSENSE VSENSE Doc ID 022514 Rev 2 GND Load VND5E050MCJ-E, VND5E050MCK-E Maximum demagnetization energy (VCC = 13.5 V) Figure 31. Maximum turn-off current versus inductance (for each channel) 100 A B C 10 I (A) 3.5 Application information 1 0,1 1 L (mH) 10 100 A: Tjstart = 150 C single pulse B: Tjstart = 100 C repetitive pulse C: Tjstart = 125 C repetitive pulse VIN, IL Demagnetization Demagnetization Demagnetization t 1. Values are generated with RL = 0 In case of repetitive pulses, Tjstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. Doc ID 022514 Rev 2 25/40 Package and PCB thermal data VND5E050MCJ-E, VND5E050MCK-E 4 Package and PCB thermal data 4.1 PowerSSO-12 thermal data Figure 32. PowerSSO-12 PC board 1. Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias, FR4 area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 m (front and back side), copper areas: from minimum pad lay-out to 8 cm2). Figure 33. Rthj-amb vs PCB copper area in open box free air condition (one channel on) RTHj _amb( C/ W) 70 65 60 55 50 45 40 35 30 0 2 4 6 PCB Cu heat sink area ( cm^ 2) 26/40 Doc ID 022514 Rev 2 8 10 VND5E050MCJ-E, VND5E050MCK-E Package and PCB thermal data Figure 34. PowerSSO-12 thermal impedance junction ambient single pulse (one channel on) ZTH ( C/ W) 100 Footprint 2 cm2 8 cm2 10 1 0,1 0,0001 0,001 0,01 0,1 1 Time ( s) 10 100 1000 Equation 3: pulse calculation formula Z TH = R TH +Z THtp 1 - where = tP/T Figure 35. Thermal fitting model of a double-channel HSD in PowerSSO-12 1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. Doc ID 022514 Rev 2 27/40 Package and PCB thermal data Table 14. 28/40 VND5E050MCJ-E, VND5E050MCK-E Thermal parameters Area/island (cm2) Footprint R1=R7 (C/W) 0.7 R2=R8 (C/W) 2.8 R3 (C/W) 4 R4 (C/W) 2 8 8 8 7 R5 (C/W) 22 15 10 R6 (C/W) 26 20 15 C1=C7 (W.s/C) 0.001 C2=C8 (W.s/C) 0.0025 C3 (W.s/C) 0.05 C4 (W.s/C) 0.2 0.1 0.1 C5 (W.s/C) 0.27 0.8 1 C6 (W.s/C) 3 6 9 Doc ID 022514 Rev 2 VND5E050MCJ-E, VND5E050MCK-E 4.2 Package and PCB thermal data PowerSSO-24 thermal data Figure 36. PowerSSO-24 PC board 1. Layout condition of Rth and Zth measurements (PCB: double layer, Thermal vias, FR4 area = 77 mm x 86 mm, PCB thickness =1.6 mm, Cu thickness =70 m (front and back side), Copper areas: from minimum pad lay-out to 8 cm2). Figure 37. Rthj-amb vs PCB copper area in open box free air condition (one channel on) RTHj_amb(C/W) 55 50 45 40 35 30 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) Doc ID 022514 Rev 2 29/40 Package and PCB thermal data VND5E050MCJ-E, VND5E050MCK-E Figure 38. PowerSSO-24 thermal impedance junction ambient single pulse (one channel on) Equation 4: pulse calculation formula Z TH = R TH +Z THtp 1 - where = tP/T Figure 39. Thermal fitting model of a double-channel HSD in PowerSSO-24 1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. 30/40 Doc ID 022514 Rev 2 VND5E050MCJ-E, VND5E050MCK-E Table 15. Package and PCB thermal data Thermal parameters Area / island (cm2) Footprint R1 = R7 (C/W) 0.4 R2 = R8 (C/W) 2 R3 (C/W) 6 R4 (C/W) 7.7 R5 (C/W) 2 8 9 9 8 R6 (C/W) 28 17 10 C1 = C7 (W.s/C) 0.001 C2 = C8 (W.s/C) 0.0022 C3 (W.s/C) 0.025 C4 (W.s/C) 0.75 C5 (W.s/C) 1 4 9 C6 (W.s/C) 2.2 5 17 Doc ID 022514 Rev 2 31/40 Package and packing information VND5E050MCJ-E, VND5E050MCK-E 5 Package and packing information 5.1 ECOPACK(R) In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 5.2 PowerSSO-12 package information Figure 40. PowerSSO-12 package dimensions 32/40 Doc ID 022514 Rev 2 VND5E050MCJ-E, VND5E050MCK-E Package and packing information PowerSSO-12 mechanical data Table 16. Millimeters Symbol Min. Typ. Max. A 1.25 1.62 A1 0 0.1 A2 1.10 1.65 B 0.23 0.41 C 0.19 0.25 D 4.8 5.0 E 3.8 4.0 e 0.8 H 5.8 6.2 h 0.25 0.5 L 0.4 1.27 k 0 8 X 1.9 2.5 Y 3.6 4.2 ddd 0.1 Doc ID 022514 Rev 2 33/40 Package and packing information 5.3 VND5E050MCJ-E, VND5E050MCK-E PowerSSO-24 package information Figure 41. PowerSSO-24 package dimensions 34/40 Doc ID 022514 Rev 2 VND5E050MCJ-E, VND5E050MCK-E Package and packing information PowerSSO-24 mechanical data Table 17. Millimeters Symbol Min. Typ. Max. A 2.15 2.47 A2 2.15 2.40 a1 0 0.075 b 0.33 0.51 c 0.23 0.32 D 10.10 10.50 E 7.4 7.6 e 0.8 e3 8.8 G 0.1 G1 0.06 H 10.1 h L 10.5 0.4 0.55 N 0.85 10deg X 4.1 4.7 Y 6.5 7.1 Doc ID 022514 Rev 2 35/40 Package and packing information 5.4 VND5E050MCJ-E, VND5E050MCK-E PowerSSO-12 packing information Figure 42. PowerSSO-12 tube shipment (no suffix) Base q.ty Bulk q.ty Tube length ( 0.5) A B C ( 0.1) B C A 100 2000 532 1.85 6.75 0.6 All dimensions are in mm. Figure 43. PowerSSO-12 tape and reel shipment (suffix "TR") Reel dimensions Base q.ty Bulk q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape hole spacing Component spacing Hole diameter Hole diameter Hole position Compartment depth Hole spacing W P0 ( 0.1) P D ( 0.05) D1 (min) F ( 0.1) K (max) P1 ( 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 All dimensions are in mm. End Start Top cover tape No components Components 500mm min Empty components pockets saled with cover tape. User direction of feed 36/40 Doc ID 022514 Rev 2 No components 500mm min VND5E050MCJ-E, VND5E050MCK-E 5.5 Package and packing information PowerSSO-24 packing information Figure 44. PowerSS0-24 tube shipment (no suffix) C Base qty Bulk qty Tube length (0.5) A B C (0.1) B 49 1225 532 3.5 13.8 0.6 All dimensions are in mm. A Figure 45. PowerSSO-24 tape and reel shipment (suffix "TR") Reel dimensions Base qty Bulk qty A (max) B (min) C (0.2) F G (+2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 100 30.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape hole spacing Component spacing Hole diameter Hole diameter Hole position Compartment depth Hole spacing W P0 (0.1) P D (0.05) D1 (min) F (0.1) K (max) P1 (0.1) 24 4 12 1.55 1.5 11.5 2.85 2 End All dimensions are in mm. Start Top cover tape No components Components 500mm min No components 500mm min Empty components pockets sealed with cover tape. User direction of feed Doc ID 022514 Rev 2 37/40 Order codes 6 VND5E050MCJ-E, VND5E050MCK-E Order codes Table 18. Device summary Order codes Package 38/40 Tube Tape and reel PowerSSO-12 VND5E050MCJ-E VND5E050MCJTR-E PowerSSO-24 VND5E050MCK-E VND5E050MCKTR-E Doc ID 022514 Rev 2 VND5E050MCJ-E, VND5E050MCK-E 7 Revision history Revision history Table 19. Document revision history Date Revision Changes 21-Nov-2011 1 Initial release. 18-Sep-2013 2 Updated disclaimer. Doc ID 022514 Rev 2 39/40 VND5E050MCJ-E, VND5E050MCK-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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