HV220/HV20220/HV20320 HV220/HV20220/HV20320 Low Charge Injection 8-Channel High Voltage Analog Switches Features General Description These devices are low charge injection 8-channel high-voltage analog switch integrated circuits (ICs) intended for use in applications requiring high voltage switching controlled by low voltage control signals, such as ultrasound imaging and printers. Input data is shifted into an 8-bit shift register which can then be retained in an 8-bit latch. To reduce any possible clock feed-through noise, Latch Enable Bar (LE) should be left high until all bits are clocked in. Using HVCMOS technology, these switches combine high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. HVCMOS(R) technology for high performance Very low quiescent power dissipation - 10A Output on-resistance typically 22 ohms Low parasitic capacitances DC to 10MHz analog signal frequency -60dB typical output off isolation at 5MHz CMOS logic circuitry for low power Excellent noise immunity On-chip shift register, latch and clear logic circuitry Flexible high voltage supplies These ICs are suitable for various combinations of high voltage supplies, e.g., VPP/VNN : +50V/-150V, or +100V/-100V.B Applications Medical ultrasound imaging Piezoelectric transducer drivers LATCHES Block Diagram LEVEL SHIFTERS OUTPUT SWITCHES D LE CL SW0 D LE CL SW1 D LE CL SW2 D LE CL SW3 D LE CL SW4 D LE CL SW5 D LE CL SW6 D LE CL SW7 DIN CLK 8 BIT SHIFT REGISTER DOUT VDD LE CL V NN V PP B021706 A011705 1 HV220/HV20220/HV20320 Absolute Maximum Ratings* VDD Logic power supply voltage -0.5V to +15V VPP - VNN Supply voltage 220V VPP Positive high voltage supply -0.5V to VNN +200V VNN Negative high voltage supply +0.5V to -200V Logic input voltages -0.5V to VDD +0.3V VNN to VPP Analog Signal Range Peak analog signal current/channel Storage temperature 3.0A -65C to +150C Power dissipation: 28-Lead PLCC 1.2W 48-Lead TQFP 1.0W 26-Lead BCC 1.0W 25-Lead FPBGA 1.0W * Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Ordering Information Package Options Device HV20220 HV20320 HV220 28-Lead PLCC 48-Lead TQFP HV20220PJ HV20220FG HV20220PJ-G HV20220FG-G HV20320PJ - HV20320PJ-G - - 26-Lead BCC 25-Lead FPBGA - - - - - HV220GA HV220B1-G HV220GA-G -G indicates the part is RoHS compliant (Green) Operating Conditions Symbol Parameter VDD Logic power supply voltage1, 3 VPP supply1, 3 Positive high voltage Value 4.5V to 13.2V 40V to VNN+ 200V supply1, 3 VNN Negative high voltage VIH High-level input voltage VDD -1.5V to VDD VIL Low-level input voltage 0V to 1.5V VSIG Analog signal voltage peak to peak VNN +10V to VPP -10V2 Operating free air-temperature 0C to 70C TA -40V to -160V Notes: 1 Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. 2 VSIG must be V NN VSIG VPP or floating during power up/down transition. 3 Rise and fall times of power supplies VDD, VPP , and VNN should not be less than 1.0msec. B021706 2 HV220/HV20220/HV20320 Truth Table D0 D1 D2 D3 D4 D5 D6 D7 LE CL SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 L L L L L L L L L L L L L L L L L H OFF ON L H X X L L L L L L L L L L L L L L L L H X L H L H L H L H L H L H L H X X X X X X X X X X X X X X OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON HOLD PREVIOUS STATE OFF OFF OFF OFF OFF OFF OFF OFF Notes: 1. The eight switches operate independently. 2. Serial data is clocked in on the L to H transition CLK. 3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flows through the latch. 4. DOUT is high when data in shift register 7 is high. 5. Shift register clocking has no effect on the switch states if LE is H. 6. The clear input overrides all other inputs. B021706 3 HV220/HV20220/HV20320 Electrical Characteristics DC Characteristics (over recommended operating conditions unless otherwise noted) Characteristics Small Signal Switch (ON) Resistance Sym 0C min max RONS Small Signal Switch (ON) Resistance Matching RONS Large Signal Switch (ON) Resistance RONL Switch Off Leakage Per Switch ISOL +25C typ* max 30 26 38 48 ISIG = 5mA VPP = 40V, 25 22 27 32 ISIG = 200mA VNN = -160V 25 22 27 30 ISIG = 5mA VPP = 100V, 18 18 24 27 ISIG = 200mA VNN = -100V 23 20 25 30 ISIG = 5mA VPP = 160V, 22 16 25 27 ISIG = 200mA VNN = -40V 20 5.0 20 20 min +70C min max 15 Units ohms % ohms Test Conditions ISW = 5mA, VPP = 100V, VNN = -100V VSIG = VPP - 10V, ISIG = 1A 5.0 1.0 10 15 A VSIG = VPP - 10V and VNN +10V DC Offset Switch Off 300 100 300 300 mV RL = 100 DC Offset Switch On 500 100 500 500 mV RL = 100K Pos. HV Supply Current IPPQ 10 50 A ALL SWs OFF Neg. HV Supply Current INNQ -10 -50 A ALL SWs OFF Pos. HV Supply Current IPPQ 10 50 A ALL SWs ON ISW = 5mA Neg. HV Supply Current INNQ -10 -50 A ALL SWs ON ISW = 5mA 3.0 2.0 A VSIG duty cycle 0.1% Switch Output Peak Current Output Switch Frequency IPP Supply Current INN Supply Current 3.0 2.0 50 fSW IPP INN KHz Duty Cycle = 50% VPP = 40V, VNN = -160V 6.5 7.0 8.0 4.0 5.0 5.5 4.0 5.0 5.5 VPP = 160V, VNN = -40V 6.5 7.0 8.0 VPP = 40V, VNN = -160V 4.0 5.0 5.5 4.0 5.0 5.5 mA mA VPP = 100V, VNN = -100V 50KHz Output Switching Frequency with no load VPP = 100V, VNN = -100V VPP = 160V, VNN = -40V Logic Supply Average Current IDD 4.0 4.0 4.0 mA Logic Supply Quiescent Current IDDQ 10 10 10 A Data Out Source Current ISOR 0.45 0.45 0.70 0.40 mA VOUT = VDD - 0.7V Data Out Sink Current ISINK 0.45 0.45 0.70 0.40 mA VOUT = 0.7V Logic Input Capacitance CIN 10 10 10 fCLK = 5MHz, VDD = 5.0V pF * Typical values are only for HV202/HV203 B021706 4 HV220/HV20220/HV20320 Electrical Characteristics AC Characteristics Characteristics (over operating conditions VDD = 5V, unless otherwise noted) Sym 0C min +25C max min typ* +70C max min max Units Set Up Time Before LE Rises tSD 150 150 150 ns Time Width of LE tWLE 150 150 150 ns Clock Delay Time to Data Out tDO Time Width of CL tWCL 150 150 Set Up Time Data to Clock tSU 15 15 Hold Time Data from Clock th 35 35 150 150 8.0 150 Test Conditions ns 150 ns 20 ns 35 ns Clock Freq fCLK 5.0 5.0 5.0 MHz Clock Rise and Fall Times tr, tf 50 50 50 ns Turn On Time tON 5.0 5.0 5.0 s VSIG = VPP -10V, RL = 10K Turn Off Time tOFF 5.0 5.0 5.0 s VSIG = VPP -10V, RL = 10K 20 20 20 20 20 20 20 20 20 Maximum VSIG Slew Rate Off Isolation Switch Crosstalk dv/dt KO KCR Output Switch Isolation Diode Current -30 -30 -58 -58 -60 -60 -33 -70 300 IID 50% duty cycle fDATA = fCLK/2 VPP = 160V, VNN = -40V V/ns VPP = 100V, VNN = -100V VPP = 40V, VNN = -160V -30 dB f = 5MHz, 1K//15pF load -58 dB f = 5MHz, 50 load -60 dB f = 5MHz, 50 load 300 mA 300ns pulse width, 2.0% duty cycle 300 Off Capacitance SW to GND CSG(OFF) 5.0 17 5.0 12 17 5.0 17 pF 0V, 1MHz On Capacitance SW to GND CSG(ON) 25 50 25 38 50 25 50 pF 0V, 1MHz Electrical Characteristics AC Characteristics (over operating conditions VDD = 5V, unless otherwise noted) Characteristics +25C Sym min Output Voltage Spike Units typ* +VSPK 150 - VSPK 150 +VSPK 150 - VSPK 150 +VSPK 150 - VSPK 150 Charge Injection VPP = 40V, VNN = -160V, RL = 50 mV VPP = 100V, VNN = -100V, RL = 50 VPP = 160V, VNN = -40V, RL = 50 820 Q Test Conditions max VPP = 40V, VNN = -160V, VSIG = 0V 600 pC 350 VPP = 100V, VNN = -100V, VSIG = 0V VPP = 160V, VNN = -40V, VSIG = 0V * Typical values are only for HV202/HV203 B021706 5 HV220/HV20220/HV20320 Test Circuits VPP -10V VPP -10V RL ISOL 10K VOUT VOUT 100K VNN +10V VPP VPP VDD VNN VNN GND 5V RL VPP VPP VDD VNN VNN GND Switch OFF Leakage 5V VPP VPP VDD VNN VNN GND DC Offset ON/OFF 5V TON /TOFF Test Circuit VIN = 10 VP-P @5MHz VIN = 10 VP-P @5MHz VSIG IID VOUT 50 NC VNN RL 50 VPP VPP VDD VNN VNN GND KO = 20Log 5V VPP VPP VDD VNN VNN GND 5V VPP VPP VDD VNN VNN GND VOUT VIN KCR = 20Log Isolation Diode Current OFF Isolation 5V VOUT VIN Crosstalk +VSPK VOUT VOUT VOUT -V SPK 1000pF 50 VSIG 1K VPP VPP VDD VNN VNN GND 5V RL VPP VPP VDD VNN VNN GND 5V Q = 1000pF x VOUT Charge Injection Output Voltage Spike B021706 6 HV220/HV20220/HV20320 Logic Timing Waveforms DN-1 DN+1 DN DATA IN 50% 50% LE 50% 50% t WLE t SD CLOCK 50% 50% t t SU t DATA OUT h DD 50% t VOUT OFF t ON OFF 90% (TYP) 10% ON 50% CLR 50% t WCL Block Diagram LATCHES LEVEL SHIFTERS OUTPUT SWITCHES D LE CL SW0 D LE CL SW1 D LE CL SW2 D LE CL SW3 D LE CL SW4 D LE CL SW5 D LE CL SW6 D LE CL SW7 DIN CLK 8 BIT SHIFT REGISTER DOUT VDD LE CL V NN V PP B021706 7 HV220/HV20220/HV20320 Typical Performance Curves for HV20220 & HV20320 IDD vs Clock Frequency VDD = 5.0V, VPP/VNN = 100V, TA = 0C to 70C Off-Isolation vs. Signal Voltage Frequency VDD = 5.0V, VPP/VNN = 100V -80.0 3.0 -75.0 Off-Isolation (dB) IDD Current (mA) TA = 70C 2.0 1.0 -70.0 -65.0 -60.0 TA = 0C -55.0 -50.0 0.0 10 1000 100 10000 1.0 10.0 CLK Frequency (KHz) Signal Voltage Frequency (MHz) RON vs. Ambient Temperature TA RON vs. VPP/VNN VDD = 5.0V, VPP/VNN = 100V VDD = 5.0V 40.0 50.0 TA = 125C ISW = 5mA 40.0 RON (ohms) @5mA RON (ohms) 30.0 20.0 ISW = 200mA 10.0 TA = 85C 30.0 TA = 25C 20.0 TA = 0C 10.0 0 0 -50 -25 0 25 50 75 100 125 150 Ambient Temperature (oC) VPP 40V 60V 80V 100V 120V 140V 160V VNN -160V -140V -120V -100V -80V -60V -40V TDO vs. Ambient Temperature TA IPP/INN vs. Output Switching Frequency VPP/VNN = 100V VDD = 5.0V, VPP/VNN = 100V 5 100 TA = 0 o C IPP/INN Average Current (mA) VDD = 5.0V TDO (ns) 80 60 VDD = 13.5V 40 20 0 TA = 25oC 4 TA = 70oC TA = 125oC 3 2 1 0 -50 -25 0 25 50 75 100 0 125 25 50 75 100 125 150 Output Switching Frequency (KHz) Ambient Temp TA (C) B021706 8 9 B021706 HV220/HV20220/HV20320 HV202/HV203 28-Pin J-lead Package Outline Pin Configuration 0.450 0.005 (11.430 0.127) D1 Pin #1 B D 0.480 0.010 (12.192 0.254) 0.027 0.003 (0.6858 0.0762) HV202 28 Pin J-Lead Pin Function 1 SW3 2 SW3 3 SW2 4 SW2 5 SW1 6 SW1 7 SW0 8 SW0 9 N/C 10 VPP 11 N/C 12 VNN 13 GND 14 VDD Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Function N/C DIN CLK LE CL DOUT SW7 SW7 SW6 SW6 SW5 SW5 SW4 SW4 HV203 28 Pin J-Lead Pin Function 1 SW3 2 SW3 3 SW2 4 SW2 5 SW1 6 SW1 7 SW0 8 SW0 9 VPP 10 VNN 11 N/C 12 GND 13 VDD 14 N/C Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Function N/C DIN CLK LE CL DOUT SW7 SW7 SW6 SW6 SW5 SW5 SW4 SW4 e 0.050 0.010 (1.270 0.254) 0.1725 0.0075 (4.3815 0.1905) A A2 0.020 min. (0.508) 0.410 0.010 (10.414 0.254) B.C. of Bend Radii Q 0.110 0.010 (2.794 0.254) 25 24 23 22 21 20 19 26 18 27 17 28 16 1 15 2 14 3 13 4 12 5 6 7 8 9 10 11 Measurement Legend = Top View 28-Pin J-Lead Package Dimensions in Inches (Dimensions in Millimeters) B021706 10 Pin Configuration 48-Pin TQFP 0.024 0.008 (0.610 0.2032) D, E 0.354 0.010 (8.992 0.254) L 0.354 0.010 (8.992 0.254) Pin #1 0.275 0.004 (6.985 0.102) D1, E1 0 - 7 0.275 0.004 (6.985 0.1016) A A2 0.055 0.004 (1.397 0.102) 0.020 BSC (0.508) 0.059 0.004 (1.4986 0.102) 0.039 TYP. (0.991) 48-Pin TQFP Pin Function 1 SW5 2 N/C 3 SW4 4 N/C 5 SW4 6 N/C 7 N/C 8 SW3 9 N/C 10 SW3 11 N/C 12 SW2 13 N/C 14 SW2 15 N/C 16 SW1 17 N/C 18 SW1 19 N/C 20 SW0 21 N/C 22 SW0 23 N/C 24 VPP Pin 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Function VNN N/C N/C GND VDD N/C N/C N/C DIN CLK LE CLR DOUT N/C SW7 N/C SW7 N/C SW6 N/C SW6 N/C SW5 N/C Pin #1 Pin 1 Measurement Legend = Dimensions in Inches (Dimensions in Millimeters) Pin 12 top view 48-pin TQFP 11 B020906 B021706