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Power Architecture Products
Power Architecture 460SX processor
Specifications
CPU Complex
• Power Architecture 464 processor core
• Up to 1.2 GHz/2400 DMIPS
• 32KB I-cache/D-cache with parity
• 512KB L2 cache with parity
Memory and Bus Architecture
• 128-bit, 200 MHz, 2-way Crossbar Local Bus
– High bandwidth and Low Latency segments
– 12.8GB/s combined peak bandwidth
• Second HB Bus, 6.4GB/s, for RAID 5, RAID 6, and Security
• DDR SDRAM Controller with ECC
– 32/64-bit DDR2 up to DDR800
– Data Saver, for data or power saving, sustains
memory refresh with battery backup
• 512KB L2 Cache may also be used as SRAM
• 32-bit, 100-MHz On-chip Peripheral Bus (OPB)
• External Bus Controller
– Interface to Flash ROM, Boot, or other devices (4 total)
System Resources
• High Bandwidth 3-channel DMA engine
High Speed and Inter-Chip Connectivity
• Gen2 PCI Express Multiport Bridge (5 Gb/s per Lane)
– (1) PCI-E, 8-Lane Root/End point, ver2.0
– (2) PCI-E, 4-Lanes Root/End point, ver2.0 or
(1) PCI-E 8-Lane Root/End point, ver2.0
• 2 IIC, 32 GPIOs, Interrupt Controller
Network Connectivity
• Four 10/100/1G Ethernet Ports, two with TCP/IP
assist hardware and QoS
– Jumbo frame, interrupt coalescence, CRC 32
• Two UART serial ports
Special Functionality
• RAID 5 and RAID 6 Acceleration Hardware
• Network IPSec/SSL Turbo Security Engine
Power
• 10.5W typical power @ 1 GHz
Target Applications
• RAID controllers
• Storage Area Networking (SAN)
• iSCSI
• Network Attached Storage (NAS)
• Other embedded storage and networking applications
Package (FC-PBGA)
N = 29mm2 lead free
Part Name
RAID & Security
R = RAID 5/6 and Security
A = No Security / No RAID
Revision Level
B = 1.1
Processor Speed
833MHz, 1.0GHz
and 1.2GHz
Interrupt
Controller External
Bus
Controller
ISC
32KB I2O
DMAPKA TRNGMCMAL8
BSC
GPT
TAH IPv6 QoS
OPB
Bridge
GPIO
PowerPC 464 Core
32K
I-Cache
32K
D-Cache
On-Chip Peripheral Bus (OPB) Up to 100MHz
PPC460SX-RNB1200
System Logic
Clocks,
PWR Mgt
Trace/PLLs
Mem Queue
DDR Cntl
MSI
Term
RAID5/6
Assist
PCI-E
IRQ
Handler
512KB L2 Cache/SRAM
PLB to PLB
Bridge
UART (2)
IIC (2)
NAND
Flash Ctrl
10/100/1G
Ethernet
MAC (2)
10/100/1G
Ethernet
MAC (2)
Turbo
Security
Engine
(2) x4 PCI-E or
(1) x8 PCI-E2.0
Root/End Point
SDRAM 64-Bit
DDR2-800
X8 PCIe 2.0
Root/End
Point
3 Ch DMA
RAID5/6
Assist
AES
(Bulk)
DIF Hashing
Primary Processor Local Bus, 128-Bit, 200MHz
Primary High Bandwidth Slave Segment
Primary Low Latency Slave Segment
2-Way
Master
Arbiter
Secondary High Bandwidth Slave Segment
Secondary Processor Local Bus, 128-Bit, 200MHz
Master
Arbiter