Preliminar
y
data sheet TLE 5224 G2
Semiconductor Group Page 03.02.97
1
Smart Two Channel Low-Side Switch
Features Product Summary
• Power limitation
• Overtemperature monitoring
• Overload protection
• Short circuit protection
• Diagnostic feedback
• Overvoltage protection
• µC compatible input
• Electrostatic discharge (ESD) protection
Application
• All kinds of resistive and inductive
loads (relays,electromagnetic valves)
• µC compatible power switch for 12 and 24 V applications
• Solenoid control switch in automotive and industrial
control systems
General description
Double channel Low-Side-Switch in Smart Power Technolog y (SPT) with two seperate inputs and two
open drain DMOS output stages. The TLE 5224 G2 is fully protect ed by embedded protect ion functi-
ons and designed for automotive and industrial applications.
Block Diagram
Supply voltage VS 6.5 - 45 V
Drain source voltage VDS(AZ)max 65 V
On resistance RON(typ) 0.25 Ω
Output current ID2 x 4 A
Nom. output current ID(ISO) 2 x 1.3 A
P-DSO-24-3
VS
LOGIC
LOGIC
GND
ST2
IN2
ST1
IN1
ENA Open Lo ad
Overload
Open Load
Overload
RPD
RPD
Thermal overload
TLE 5224 G2
Vbb
Vbb
Load 1
Load 2
OUT2
OUT1
Preliminar
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data sheet TLE 5224 G2
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Block Diagram of Open Load Detection
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data sheet TLE 5224 G2
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Maximum Ratings for Tj = – 40°C to 150°C
Parameter Symbol Values Unit
Supply voltage
V
S- 0.3 ... + 60 V
Supply voltage operational range
V
S+ 4.8 ... + 45 V
Continuous drain source voltage (OUT1, OUT2)
V
DS 45 V
Input voltage IN1, IN2, ENA
V
IN - 0.3 ... + 6 V
Status output voltage
V
ST - 0.3 ... + 32 V
Operating temperature range
Storage temperature range
T
j
T
stg
- 40 ... + 150
- 55 ... + 150 °C
Output current per channel
I
D(lim) self limited A
Status output current
I
ST - 5 ... + 5 mA
Inductive load switch-off energy dissipation,
single pulse Tj= 150°C
E
AS 400 mJ
Thermal resistance junction - case1
junction - ambient
R
thJC
R
thJA
12
75 K/W
Pin Definitions and Functions
Pin Configuration(top view)
Pin Symbol Function
1 IN1 Control input channel 1
2 ST2 Status output channel 2
3 OUT2 Power output channel 2
4 N.C. Not connected, cooling
5,6,7,8 GND Ground, cooling
9,10 N.C. Not connected, cooling
11 ENA Enable input for both channels
12 VSSupply voltage
13,14,15,16 N.C. Not connected, cooling
17,18,19,20 GND Ground, cooling
21 N.C. Not connected, cooling
22 OUT1 Power output channel 1
23 ST1 Status output channel 1
24 IN2 Control input channel 2
1 Case = Pin 5 to 8 and 17 to 20.
Additionally the pins not connected (N.C.) have to be connected to the ground plane used as
thermal heatsink to achieve the best thermal resistance.
Preliminar
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data sheet TLE 5224 G2
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Electrical Characteristics
Parameter and Conditions Symbol Values Unit
VS = 6.5 to 45 V ; T
j
= - 40 °C to + 150 °C
(unless otherwise specified) min typ max
1. Power Supply (VS)
Supply current (Outputs ON) VS = 45 V
VS ≤ 18 V
I
S25
4mA
Supply current (Output OFF) VS ≤ 18 V
I
S12mA
Operating voltage
V
S4.8 45 V
2. Power Outputs
ON state resistance; Tj = 25 ° C
ID = 4A; VS ≥ 9.5 V Tj = 150°C
R
DS(ON) 0.25 0.5 Ω
Z-Diode clamping voltage (OUT1, OUT2)
V
DS(AZ) 45 65 V
Pull down resistor Tj = 25 ° C
Tj ≤ 125 ° C
R
PD 14
10 20 26
40 kΩ
Output on delay time 2 ID = 0.2 A
Output off delay time 2 I
D = 2 A
Output on fall time 2 ID = 0.2 A
Output off rise time 2ID = 2 A
Output off status delay time 2 I
D = 2 A
Output on status delay time 2
3
4
Overload switch-off delay time 3
t
on
t
off
t
fall
t
rise
t
4
t
5
t
DSO
10
20
50
25
50
20
25
40
40
60
50
150
µs
3. Digital Inputs (IN1, IN2, ENA)
Input low voltage
V
INL - 0.3 1.0 V
Input high voltage
V
INH 2.0 6.0 V
Input voltage hysteresis
V
INHys 0.2 0.6 V
Input pull down current VIN =5 V; VS ≥ 9 V
I
IN 50 100 140 µA
Enable pull down current VENA =5 V; VS ≥ 9 V
I
ENA 15 30 45 µA
4. Digital Status Outputs (ST1, ST2), open Drain
Output voltage low IST = 2 mA
V
STL 0.5 V
Leakage current high
I
STH 10 µA
2
See timing diagram, resitive load condition; VS ≥ 9 V
3
This parameter will not be tested but assured by design
4
Time till status valid after switching on or error detection
Preliminar
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data sheet TLE 5224 G2
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5
Electrical Characteristics
Parameter and Conditions Symbol Values Unit
VS = 6.5 to 45 V ; T
j
= - 40 °C to + 150 °C
(unless otherwise specified) min typ max
5. Diagnostic Functions
Open load detection voltage VS ≤ 18 V
(Output OFF) VS = 12 V
V
DS(OL) 0.51*VS
6.2 0.58*VS
7.0 V
Open load compare voltage 518V > VDSC > 0.65*VS
V
DS(OL)C VDSC-1.6 VDSC-0.9 V
Open load detection current (Output ON)
I
D(OL) 100 500 mA
Overload threshold current Tj = 25°C
(VS ≥ 9.5 V) Tj = 150°C
I
D(lim) 5.25
4A
Overtemperature monitoring threshold 6
Hysteresis
T
th
T
hys
170 10 200 °C
K
Application Description
This IC is specially designed to drive inductive loads (relays, electromagnetic valves). Integrated
clamp-diodes limit the output voltage peak when switching off an inductive load.
For the detection of errors there are two status outputs, which monitor the following errors by logic
levels:
− thermal overload monitoring,
− open and short load to ground in active an inactive mode,
− overloading of output (also shorted load to supply) in active mode.
Circuit Description
Input Circuits
The control and enable inputs, all active high, consist of Schmitt triggers with hysteresis. All inputs
are connected with pull-down current sources. Not connected inputs are interpreted as "low“.
Switching Stages
The power outputs consist of a DMOS power transistor with open drain. T he output stag es are short-
load-protect ed throug hout the operating rang e. I nteg rat ed clamp-diodes lim it voltag e spik es produced
when inductive loads are discharged.
Protective Circuit
The output s are protected against current overload. Ther e is no protection against r everse polarity of
the supply voltage.
5
VDSC is the output voltage of the other channel used for open load compare detection
6
This parameter will not be tested but assured by design
Preliminar
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data sheet TLE 5224 G2
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Error Detection
The status output signal of the switching stages at normal operation is LOW = OFF; HIGH = ON. In
case of any error the status outputs are set according to the table below. If current overload occurs,
the error condition is stored in an internal register and the output is shutdown. To reset this register
the control input of the affected channel has to be switched off and then on again. The state of the
error detection circuit is directly dependent on the input status.
In case of thermal overload the output stage will not be switched off but it will be monitored via the
status outputs.
Open load is detected for both on- and off-modus.
In the on-modus the load current is monitored. If it drops below the specified threshold open load is
detected. In the off mode, the ouput voltage is monitored.
An open load condition is detected when the output voltage of a given channel is below 55
% of the
supply voltage VS. Also the output voltages of two outputs are compaired against each other in off
condition with a fixed offset of typ. 1.25 V to recognize GND bypasses. To suppress fault diagnosis
during the flyback phase of the compared output, the diagnostic circuit includes a latch function. Re-
set of this latch is done at end of the flyback phase, additionally it can be reseted by a low signal on
the enable input and by a high signal of the input signal. See also the block diagramm of open load
detection.
Diagnostic Table
Operating Condition Inputs Power Outputs Status Outputs
ENA IN1 IN2 OUT1 OUT2 ST1 ST2
Normal Function
L
H
H
H
H
X
L
H
L
H
X
L
L
H
H
OFF
OFF
ON
OFF
ON
OFF
OFF
OFF
ON
ON
L
L
H
L
H
L
L
L
H
H
Thermal Overload X
L
H
L
X
H
L
X
H
OFF
OFF
ON
OFF
OFF
ON
L
L
L
L
L
L
Open Load Channel 1 X
L
H
L
H
H1) OFF
OFF
ON 1) H
H
L1)
Open Load Channel 2 X
L
H1) L
H
H1) OFF
OFF
ON 1) H
H
L
Overload Channel 1 L
H
H
X
L
H1) OFF
OFF
OFF 1) L
L
L1)
Overload Channel 2 L
H
H1) X
L
H1) OFF
OFF
OFF 1) L
L
L
1) see normal function
Preliminar
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data sheet TLE 5224 G2
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Test Circuit
ST1
V
Application Circuit
TLETLE
The blocking capacitor C is recommended to avoid critical negative voltage spikes on VS in case of
battery interruption during OFF-commutation.
Preliminar
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data sheet TLE 5224 G2
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8
Timing Diagram
V
VINH
Vt
VDS
t
VST
90%
10%
tfall
ton
trise
t4t
t5
VS
INL
IN
toff
Overload Current versus temperature
3
3,5
4
4,5
5
5,5
6
6,5
7
-50 -25 0 25 50 75 100 125 150
Junction Temperature [ C ]
ID(lim) [ A ]
Preliminar
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data sheet TLE 5224 G2
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9
Package and ordering code
all dimensions in mm
P - DSO - 24 - L16
Ordering code
Q67006-A9253
(Dual-in-line package, small-outline)
24 B 24 DIN 41870 T17
1.27
123 645 789101112
24 23 22 1921 20 18 17 16 15 14 13
0.36
+0.13
0.76
max
-0.2
15.4
-0.2
2.45
0.1
min
-0.2
7.6
10.3
±0.3
0.25
+0.07
2.65
max
