RT9285A/B
Preliminary
1
DS9285A/B-02 August 2007www.richtek.com
Features
lVIN Operating Range : 2.7V to 5.5V
lUp to 85% Efficiency
l22V Internal Power N-MOSFET
l1MHz Switching Frequency
lBuilt-in Diode
lDigital Dimming with Zero-Inrush
lInput UVLO Protection
lOutput Over Voltage Protection
lInternal Soft Start and Compensation
lTSOT-23-6 and 8-Lead WDFN Package
lRoHS Compliant and 100% Lead (Pb)-Free
Applications
lCellular Phones
lDigital Cameras
lPDAs and Smart Phones
lPorbable Instruments
lMP3 Player
lOLED Power
Ordering Information
General Description
The RT9285 is a high frequency asynchronous boost
converter with internal diode, which can support 2 to 5
White LEDs for backlighting and OLED power supply. The
Internal soft start function can reduce the inrush current.
The device operates with 1MHz fixed switching frequency
to allow small external components and to simplify possible
EMI problems. The device comes with 20V over voltage
protection to allow inexpensive and small-output capacitors
with lower voltage rating. The LED current is initially set
with the external sense resistor RSET, and the feedback
voltage is 250 mV. Tiny package type TSOT-23-6 and
WDFN-8L 2x2 packages provide the best solution for PCB
space saving and total BOM cost.
Tiny Package, High Performance, Diode Embedded White
LED Driver
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area, otherwise visit our website for detail.
Note :
Richtek Pb-free and Green products are :
}RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
}Suitable for use in SnPb or Pb-free soldering processes.
}100%matte tin (Sn) plating.
Pin Configurations
(TOP VIEW)
Note : There is no pin1 indicator on top mark for TSOT-23-6
type, and pin 1 will be lower left pin when reading top mark
from left to right.
TSOT-23-6
WDFN-8L 2x2
RT9285
Package Type
QW : WDFN-8L 2x2 (W-Type)
J6 : TSOT-23-6
Operating Temperature Range
P : Pb Free with Commercial Standard
G : Green (Halogen Free with Commer-
cial Standard)
Dimming
A : Digital Pulse Dimming
B : PWM Clock Dimming
AGND
LX FB
EN
VOUT
NC 7
6
5
1
2
3
4
8
PGND VDD
9
LXGNDFB
ENVOUTVDD
4
23
56
1
RT9285A/B Preliminary
2DS9285A/B-02 August 2007www.richtek.com
Functional Pin Description
Pin No.
WDFN-8L TSOT-23-6
Pin Name
Pin Function
1 -- AGND Analog Ground Pin.
2 1 LX LX Pin. Connect this Pin to an inductor. Minimize the track area to
reduce EMI.
-- 2 GND Ground Pin.
3, Exposed Pad (9)
-- NC No Internal Connection.
4 -- PGND Power Ground Pin.
5 6 VDD
Supply Input Voltage Pin. Bypass 1uF capacitor to GND to reduce the
input ripple.
6 5 VOUT Output Voltage pin. The pin internally connects to OVP diode to limit
output voltage while LEDs are disconnected.
7 4 EN Chip Enable (Active High). Note that this pin has an internal pull-
down
resistance around 300kΩ.
8 3 FB Feedback Pin. Series connecting a resistor between WLED and
ground as a current sense. Sense the current feedback voltage to set
the current rating.
-- GND Exposed pad should be soldered to PCB board
and connected to
GND.
Typical Application Circuit
LX
GND
VDD
FB
VOUT
RT9285A/B
EN
C1
1uF
RSET
L1
10uH to 22uH
12.5
C2
0.22uF to 1uF
Chip Enable
VIN
2.7V to 5.5V
RT9285A/B
Preliminary
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DS9285A/B-02 August 2007www.richtek.com
Function Block Diagram
Operation
Soft-Start
The Soft-Start function is made by clamping the output
voltage of error amplifier with another voltage source that
is increased slowly from zero to near VIN in the Soft-Start
period. Therefore, the duty cycle of the PWM will be
increased from zero to maximum in this period. The soft-
start time is decided by a timer of 1.5ms. The charging
time of the inductor will be limited as the smaller duty so
that the inrush current can be reduced to an acceptable
value.
Over Voltage Protection
The Over Voltage Protection is detected by a junction
breakdown detecting circuit. Once VOUT goes over the
detecting voltage, LX pin stops switching and the power
NMOS is turned off. Then, the VOUT is clamped to be near
VOVP.
LED Current Setting
The RT9285 regulates the LED current by setting the current
sense resistor (RSET) connecting to feedback and ground.
The internal feedback reference voltage is 0.25V. The LED
current can be set from following equation easily.
ILED (mA) = 0.25/RSET
Table 1. RSET Value Selection
ILED (mA) R
SET (Ω)
5 49.9
10 24.9
12 21
15 16.5
20 12.4
In order to have an accurate LED current, precision resistors
are preferred (1% is recommended). The table for RSET
selection is shown below.
Digital Pulse Dimming (RT9285A)
The digital pulse dimming is implemented by checking
the low-level duration time of EN pin. As the duration time
is in the range of TUP, the LED current will increase 1/16. If
the duration time is in the range of TDOWN, the LED current
will decrease 1/16. The high-level duration time of EN pin
needs larger than TDELAY to make sure the logic can be
detected correctly. As the LED current is set to MAX (16/
16), it will keep MAX until the decreasing signal is
detected. On the other hand, as the LED current is set to
MIN (1/16), it will keep MIN until the increasing signal is
detected. When the chip turns on, the initial state of LED
current is MAX.
PWM
Logic
OCP
Current
Sense
1.0MHz OSC
Slope
Compensation
+
-
+
-
Soft
Start/Cla
mping
Timer
Dimming
Controller
UVLO/P
GOOD
OVP LX
GND
FB
EN
VOUT
VDD
VREF
RT9285A/B Preliminary
4DS9285A/B-02 August 2007www.richtek.com
PWM Dimming (RT9285B)
For controlling the LED brightness, the RT9285B can perform the dimming control by applying a PWM signal to EN pin.
A low pass filter is implemented inside chip to reduce the slew rate of ILED to prevent the audio noise. The average LED
current is proportional to the PWM signal duty cycle. The magnitude of the PWM signal should be higher than the
maximum enable voltage of EN pin, in order to let the dimming control perform correctly.
EN
IWLED
IWLED, AVG = Duty of EN
Figure 2
Figure 1
Feedback Voltage
Time Symbol
Increase 0.5µs to 75µs
TUP
Decrease 180µs to 300µs
TDOWN
Delay between steps
> 0.5µs TDELAY
Shutdown > 1ms TSHDN
Table 2
Current Limiting
The current flow through the inductor as charging period is detected by a current sensing circuit. As the value over the
current limiting, the NMOS will be turned-off so that the inductor will be forced to leave charging stage and enter discharging
stage. Therefore, the inductor current will not increase over the current limiting.
TDOWM TUP
TDELAY
TSHDN
EN
IWLED
Shut-down100% 15/16 100% Shut-down
RT9285A/B
Preliminary
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DS9285A/B-02 August 2007www.richtek.com
Electrical Characteristics
(VIN = 3.7V, FREQ left floating, TA = 25°C, unless otherwise specification)
Parameter Symbol
Test Condition Min Typ Max Units
System Supply Input
Operation voltage Range V
IN 2.7 -- 5.5 V
Under Voltage Lock Out V
UVLO 1.7 2 2.3 V
Quiescent Current I
Q
FB = 1.5V, No switch -- 300 450 µA
Supply Current I
IN FB = 0V, Switch -- -- 2 mA
Shut Down Current I
SHDN V
EN < 0.4V -- 2 5 uA
Output
Line Regulation V
IN = 3V to 4.3V -- -- 3 %
Oscillator
Operation Frequency f
OSC -- 1 -- MHz
Maximum Duty Cycle 85 90 -- %
Reference Voltage
Feedback Reference Voltage VREF 0.237 0.25 0.263 V
Diode
Forward Voltage VFW I
FW = 100mA -- 0.9 -- V
MOSFET
On Resistance of MOSFET R
DS(ON) 0.5 0.75 1 Ω
To be continued
Recommended Operating Conditions (Note 3)
lOperation Junction Temperature Range------------------------------------------------------------------------- −40°C to 125°C
lOperation Ambient Temperature Range------------------------------------------------------------------------- −40°C to 85°C
Absolute Maximum Ratings (Note 1)
lSupply Voltage, VIN ------------------------------------------------------------------------------------------------- −0.3 to 6V
lLX Input Voltage------------------------------------------------------------------------------------------------------ −0.3V to 22V
lOutput Voltage------------------------------------------------------------------------------------------------------- −0.3V to 21V
lThe other pins-------------------------------------------------------------------------------------------------------- −0.3V to 6V
lPower Dissipation, PD @ TA = 25°C
TSOT23-6--------------------------------------------------------------------------------------------------------------0.455W
WDFN-8L 2x2---------------------------------------------------------------------------------------------------------0.606W
lPackage Thermal Resistance (Note 4)
TSOT23-6, θJA --------------------------------------------------------------------------------------------------------220°C/W
WDFN-8L 2x2, θJA ---------------------------------------------------------------------------------------------------165°C/W
lJunction Temperature-----------------------------------------------------------------------------------------------150°C
lLead Temperature (Soldering, 10 sec.)--------------------------------------------------------------------------260°C
lStorage Temperature Range--------------------------------------------------------------------------------------- −65°C to 150°C
lESD Susceptibility (Note 2)
HBM (Human Body Mode)-----------------------------------------------------------------------------------------2kV
MM (Machine Mode)------------------------------------------------------------------------------------------------200V
RT9285A/B Preliminary
6DS9285A/B-02 August 2007www.richtek.com
Note 1.Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
Parameter Symbol
Test Condition Min Typ Max Units
Protection
OVP Threshold VOVP -- 20 -- V
OCP -- 400 -- mA
Control Interface
Logic-Low Voltage
VIL -- -- 0.4 V
EN Threshold Logic-High Voltage
VIH 1.4 -- -- V
Digital Dimming (for RT9285A)
Up Brightness Time TUP Refer to Figure 1 0.5 -- 75 µs
Down Brightness Time TDOWN Refer to Figure 1 180 -- 300 µs
Delay Between Steps Time TDELAY Refer to Figure 1 0.5 -- -- µs
Shut Down Delay Time TSHDN Refer to Figure 1 1 -- -- ms
RT9285A/B
Preliminary
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DS9285A/B-02 August 2007www.richtek.com
Typical Operating Characteristics
OVP vs. Input Voltage
18
18.4
18.8
19.2
19.6
20
20.4
20.8
2.633.43.84.24.655.45.86.2
Input Voltage (V)
OVP (V)
Efficiency vs. Input Voltage
50%
55%
60%
65%
70%
75%
80%
85%
90%
2.533.544.555.56
Input Voltage (V)
Effic ienc y (% )
90
85
80
75
70
65
60
55
50
4W-LED
Frequency vs. Input Voltage
0.88
0.90
0.92
0.94
0.96
0.98
1.00
1.02
2.63.13.64.14.65.15.6
Input Voltage (V)
F requen cy (M Hz )
Output Voltage vs. Output Current
10
11
12
13
14
15
16
17
515253545556575
Output Current (mA)
Output Voltage (V)
Quiescent Current vs. Input Voltage
100
150
200
250
300
350
400
450
2.833.23.43.63.844.24.44.64.855.25.45.6
Input Voltage (V)
Quiescent Current (uA)
-40°C
25°C
85°C
Enable Voltage vs. Input Voltage
0.74
0.75
0.76
0.77
0.78
0.79
0.80
0.81
0.82
0.83
0.84
2.833.23.43.63.844.24.44.64.855.25.45.6
Input Voltage (V)
Enable Voltage (V)
Shutdown Voltage
Enable Voltage
RT9285A/B Preliminary
8DS9285A/B-02 August 2007www.richtek.com
VIN = 3.7V
Dimming Operation @ Decreace
VIN
(2V/Div)
Time (500µs/Div)
VOUT
(5V/Div)
EN
(2V/Div)
ILED
(10mA/Div)
VIN = 3.7V
Inrush Current Response
VIN
(2V/Div)
Time (500µs/Div)
VOUT
(5V/Div)
EN
(2V/Div)
IIN
(100mA/Div)
VIN = 3.7V
Dimming Operation @ Increase
VIN
(2V/Div)
Time (500µs/Div)
VOUT
(5V/Div)
EN
(2V/Div)
ILED
(10mA/Div)
Feedback Reference Voltage vs. Input Voltage
249.0
249.5
250.0
250.5
251.0
251.5
252.0
252.5
253.0
253.5
2.83.13.43.744.34.64.95.25.5
Input Voltage (V)
Feedback Reference Voltage (mV)
RT9285A/B
Preliminary
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DS9285A/B-02 August 2007www.richtek.com
Application Information
LED Current Control
The RT9285A/B regulates the LED current by setting the
current sense resistor (RSET) connecting to feedback and
ground. The RT9284A/B feedback voltage (VFB) is 0.25V.
The LED current (ILED) can be set by a resistor RSET.
ILED = 0.25/RSET
In order to have an accurate LED current, a precision resistor
is preferred (1% is recommended).
Inductor Selection
The recommended value of inductor for 4 to 5WLEDs
applications are 10µH to 22µH. For 3WLEDs, the
recommended value of inductor is 4.7µH to 22µH. Small
size and better efficiency are the major concerns for portable
device, such as RT9285A/B used for mobile phone. The
inductor should have low core loss at 1MHz and low DCR
for better efficiency.
LX
GND
VDD
FB
VOUT
RT9285A/B
EN
C1
1uF
RSET
L1
C2
Chip Enable
VIN
10uH to 22uH 2.7V to 5.5V
0.22uF to 1uF
12.5
LX
GND
VDD
FB
VOUT
RT9285A/B
EN
C1
1uF
RSET
L1
C2
Chip Enable
VIN
10uH to 22uH 2.7V to 5.5V
0.22uF to 1uF
12.5
Figure 3. Application for Driving 4 Series WLEDs
Figure 4. Application for Driving 5 Series WLEDs
The inductor saturation current rating should be considered
to cover the inductor peak current.
Capacitor Selection
Input and output ceramic capacitors of 1µF are recommend-
ed for RT9285A/B applications. For better voltage filtering,
ceramic capacitors with low ESR are recommended. X5R
and X7R types are suitable because of their wider voltage
and temperature ranges.
Output Voltage Control
The output voltage of R9285 can be adjusted by the divider
circuit on FB pin. Figure 6 shows a 2-level voltage control
circuit for OLED application. The output voltage can be
calculated by the following equations in Figure 6.
LX
GND
VDD
FB
VOUT
RT9285A/B
EN
C1
1uF
R2
L1
C2
Chip Enable
VIN
10uH to 22uH 2.7V to 5.5V
0.22uF to 1uF
10k
R1
590k
VOUT
15V
Figure 5. Application for Constant Output Voltage
10kR2 ;
R2
R2R1
0.25 VOUT >
+
×=
Figure 6. Application Circuit for Output Voltage Control
and Related Equations
VDD
EN
VOUT
GND
FB
RT9285A/B
LX RGPIO
VIN GPIO
OLED
RA
RB
VEN
RT9285A/B Preliminary
10 DS9285A/B-02 August 2007www.richtek.com
Figure 7. TOP
Figure 8. Bottom
LX
GND
FB EN
VOUT
VDD
4
2
3
5
61
EN
C1
L1
WLEDs
GND
C2
VIN
*1 *2
*3
*4
RSET
}LX node copper area should be minimized for reducing
EMI. (*1)
}The input capacitor C1 should be placed as closed as
possible to Pin 6. (*2)
}The output capacitor C2 should be connected directly
from the Pin 5 to ground rather than across the LEDs.
(*3)
}FB node copper area should be minimized and keep far
away from noise sources (Pin 1, Pin 5, Pin 6). (*4)
}The Inductor is far away receiver and microphone.
}The voice trace is far away RT9285.
}The embedded antenna is far away and different side
RT9285.
}R1 should be placed as close as RT9285.
}The through hole of RT9285's GND pin is recommended
as large and many as possible.
Considering the output voltage deviation from the GPIO
voltage tolerance, as GPIO voltage vibrated by 0 ± 50mV
and 1.8(2.8) ±5% ,the output voltage could be kept within
±2.5%.
Layout guide
}A full GND plane without gap break.
}Traces in bold need to be routed first and should be
kept as short as possible.
}VDD to GND noise bypass : Short and wide connection
for the 1uF MLCC capacitor between Pin 6 and Pin 2.
VOUT = RA x {(FB/RB) + (FB-GPIO)/RGPIO} + FB (1)
As GPIO = 0V,
VOUT = RA x {(0.25/RB) + (0.25/RGPIO)} + 0.25 (2)
As GPIO = 2.8V,
VOUT = RA
x {(0.25/RB) + (0.25-2.8)/RGPIO)} + 0.25
(3)
As GPIO = 1.8V, VOUT = RA x {(0.25/RB) + (0.25-1.8)/
RGPIO)} + 0.25 (4)
For Efficiency Consideration :
Set RA = 990kΩ,
If 2 levels are 16V (GPIO = 0V) and 14V (GPIO = 1.8V)
Get RB = 16kΩ, RGPIO = 890kΩ
Table 3. Suggested Resistance for Output Voltage
Control
Conditions RA
(kΩ)
RB
(kΩ)
RGPIO
(kΩ)
Case A :
Normal Voltage = 16V
(GPIO = 0V)
Dimming Voltage = 12V
(GPIO = 1.8V)
1100 18 495
Case B :
Normal Voltage = 16V
(GPIO = 0V)
Dimming Voltage = 12V
(GPIO = 2.8V)
1200 19.5 840
RT9285A/B
Preliminary
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DS9285A/B-02 August 2007www.richtek.com
Outline Dimension
TSOT-23-6 Surface Mount Package
Dimensions In Millimeters
Dimensions In Inches
Symbol Min Max Min Max
A 0.700 1.000 0.028 0.039
A1 0.000 0.100 0.000 0.004
B 1.397 1.803 0.055 0.071
b 0.300 0.559 0.012 0.022
C 2.591 3.000 0.102 0.118
D 2.692 3.099 0.106 0.122
e 0.838 1.041 0.033 0.041
H 0.080 0.254 0.003 0.010
L 0.300 0.610 0.012 0.024
AA1
e
b
B
D
C
H
L
RT9285A/B Preliminary
12 DS9285A/B-02 August 2007www.richtek.com
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing)
8F, No. 137, Lane 235, Paochiao Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)89191466 Fax: (8862)89191465
Email: marketing@richtek.com
W-Type 8L DFN 2x2 Package
Dimensions In Millimeters
Dimensions In Inches
Symbol Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.200 0.300 0.008 0.012
D 1.950 2.050 0.077 0.081
D2 1.000 1.250 0.039 0.049
E 1.950 2.050 0.077 0.081
E2 0.400 0.650 0.016 0.026
e 0.500 0.020
L 0.300 0.400 0.012 0.016
11
2
2
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
DETAIL A
Pin #1 ID and Tie Bar Mark Options
D
1
E
A3
A
A1
D2
E2
L
b
e
SEE DETAIL A
