Low Power, 1 nV/√Hz, G ≥ 10 Stable, Rail-
to-Rail Output Amplifier
Data Sheet
ADA4895-1/ADA4895-2
FEATURES
Low wideband noise
1 nV/√Hz
1.6 pA/√Hz
Low 1/f noise: 2 nV/√Hz at 10 Hz
Low distortion (SFDR): −96 dBc at 100 kHz, VOUT = 2 V p-p
Low power: 3 mA per amplifier
Low input offset voltage: 350 µV maximum
High speed
236 MHz, −3 dB bandwidth (G = +10)
943 V/µs slew rate
22 ns settling time to 0.1%
Rail-to-rail output
Wide supply range: 3 V to 10 V
Disable feature
APPLICATIONS
Low noise preamplifier
Ultrasound amplifiers
PLL loop filters
High performance analog-to-digital converter (ADC) drivers
Digital-to-analog converter (DAC) buffers
GENERAL DESCRIPTION
The ADA4895-1 (single) and ADA4895-2 (dual) are high speed
voltage feedback amplifiers that are gain ≥ 10 stable with low
input noise, rail-to-rail output, and a quiescent current of 3 mA per
amplifier. With a 1/f noise of 2 nV/√Hz at 10 Hz and a spurious-
free dynamic range (SFDR) of −72 dBc at 2 MHz, the ADA4895-1/
ADA4895-2 are an ideal solution in a variety of applications,
including ultrasound, low noise preamplifiers, and drivers of
high performance ADCs. The Analog Devices, Inc., proprietary
next generation SiGe bipolar process and innovative architecture
enables the high performance of these amplifiers.
The ADA4895-1/ADA4895-2 have a small signal bandwidth of
236 MHz at a gain of +10 with a slew rate of 943 V/µs, and settle
to 0.1% in 22 ns. The wide supply voltage range (3 V to 10 V)
of the ADA4895-1/ADA4895-2 make these amplifiers ideal
candidates for systems that require large dynamic range, high
gain, precision, and high speed.
The ADA4895-1 is available in 8-lead SOIC and 6-lead SOT-23
packages, and the ADA4895-2 is available in a 10-lead MSOP
package. All packages operate over the extended industrial
temperature range of −40°C to +125°C.
FUNCTIONAL BLOCK DIAGRAMS
NC
1
–IN
2
+IN
3
–V
S4
8
+V
S
7
OUT
6
NC
5
ADA4895-1
DISABLE
NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.
10186-102
Figure 1. ADA4895-1 Single Amplifier (8-Lead SOIC)
OUT1 1
–IN1 2
+IN1 3
–VS4
DISABLE1 5
+VS
10
OUT2
9
–IN28
+IN2
7
DISABLE2
6
ADA4895-2
10186-001
Figure 2. ADA4895-2 Dual Amplifier (10-Lead MSOP)
INPUT VOLTAGE NOI SE (n V/√Hz)
0
1
2
3
4
5
0
12
6
18
24
30
110 100 1k 10k 100k 1M
INPUT CURRENT NO ISE ( pA/√Hz)
FREQUENCY (Hz)
10186-002
VOLTAGE
CURRENT
Figure 3. Input Voltage and Current Noise vs. Frequency
Table 1. Other Low Noise Amplifiers1
Part Number(s)
ven at 100 kHz
(nV/√Hz)
Bandwidth
(MHz)
Supply
Voltage (V)
AD8021 2.1 490 5 to 24
AD8045 3 1000 3.3 to 12
AD8099
0.95
510
5 to 12
ADA4841-1/ADA4841-2 2.1 80 2.7 to 12
ADA4896-2 1 230 3 to 10
ADA4897-1/ADA4897-2 1 230 3 to 10
ADA4898-1/ADA4898-2 0.9 65 10 to 32
ADA4899-1 1 600 5 to 12
1 See www.analog.com for the latest selection of low noise amplifiers.
COMPANION PRODUCTS
ADCs: AD7944 (14-bit), AD7985 (16-bit), AD7986 (18-bit)
Additional companion products on the ADA4895-1/ADA4895-2
product page
Rev. B Document Feedback
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ADA4895-1/ADA4895-2 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Companion Products ....................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
±5 V (or +10 V) Supply ............................................................... 3
±2.5 V (or +5 V) Supply .............................................................. 4
±1.5 V (or +3 V) Supply .............................................................. 5
Absolute Maximum Ratings ............................................................ 7
Thermal Resistance ...................................................................... 7
Maximum Power Dissipation ..................................................... 7
ESD Caution .................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Typical Performance Characteristics ........................................... 10
Theory of Operation ...................................................................... 16
Amplifier Description ................................................................ 16
Input Protection ......................................................................... 16
Disable Operation ...................................................................... 16
DC Errors .................................................................................... 17
Bias Current Cancellation ......................................................... 17
Noise Considerations ................................................................. 18
Applications Information .............................................................. 19
Using the ADA4895-1/ADA4895-2 at a Gain < +10 .............. 19
High Gain Bandwidth Application .......................................... 20
Feedback Capacitor Application .............................................. 20
Wideband Photomultiplier Preamplifier ................................ 21
Layout Considerations ............................................................... 22
Outline Dimensions ....................................................................... 23
Ordering Guide .......................................................................... 24
REVISION HISTORY
4/15—Rev. A to Rev. B
Changes to Amplifier Description Section ................................. 16
Changes to Ordering Guide .......................................................... 24
12/12—Rev. 0 to Rev. A
Added ADA4895-1 ............................................................. Universal
Changes to Features Section, General Description Section, and
Table 1 ............................................................................................................. 1
Added Figure 1; Renumbered Sequentially .................................. 1
Changes to Table 2 ............................................................................ 3
Changes to Table 3 ............................................................................ 4
Changes to Table 4 ............................................................................ 5
Changes to Figure 4 .......................................................................... 7
Added Figure 5, Table 7, Figure 6, and Table 8 ............................. 8
Added Figure 14 and Figure 17..................................................... 11
Changes to Figure 24 ...................................................................... 12
Added Figure 26 and Figure 29..................................................... 13
Changes to Amplifier Description Section ................................. 16
Changes to Noise Considerations Section .................................. 18
Added Feedback Capacitor Applications Section and
Figure 54 .......................................................................................... 20
Updated Outline Dimensions ....................................................... 23
Changes to Ordering Guide .......................................................... 24
9/12—Revision 0: Initial Version
Rev. B | Page 2 of 24
Data Sheet ADA4895-1/ADA4895-2
SPECIFICATIONS
±5 V (OR +10 V) SUPPLY
TA = 25°C, G = +10, RF = 249 Ω, RL = 1 kΩ to midsupply, unless otherwise noted.
Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth VOUT = 0.2 V p-p 236 MHz
VOUT = 2 V p-p 146 MHz
VOUT = 0.2 V p-p, G = +20, RF = 1 kΩ 115 MHz
Bandwidth for 0.1 dB Flatness VOUT = 2 V p-p, RL = 100 Ω 8.9 MHz
Slew Rate VOUT = 6 V step 943 V/µs
Settling Time to 0.1% VOUT = 2 V step 22 ns
NOISE/HARMONIC PERFORMANCE
Harmonic Distortion (SFDR) fC = 100 kHz, VOUT = 2 V p-p −96 dBc
fC = 1 MHz, VOUT = 2 V p-p −78 dBc
fC = 2 MHz, VOUT = 2 V p-p −72 dBc
f
C
= 5 MHz, V
OUT
= 2 V p-p
−64
dBc
Input Voltage Noise f = 10 Hz, G = +25.9 2 nV/√Hz
f = 100 kHz, G = +25.9 1 nV/√Hz
Input Current Noise f = 10 Hz, RF = 10 kΩ, RG = 1.1 kΩ, RS = 1 kΩ 14 pA/√Hz
f = 100 kHz, RF = 10 kΩ, RG = 1.1 kΩ, RS = 1 kΩ 1.6 pA/√Hz
0.1 Hz to 10 Hz Noise G = +101, RF = 1 kΩ, RG = 10 Ω 99 nV p-p
DC PERFORMANCE
Input Offset Voltage −350 +53 +350 µV
Input Offset Voltage Drift 0.15 µV/°C
Input Bias Current −16 −11 −6 µA
Input Bias Current Drift 1.2 nA/°C
Input Bias Offset Current −0.6 −0.02 +0.6 µA
Open-Loop Gain VOUT = −4 V to +4 V 100 110 dB
INPUT CHARACTERISTICS
Input Resistance Common mode/differential mode 10 M/10 k Ω
Input Capacitance Common mode/differential mode 3/11 pF
Input Common-Mode Voltage Range −4.9 to +4.1 V
Common-Mode Rejection VCM = −2 V to +2 V −100 −109 dB
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time VIN = −0.55 V to +0.55 V 80 ns
Positive Output Voltage Swing RL = 1 kΩ 4.85 4.96 V
RL = 100 Ω 4.5 4.77 V
Negative Output Voltage Swing RL = 1 kΩ −4.85 −4.97 V
RL = 100 Ω −4.5 −4.85 V
Linear Output Current SFDR = −45 dBc 80 mA rms
Short-Circuit Current
Sinking/sourcing
116/111
mA
Capacitive Load Drive 30% overshoot 6 pF
POWER SUPPLY
Operating Range 3 to 10 V
Quiescent Current per Amplifier 2.8 3 3.2 mA
DISABLEx = −5 V 0.1 mA
Positive Power Supply Rejection +VS = 4 V to 6 V, −VS = −5 V −98 −136 dB
Negative Power Supply Rejection +VS = 5 V, −VS = −4 V to −6 V −98 −135 dB
Rev. B | Page 3 of 24
ADA4895-1/ADA4895-2 Data Sheet
Parameter Test Conditions/Comments Min Typ Max Unit
DISABLEx PIN
DISABLEx Voltage Device enabled >+VS − 0.5 V
Device disabled <+VS − 2 V
Input Current per Amplifier
Device Enabled
DISABLEx
= +5 V
−1.1
µA
Device Disabled DISABLEx = −5 V −40 µA
Switching Speed
Device Enabled 0.25 µs
Device Disabled 6 µs
±2.5 V (OR +5 V) SUPPLY
TA = 25°C, G = +10, RF = 249 Ω, RL = 1 kΩ to midsupply, unless otherwise noted.
Table 3.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth VOUT = 0.2 V p-p 216 MHz
VOUT = 2 V p-p 131 MHz
VOUT = 0.2 V p-p, G = +20, RF = 1 kΩ 113 MHz
Bandwidth for 0.1 dB Flatness VOUT = 2 V p-p, RL = 100 Ω 7.9 MHz
Slew Rate VOUT = 3 V step 706 V/µs
Settling Time to 0.1% VOUT = 2 V step 21 ns
NOISE/HARMONIC PERFORMANCE
Harmonic Distortion (SFDR) fC = 100 kHz, VOUT = 2 V p-p −94 dBc
fC = 1 MHz, VOUT = 2 V p-p −75 dBc
fC = 2 MHz, VOUT = 2 V p-p −69 dBc
fC = 5 MHz, VOUT = 2 V p-p −61 dBc
Input Voltage Noise f = 10 Hz, G = +25.9 1.8 nV/√Hz
f = 100 kHz, G = +25.9 1 nV/√Hz
Input Current Noise f = 10 Hz, RF = 10 kΩ, RG = 1.1 kΩ, RS = 1 kΩ 14 pA/√Hz
f = 100 kHz, RF = 10 kΩ, RG = 1.1 kΩ, RS = 1 kΩ 1.7 pA/√Hz
0.1 Hz to 10 Hz Noise G = +101, RF = 1 kΩ, RG = 10 Ω 99 nV p-p
DC PERFORMANCE
Input Offset Voltage −350 +53 +350 µV
Input Offset Voltage Drift 0.15 µV/°C
Input Bias Current −16 −11 −6 µA
Input Bias Current Drift 1.2 nA/°C
Input Bias Offset Current −0.6 −0.02 +0.6 µA
Open-Loop Gain VOUT = −2 V to +2 V 97 108 dB
INPUT CHARACTERISTICS
Input Resistance Common mode/differential mode 10 M/10 k Ω
Input Capacitance Common mode/differential mode 3/11 pF
Input Common-Mode Voltage Range −2.4 to +1.6 V
Common-Mode Rejection
V
CM
= −1.5 V to +1.5 V
−98
−110
dB
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time VIN = −0.275 V to +0.275 V 90 ns
Positive Output Voltage Swing RL = 1 kΩ 2.35 2.48 V
RL = 100 Ω 2.3 2.38 V
Negative Output Voltage Swing RL = 1 kΩ −2.35 −2.48 V
RL = 100 Ω −2.3 −2.38 V
Linear Output Current SFDR = −45 dBc 64 mA rms
Short-Circuit Current Sinking/sourcing 111/98 mA
Capacitive Load Drive 30% overshoot 6 pF
Rev. B | Page 4 of 24
Data Sheet ADA4895-1/ADA4895-2
Parameter Test Conditions/Comments Min Typ Max Unit
POWER SUPPLY
Operating Range 3 to 10 V
Quiescent Current per Amplifier 2.6 2.8 3 mA
DISABLEx = −2.5 V 0.05 mA
Positive Power Supply Rejection +VS = 2 V to 3 V, −VS = −2.5 V −98 −137 dB
Negative Power Supply Rejection +VS = 2.5 V, −VS = −3 V to −2 V −98 −141 dB
DISABLEx PIN
DISABLEx
Voltage
Device enabled
>+V
S
− 0.5
V
Device disabled <+VS − 2 V
Input Current per Amplifier
Device Enabled DISABLEx = +2.5 V −1.1 µA
Device Disabled DISABLEx = −2.5 V −20 µA
Switching Speed
Device Enabled 0.25 µs
Device Disabled 6 µs
±1.5 V (OR +3 V) SUPPLY
TA = 25°C, G = +10, RF = 249 Ω, RL = 1 kΩ to midsupply, unless otherwise noted.
Table 4.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth VOUT = 0.2 V p-p 205 MHz
VOUT = 1 V p-p 131 MHz
VOUT = 0.2 V p-p, G = +20, RF = 1 kΩ 111 MHz
Bandwidth for 0.1 dB Flatness VOUT = 2 V p-p, RL = 100 Ω 7.5 MHz
Slew Rate
V
OUT
= 1 V step
384
V/µs
Settling Time to 0.1% VOUT = 2 V step 20 ns
NOISE/HARMONIC PERFORMANCE
Harmonic Distortion (SFDR) fC = 100 kHz, VOUT = 2 V p-p −92 dBc
fC = 1 MHz, VOUT = 2 V p-p −73 dBc
fC = 2 MHz, VOUT = 2 V p-p −67 dBc
fC = 5 MHz, VOUT = 2 V p-p −59 dBc
Input Voltage Noise f = 10 Hz, G = +25.9 1.9 nV/√Hz
f = 100 kHz, G = +25.9 1 nV/√Hz
Input Current Noise f = 10 Hz, RF = 10 kΩ, RG = 1.1 kΩ, RS = 1 kΩ 14 pA/√Hz
f = 100 kHz, RF = 10 kΩ, RG = 1.1 kΩ, RS = 1 kΩ 1.7 pA/√Hz
0.1 Hz to 10 Hz Noise G = +101, RF = 1 kΩ, RG = 10 Ω 99 nV p-p
DC PERFORMANCE
Input Offset Voltage −350 +55 +350 µV
Input Offset Voltage Drift 0.15 µV/°C
Input Bias Current −16 −11 −6 µA
Input Bias Current Drift 1.2 nA/°C
Input Bias Offset Current −0.6 −0.02 +0.6 µA
Open-Loop Gain VOUT = −1 V to +1 V 95 106 dB
INPUT CHARACTERISTICS
Input Resistance Common mode/differential mode 10 M/10 k Ω
Input Capacitance Common mode/differential mode 3/11 pF
Input Common-Mode Voltage Range −1.4 to +0.6 V
Common-Mode Rejection VCM = −0.4 V to +0.4 V −93 −110 dB
Rev. B | Page 5 of 24
ADA4895-1/ADA4895-2 Data Sheet
Parameter Test Conditions/Comments Min Typ Max Unit
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time VIN = −0.165 V to +0.165 V 80 ns
Positive Output Voltage Swing RL = 1 kΩ 1.35 1.48 V
RL = 100 Ω 1.3 1.43 V
Negative Output Voltage Swing
R
L
= 1 kΩ
−1.35
−1.49
V
RL = 100 Ω −1.3 −1.45 V
Linear Output Current SFDR = −45 dBc 46 mA rms
Short-Circuit Current Sinking/sourcing 99/83 mA
Capacitive Load Drive 30% overshoot 6 pF
POWER SUPPLY
Operating Range 3 to 10 V
Quiescent Current per Amplifier 2.5 2.7 2.9 mA
DISABLEx = −1.5 V 0.03 mA
Positive Power Supply Rejection +VS = 1.2 V to 2.2 V, −VS = −1.5 V −98 −133 dB
Negative Power Supply Rejection +VS = 1.5 V, −VS = −2.2 V to −1.2 V −98 −146 dB
DISABLEx PIN
DISABLEx Voltage Device enabled >+VS − 0.5 V
Device disabled <+VS − 2 V
Input Current per Amplifier
Device Enabled DISABLEx = +1.5 V −1.2 µA
Device Disabled DISABLEx = −1.5 V −10 µA
Switching Speed
Device Enabled 0.25 µs
Device Disabled 6 µs
Rev. B | Page 6 of 24
Data Sheet ADA4895-1/ADA4895-2
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Rating
Supply Voltage 11 V
Power Dissipation See Figure 4
Common-Mode Input Voltage −VS − 0.7 V to +VS + 0.7 V
Differential Input Voltage ±0.7 V
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +125°C
Lead Temperature (Soldering 10 sec)
300°C
Junction Temperature 150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is specified
for a device soldered in a circuit board for surface-mount
packages. Table 6 lists the θJA for the ADA4895-1/ADA4895-2.
Table 6. Thermal Resistance
Package Type θJA Unit
8-Lead Single SOIC 133 °C/W
6-Lead Single SOT-23 150 °C/W
10-Lead Dual MSOP 210 °C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the ADA4895-1/
ADA4895-2 is limited by the associated rise in junction
temperature (TJ) on the die. At approximately 150°C, which is the
glass transition temperature, the properties of the plastic change.
Even temporarily exceeding this temperature limit can change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the ADA4895-1/
ADA4895-2. Exceeding a junction temperature of 175°C for an
extended period of time can result in changes in silicon devices,
potentially causing degradation or loss of functionality.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
die due to the ADA4895-1/ADA4895-2 drive at the output.
PD = Quiescent Power + (Total Drive Power − Load Power)
The quiescent power dissipation is the voltage between the supply
pins (±VS) multiplied by the quiescent current (IS).
()
L
OUT
L
OUT
S
SS
D
R
V
R
V
V
IV
P
2
2−
×+×
=
Consider rms output voltages. If RL is referenced to −VS, as in
single-supply operation, the total drive power is VS × IOUT. In
single-supply operation with RL referenced to −VS, the worst
case is VOUT = VS/2.
If the rms signal levels are indeterminate, consider the worst case,
when VOUT = VS/4 with RL referenced to midsupply.
( ) ( )
L
S
SS
D
R
V
IVP
2
4/
+×=
Airflow increases heat dissipation, effectively reducing θJA. Also,
more metal directly in contact with the package leads reduces θJA.
Figure 4 shows the maximum safe power dissipation in the package
vs. the ambient temperature on a JEDEC standard, 4-layer board.
θJA values are approximations.
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
–40–30 –20 –10 010 20 30 40 50 60 70 80 90 100 110120
MAXIMUM POWER DISSIPATION (W)
AMBIENT TEMPERATURE ( °C)
ADA4895-1 (S OIC)
ADA4895-1 (S OT- 23)
ADA4895-2 (M S OP)
10186-003
Figure 4. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
Rev. B | Page 7 of 24
ADA4895-1/ADA4895-2 Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC1
–IN2
+IN3
–VS4
8
+VS
7
OUT
6
NC
5
ADA4895-1
DISABLE
NC =NOCONNECT.DO NOT
CONNECT TOTHIS PIN.
10186-105
Figure 5. 8-Lead SOIC Pin Configuration for the ADA4895-1
Table 7. 8-Lead SOIC Pin Function Descriptions for the ADA4895-1
Pin No. Mnemonic Description
1, 5 NC No Connect. Do not connect to these pins.
2 −IN Inverting Input.
3 +IN Noninverting Input.
4 −VS Negative Supply.
6
OUT
Output.
7 +VS Positive Supply.
8 DISABLE Disable.
ADA4895-1
OUT
1
–V
S2
+IN
3
+V
S
6
5
–IN
4
DISABLE
10186-106
Figure 6. 6-Lead SOT-23 Pin Configuration for the ADA4895-1
Table 8. 6-Lead SOT-23Pin Function Descriptions for the ADA4895-1
Pin No. Mnemonic Description
1 OUT Output
2 −VS Negative Supply
3 +IN Noninverting Input
4 −IN Inverting Input
5 DISABLE Disable
6
+V
S
Positive Supply
Rev. B | Page 8 of 24
Data Sheet ADA4895-1/ADA4895-2
OUT1
1
–IN1
2
+IN1
3
–V
S4
DISABLE1
5
+V
S
10
OUT2
9
–IN2
8
+IN2
7
DISABLE2
6
ADA4895-2
10186-004
Figure 7. 10-Lead MSOP Pin Configuration for the ADA4895-2
Table 9. 10-Lead MSOP Pin Function Descriptions for the ADA4895-2
Pin Number Mnemonic Description
1 OUT1 Output 1
2 −IN1 Inverting Input 1
3
+IN1
Noninverting Input 1
4 −VS Negative Supply
5 DISABLE1 Disable 1
6 DISABLE2 Disable 2
7 +IN2 Noninverting Input 2
8 −IN2 Inverting Input 2
9
OUT2
Output 2
10 +VS Positive Supply
Rev. B | Page 9 of 24
ADA4895-1/ADA4895-2 Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = ±2.5 V, G = +10, RF = 249 Ω, RL = 1 kΩ to midsupply, unless otherwise noted.
–5
–4
–3
–2
–1
0
1
2
3
0.1 110 100 1000
NORMALIZED CLOSED-LOOP GAIN (dB)
FREQUENCY (MHz)
V
OUT
= 200mV p - p
V
S
= ±5. 0V
V
S
= ±1. 5V
V
S
= ±2. 5V
10186-006
Figure 8. Small Signal Frequency Response vs. Supply Voltage
–10
–8
–6
–4
–2
0
2
4
6
8
0.1 110 100 1000
NORMALIZED CLOSED-LOOP GAI N ( dB)
FREQUENCY (MHz)
G = –10
G = +10
RF = 1kΩ
VOUT = 200mV p-p
10186-005
G = –20
Figure 9. Small Signal Frequency Response vs. Gain
–5
–4
–3
–2
–1
0
1
2
3
4
0.1 110 100 1000
NORMALIZED CLOSED-LOOP GAI N ( dB)
FREQUENCY (MHz)
V
OUT
= 200mV p - p
+25°C
+125°C
10186-007
–40°C
Figure 10. Small Signal Frequency Response vs. Temperature
–5
–4
–3
–2
–1
0
1
2
0.1 110 100 1000
NORMALIZED CLOSED-LOOP GAI N ( dB)
FREQUENCY (MHz)
V
OUT
= 2V p-p
V
S
= ±1. 5V
V
S
= ±5. 0V
V
S
= ±2. 5V
10186-010
Figure 11. Large Signal Frequency Response vs. Supply Voltage
–5
–4
–3
–2
–1
0
1
2
3
0.1 110 100 1000
NORMALIZED CLOSED-LOOP GAI N ( dB)
FREQUENCY (MHz)
R
F
= 1kΩ
V
OUT
= 2V p-p
G = +10
G = –10
G = –20
10186-009
Figure 12. Large Signal Frequency Response vs. Gain
–5
–4
–3
–2
–1
0
1
2
3
0.1 110 100 1000
NORMALIZED CLOSED-LOOP GAI N ( dB)
FREQUENCY (MHz)
V
OUT
= 100mV p - p V
OUT
= 400mV p - p
10186-008
V
OUT
= 2V p-p
V
OUT
= 1V p-p
Figure 13. Frequency Response for Various Output Voltages
Rev. B | Page 10 of 24
Data Sheet ADA4895-1/ADA4895-2
–10
–8
–6
–4
–2
0
2
4
0.1 110 100 1000
NORMALIZED CLOSED-LOOP GAI N ( dB)
FREQUENCY (MHz)
V
OUT
= 200mV p - p
ADA4895-1, S O IC
ADA4895-2, M S OP
ADA4895-1, S O T-23
10186-138
Figure 14. Small Signal Frequency Response vs. Package
–10
–8
–6
–4
–2
0
2
4
6
0.1 110 100 1000
NORMALIZED CLOSED-LOOP GAI N ( dB)
FREQUENCY (MHz)
C
L
= 6pF
V
OUT
= 200mV p - p
10186-011
C
L
= 3pF
C
L
= 0pF
Figure 15. Small Signal Frequency Response vs. Capacitive Load
–120
–110
–100
–90
–80
–70
–60
–50
–40
0.1 110
DISTORTION (dBc)
FREQUENCY (MHz)
10186-012
HD3, R
L
= 1kΩ
HD2, R
L
= 100Ω
HD2, R
L
= 1kΩ
HD3, R
L
= 100Ω
V
OUT
= 2V p-p
Figure 16. Harmonic Distortion vs. Frequency for Various Loads
–10
–8
–6
–4
–2
0
2
4
0.1 110 100 1000
NORMALIZED CLOSED-LOOP GAI N ( dB)
FREQUENCY (MHz)
V
OUT
= 2V p-p
ADA4895-2, M S OP
ADA4895-1, S O IC
ADA4895-1, S O T-23
10186-141
Figure 17. Large Signal Frequency Response vs. Package
1k 10k 100k 1M 10M 100M 1G
FREQUENCY (Hz)
PHASE ( Degrees)
GAI N (dB)
10186-017
0
10
20
30
40
50
60
70
80
90
100
110
120
GAIN
PHASE
–240
–220
–200
–180
–160
–140
–120
–100
–80
–60
–40
–20
0
Figure 18. Open-Loop Gain and Phase vs. Frequency
–130
–120
–110
–100
–90
–80
–70
–60
–50
–40
0.1 110
DISTORTION ( dBc)
FREQUENCY (MHz)
V
S
= ±5V
V
S
= ±2. 5V
V
S
= ±1. 5V
HD3
HD2
10186-016
V
S
= ±5V
V
S
= ±2. 5V
V
S
= ±1. 5V
V
OUT
= 2V p-p
Figure 19. Harmonic Distortion vs. Frequency for Various Supplies
Rev. B | Page 11 of 24
ADA4895-1/ADA4895-2 Data Sheet
–120
–100
–80
–60
–40
–20
0.1 110
DISTORTION ( dBc)
FREQUENCY (MHz)
V
OUT
= 2V p-p
G = +20
10186-013
R
L
= 100Ω HD2
HD3
R
L
= 1kΩ
R
L
= 100Ω
R
L
= 1kΩ
Figure 20. Harmonic Distortion vs. Frequency, G = +20
0
1
2
3
4
5
6
110 100 1k 10k 100k 1M 10M 100M
INPUT VOLTAGE NOI SE (n V/√Hz)
FREQUENCY (Hz)
10186-018
VS = ±5V
G = + 25.9
RF = 249Ω
RG = 10Ω
Figure 21. Input Voltage Noise vs. Frequency
–0.20
–0.15
–0.10
–0.05
0
0.05
0.10
0.15
0.20
OUTPUT VOLTAGE (V)
TIME (5ns/DIV)
V
S
= ±1. 5V
V
S
= ±2. 5V
V
S
= ±5. 0V
10186-021
V
OUT
= 200mV p - p
Figure 22. Small Signal Transient Response for Various Supplies
–140
–120
–100
–80
–60
–40
–20
0.1 110
DISTORTION ( dBc)
FREQUENCY (MHz)
V
S
= ±5. 0V
R
G
= 27.4Ω
10186-015
2V p-p
8V p-p
HD3
HD2
4V p-p
2V p-p
4V p-p
8V p-p
Figure 23. Harmonic Distortion vs. Frequency for Various Output Voltages
1
10
100
110 100 1k 10k 100k 1M
INPUT CURRENT NO ISE ( pA/√Hz)
FREQUENCY (Hz)
10186-019
R
F
= 10kΩ
R
G
= 1.1kΩ
R
S
= 1kΩ
Figure 24. Input Current Noise vs. Frequency
–0.20
–0.15
–0.10
–0.05
0
0.05
0.10
0.15
0.20
OUTPUT VOLTAGE (V)
TIME (5ns/DIV)
10186-023
V
OUT
= 200mV p - p
C
L
= 5.6pF
C
L
= 3.3pF
C
L
= 0pF
Figure 25. Small Signal Transient Response for Various Capacitive Loads
Rev. B | Page 12 of 24
Data Sheet ADA4895-1/ADA4895-2
–0.20
–0.15
–0.10
–0.05
0
0.05
0.10
0.15
0.20
OUTPUT VOLTAGE (V)
TIME (5ns/DIV)
ADA4895-1, S O T-23
ADA4895-2, M S OP V
OUT
= 200mV p - p
ADA4895-1, S O IC
10186-139
Figure 26. Small Signal Transient Response vs. Package
0
1
2
3
4
5
6
7
8
9
10
NUMBER O F SAMPLES
V
DRIFT
(µV/°C)
–0.4 –0.3 –0.2 –0.1 00.1 0.2 0.3 0.4 0.5 0.6
AVERAGE = 15 4n V/°C
STANDARD DEVI AT ION = 1 84 n V /°C
–40°C TO +125°C
10186-020
Figure 27. Input Offset Voltage Drift Distribution
–3
–2
–1
0
1
2
3
INPUT AND OUT P UT VO LTAGE (V)
TIME ( 100ns/ DIV)
90ns RECOVE RY TI M E
V
OUT
10 × V
IN
10186-026
Figure 28. Output Overdrive Recovery Time
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
OUTPUT VOLTAGE (V)
TIME (5ns/DIV)
VOUT = 2V p-p
ADA4895-1, S O IC
ADA4895-2, M S OP
ADA4895-1, S O T-23
10186-142
Figure 29. Large Signal Transient Response vs. Package
TIME (5ns/DIV)
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
OUTPUT VOLTAGE (V)
G = +10 G = +20
10186-024
VOUT = 2V p-p
Figure 30. Large Signal Transient Response for Various Gains
SETTLING TIME (%)
TIME (10ns/DIV)
ERROR
VOUT = 2V STEP
0.2
0.1
0
–0.1
–0.2
10186-029
Figure 31. Settling Time to 0.1%
Rev. B | Page 13 of 24
ADA4895-1/ADA4895-2 Data Sheet
–160
–150
–140
–130
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
0.001 0.01 0.1 110 100
PSRR (dB)
FREQUENCY (MHz)
+VS = 2. 5V ± 1V p-p
–VS = –2.5V ± 1V p-p
10186-031
Figure 32. PSRR vs. Frequency
550
600
650
700
750
800
–40 –20 020 40 60 80 100 120
SLEW RATE (V/µs)
TEMPERATURE (˚C)
V
OUT
= 3V p-p
RISE
FALL
10186-028
Figure 33. Slew Rate vs. Temperature
TEMPERAT URE ( °C)
–40 –20 020 40 60 80 100 120
SUPPLY CURRE NT (mA)
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
V
S
= ±5. 0V
V
S
= ±2. 5V
V
S
= ±1. 5V
10186-034
Figure 34. Supply Current vs. Temperature for Various Supplies
–120
–100
–80
–60
–40
–20
0
0.001 0.01 0.1 110 100
CMRR (dB)
FREQUENCY (MHz)
10186-030
Figure 35. CMRR vs. Frequency
0
20
40
60
80
100
120
140
160
0100 200 300 400 500 600 700 800
RECOVERY TIME (ns)
OVE RLO AD DURATION (ns)
NEGATIVE SLO PE
POSITI VE SL O PE
10186-027
Figure 36. Output Overload Recovery Time vs. Overload Duration
TEMPERAT URE ( °C)
–12.0
–11.8
–11.6
–11.4
–11.2
–11.0
–10.8
–40 –20 020 40 60 80 100 120
INPUT BI AS CURRE NT (µA)
VS = ±5. 0V
VS = ±2. 5V
VS = ±1. 5V
10186-035
Figure 37. Input Bias Current vs. Temperature for Various Supplies
Rev. B | Page 14 of 24
Data Sheet ADA4895-1/ADA4895-2
0
0.01
0.02
0.03
0.04
0.05
–40 –25 –10 520 35 50 65 80 95 110 125
TEMPERAT URE ( °C)
V
S
= ±1. 5V
V
S
= ±2. 5V
V
S
= ±5. 0V
VOS (mV)
10186-033
Figure 38. Input Offset Voltage vs. Temperature for Various Supplies
0.01
0.1
1
10
100
1k
10k
100k
1M
0.01 0.1 110 100 1000
OUTPUT IMP E DANCE ( Ω)
FREQUENCY (MHz)
DISABLED
ENABLED
10186-032
Figure 39. Output Impedance vs. Frequency
–0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
VOLTAGE (V)
TIME (1µs/DIV)
+125°C
+25°C
–40°C
10186-038
DISABLE
OUTPUT
Figure 40. Output Turn-Off Time vs. Temperature
–120
–100
–80
–60
–40
–20
0
0.01 0.1 110 100
CROSSTALK (dB)
FREQUENCY (MHz)
10186-036
Figure 41. Crosstalk, OUT1 to OUT2
–180
–160
–140
–120
–100
–80
–60
–40
–20
0
0.01 0.1 110 100
ISOLATION (dB)
FREQUENCY (MHz)
10186-039
Figure 42. Forward Isolation vs. Frequency
–0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
VOLTAGE (V)
TIME (40ns/DIV)
DISABLE
OUTPUT
+125°C
+25°C
–40°C
10186-037
Figure 43. Output Turn-On Time vs. Temperature
Rev. B | Page 15 of 24
ADA4895-1/ADA4895-2 Data Sheet
THEORY OF OPERATION
AMPLIFIER DESCRIPTION
The ADA4895-1/ADA4895-2 amplifiers have an input noise of
1 nV/√Hz and consume 3 mA per amplifier from supply voltages
of 3 V to 10 V. Using the Analog Devices XFCB3 process, the
ADA4895-1/ADA4895-2 have a gain bandwidth product in
excess of 1.5 GHz and are gain ≥ 10 stable, with an input
structure that results in an extremely low input 1/f noise for a
relatively high speed amplifier.
The rail-to-rail output stage is designed to drive the heavy feedback
load required to achieve an overall low output referred noise.
The low input noise and high bandwidth of the ADA4895-1/
ADA4895-2 are achieved with minimal power penalty. For this
reason, the maximum offset voltage of 350 µV and voltage drift
of 0.15 µV/°C make the ADA4895-1/ADA4895-2 an excellent
choice, even when the low noise performance of the amplifier is
not needed.
For any gain greater than 10, the closed-loop frequency response
of a basic noninverting configuration can be approximated by
Closed-Loop −3 dB Frequency = (GBP) ×
( )
G
F
G
RR
R
+
For inverting gain configurations, the source impedance must be
considered when sizing RG to maintain the minimum stable gain.
For gains lower than 10, see the Using the ADA4895-1/ADA4895-2
at a Gain < +10 section, or use the ADA4897-1/ADA4897-2, which
is a unity-gain stable amplifier with 230 MHz bandwidth.
INPUT PROTECTION
The ADA4895-1/ADA4895-2 are fully protected from ESD events
and can withstand human body model ESD events of 2.5 kV and
charged-device model events of 1 kV with no measured performance
degradation. The precision input is protected with an ESD network
between the power supplies and diode clamps across the input
device pair, as shown in Figure 44.
+IN
ESD
ESD
–V
S
+V
S
BIAS
TO THE REST OF THE AMPLIFIER
–IN
ESD
ESD
10186-040
Figure 44. Input Stage and Protection Diodes
At differential voltages above approximately 0.7 V, the diode
clamps begin to conduct. Too much current can cause damage
due to excessive heating. If large differential voltages must be
sustained across the input terminals, it is recommended that the
current through the input clamps be limited to less than 10 mA.
Series input resistors that are sized appropriately for the expected
differential overvoltage provide the needed protection.
The ESD clamps begin to conduct at input voltages that are more
than 0.7 V above the positive supply or more than 0.7 V below
the negative supply. If an overvoltage condition is expected, it is
recommended that the fault current be limited to less than 10 mA.
DISABLE OPERATION
Figure 45 shows the ADA4895-1/ADA4895-2 power-down
circuitry. If the DISABLEx pin is left unconnected, the base of the
input PNP transistor is pulled high through the internal pull-up
resistor to the positive supply and the device is turned on. Pulling
the DISABLEx pin more than 2 V below the positive supply turns
the device off, reducing the supply current to approximately
50 µA for a 5 V voltage supply.
+VS
–VS
DISABLEx
ESD
ESD
IBIAS
TO
AMPLIFIER
BIAS
10186-041
Figure 45. DISABLEx Circuit
The DISABLEx pin is protected by ESD clamps, as shown in
Figure 45. Voltages beyond the power supplies cause these diodes
to conduct. For protection of the DISABLEx pins, the voltage to
these pins should not exceed 0.7 V beyond the supply voltage, or
the input current should be restricted to less than 10 mA with a
series resistor.
Rev. B | Page 16 of 24
Data Sheet ADA4895-1/ADA4895-2
DC ERRORS
Figure 46 shows a typical connection diagram and the major
dc error sources.
RG
– VIN +
RS
– VIP +
IB+
IB–+VOUT –
RF
+VOS –
10186-042
Figure 46. Typical Connection Diagram and DC Error Sources
The ideal transfer function (all error sources set to 0 and infinite
dc gain) can be expressed as follows:
IN
G
F
IP
G
F
OUT
V
R
R
V
R
R
V×
−×
+= 1
(1)
This equation reduces to the familiar forms for noninverting
and inverting op amp gain expressions, as follows:
For noninverting gain (VIN = 0 V),
IP
G
F
OUT
V
R
R
V×
+
=1
(2)
For inverting gain (VIP = 0 V),
IN
G
F
OUT V
R
R
V×
−
=
(3)
The total output voltage error is the sum of the errors due to the
amplifier offset voltage and input currents. The output error due
to the offset voltage can be estimated as follows:
ERROR
OUT
V
= (4)
+×
+
−
++
G
F
OUTPNOM
P
CM
OFFSET R
R
A
V
PSRR
VV
CMRR
V
V
NOM
1
where:
NOM
OFFSET
V
is the offset voltage at the specified supply voltage,
which is measured with the input and output at midsupply.
VCM is the common-mode voltage.
CMRR is the common-mode rejection ratio.
VP is the power supply voltage.
VPNOM is the specified power supply voltage.
PSRR is the power supply rejection ratio.
A is the dc open-loop gain.
The output error due to the input currents can be estimated
as follows:
+−
×
+×−×
+×=
B
G
F
S
B
G
F
G
F
OUT
I
R
R
RI
R
R
RRV ERROR 11)||(
(5)
BIAS CURRENT CANCELLATION
To cancel the output voltage error due to unmatched bias currents
at the inputs, Resistors RBP and RBN can be used (see Figure 47).
RG
RSRBP
RBN
R
F
10186-043
Figure 47. Using RBP and RBN to Cancel Bias Current Error
To compensate for the unmatched bias currents at the two inputs,
set Resistors RBP and RBN as shown in Table 10.
Table 10. Setting RBP and RBN to Cancel Bias Current Error
Value of RF||RG Value of RBP (Ω) Value of RBN (Ω)
Greater Than RS RF||RG − RS 0
Less Than RS 0 RS − RF||RG
Rev. B | Page 17 of 24
ADA4895-1/ADA4895-2 Data Sheet
NOISE CONSIDERATIONS
Figure 48 illustrates the primary noise contributors for the
typical gain configurations. The total rms output noise is
the root mean square of all the contributions.
R
G
R
S
iep
ien + vo ut_en –
R
F
ven
4kT × R
S
vn _ R
S
=
4kT × R
G
vn _ R
G
=
4kT × R
F
vn _ R
F
=
10186-044
Figure 48. Noise Sources in Typical Gain Configurations
The output noise spectral density can be calculated as follows:
vout_en = (6)
[ ]
2
2
2
2
2
2
2
4414
F
G
G
F
SS
G
F
F
RienkTR
R
R
venRiepkTR
R
R
kTR +
+++
++
where:
k is Boltzmann’s constant.
T is the absolute temperature (degrees Kelvin).
RF and RG are the feedback network resistances, as shown in
Figure 48.
RS is the source resistance, as shown in Figure 48.
iep and ien represent the amplifier input current noise spectral
density (pA/√Hz).
ven is the amplifier input voltage noise spectral density (nV/√Hz).
Source resistance noise, amplifier voltage noise (ven), and the
voltage noise from the amplifier current noise (iep × RS) are all
subject to the noise gain term (1 + RF/RG). Note that with a
1 nV/√Hz input voltage noise and a 1.7 pA/√Hz input current
noise, the noise contributions of the amplifier are relatively
small for source resistances from approximately 50 Ω to 700 Ω.
Figure 49 shows the total RTI noise due to the amplifier vs. the
source resistance. In addition, the value of the feedback resistors
affects the noise. It is recommended that the value of the feedback
resistors be maintained between 250 Ω and 1 kΩ to keep the
total noise low.
50 500
NOISE (nV/√Hz)
SOURCE RE S IS TANCE (Ω)
5
0.5
50
500
5k 50k
AMPLIFIER NOISE
AMPLIFI E R AND
RESISTOR NOISE
SOURCE
RESI S TANCE NOI S E
10186-045
Figure 49. RTI Noise vs. Source Resistance
Rev. B | Page 18 of 24
Data Sheet ADA4895-1/ADA4895-2
APPLICATIONS INFORMATION
USING THE ADA4895-1/ADA4895-2 AT A
GAIN < +10
The ADA4895-1/ADA4895-2 are minimum gain 10 stable when
used in normal gain configurations. However, the ADA4895-1/
ADA4895-2 can be configured to work at lower gains down to a
gain of +5. Figure 50 shows how to add a simple RC circuit (R1 =
49.9 Ω and C1 = 60 pF) to allow the ADA4895-1/ADA4895-2 to
operate at a gain of +5.
VOUT
CL
150pF
RO
50Ω
C1
60pF
R1
50Ω
VIN RT
50Ω
RG
50Ω
RF
200Ω
10186-046
Figure 50. Configuring the ADA4895-1/ADA4895-2 for a Gain of +5 Stable
This circuit has a gain of +9 at high frequency and a gain of +5 at
frequencies lower than the resonance frequency of 53 MHz
(1/2πR1C1). With a noise gain of approximately +9 at high
frequency, the total output noise increases unless an antialiasing
filter is used to block the high frequency content.
Figure 51 shows the small and large signal frequency response of
the circuit shown in Figure 50 into a 50 Ω analyzer (G = +5 V/V
or 14 dB). As shown in Figure 51, the circuit is very stable, and
the peaking is a little over 2 dB. This configuration is scalable to
accommodate any gain from +5 to +10, as shown in Table 11.
–1
2
5
8
11
14
17
0.1 110 100 1000
CLOSED-LOOP GAIN ( dB)
FREQUENCY (MHz)
10186-047
VOUT = 30mV p-p
VOUT = 2V p-p
VOUT = 250mV p-p
VS = ±5V
G = +5
Figure 51. Frequency Response for G = +5
Table 11. Component Values Used with the ADA4895-1/ADA4895-2 for Gain < +10
Gain RT (Ω) R1 (Ω) C1 (pF) RG (Ω) RF (Ω) RO (Ω) CL (pF)
+5 49.9 49.9 60 49.9 200 49.9 150
+6 49.9 66.5 45 40.2 200 49.9 150
+7 49.9 110 27 37.4 226 49.9 150
+8 49.9 205 15 32.4 226 49.9 120
+9 49.9 Not applicable Not applicable 30.9 249 49.9 100
Rev. B | Page 19 of 24
ADA4895-1/ADA4895-2 Data Sheet
HIGH GAIN BANDWIDTH APPLICATION
The circuit in Figure 52 shows cascaded dual amplifier stages
using the ADA4895-1/ADA4895-2. Each stage has a gain of +10
(20 dB), making the output 100 times (40 dB) the input. The total
gain bandwidth product is approximately 9 GHz with the device
operating on 6 mA of quiescent current (3 mA per amplifier).
VOUT
VIN RT
50ΩRL
1kΩ
RF
226Ω
CF
2pF
C1
5pF
RG
25.5Ω
RF
226Ω
CF
2pF
RG
25.5Ω
R1
249Ω
10186-048
Figure 52. Cascaded Amplifier Stages for High Gain Applications (G = +100)
Figure 53 shows the large signal frequency response for two cases.
The first case is with installed feedback capacitors (CF = 2 pF), and
the second case is without these capacitors. Removing the 2 pF
feedback capacitors from this circuit increases the bandwidth,
but adds about 0.5 dB of peaking.
0
4
8
12
16
20
24
28
32
36
40
44
0.1 110 100 1000
GAI N (dB)
FREQUENCY (MHz)
C
F
= 2pF
NO C
F
V
OUT
= 2V p-p
G = + 100
10186-049
Figure 53. Large Signal Frequency Response, G = +100, VS = ±5 V
To better balance the second stage and remove the current offset
contribution, an R1C1 circuit can be sized to correct for any
mis-match between the source impedance and the feedback
network impedance on the input amplifier. (In the example
shown in Figure 52, R1 = 249 Ω and C1 = 5 pF.) The offset of
each amplifier is within the same statistical range. As configured,
the offset of the output amplifier is not statistically significant to
the overall offset of the system.
Figure 53 was captured using a ±5 V supply; however, this circuit
also operates with supplies from ±1.5 V to ±5 V as long as the
input and output headroom values are not violated.
FEEDBACK CAPACITOR APPLICATION
For applications where frequency response flatness is necessary,
or a larger feedback resistor value is desired, a small feedback
capacitor in parallel with the feedback resistor can be used to
reduce peaking and increase flatness.
Figure 54 shows the small signal frequency response with and
without a feedback capacitor.
–15
–12
–9
–6
–3
0
3
6
110 100 1000
NORMALIZED CLOSED-LOOP GAI N ( dB)
FREQUENCY (MHz)
R
F
= 449Ω
R
F
= 1kΩ
R
F
= 1kΩ, C
F
= 0.5pF
R
F
= 499Ω, C
F
= 1pF
V
S
= ±2. 5V
V
OUT
= 200mV p - p
R
L
= 1kΩ
G = +10
ADA4895-1 SOIC
10186-153
Figure 54. Small Signal Frequency Response With and Without a Feedback
Capacitor
Rev. B | Page 20 of 24
Data Sheet ADA4895-1/ADA4895-2
Rev. B | Page 21 of 24
WIDEBAND PHOTOMULTIPLIER PREAMPLIFIER
A decompensated amplifier can provide significantly greater
speed in transimpedance applications than a unity-gain stable
amplifier. The speed increases by the square root of the ratio of
the bandwidth of the two amplifiers; that is, a 1 GHz GBP amplifier
is 10 times faster than a 10 MHz amplifier in the same trans-
impedance application if all other parameters are kept constant.
Additionally, the input voltage noise normally dominates the
total output rms noise because it is multiplied by the capacitive
noise gain network.
F
DFM
S
C
CCCC
In the case of the ADA4895-1/ADA4895-2, the input noise is
low, but the capacitive noise gain network must be kept greater
than 10 for stability reasons.
One disadvantage of using the ADA4895-1/ADA4895-2 in
transimpedance applications is that the input current and input
current noise can create large offsets and output voltage noise
when coupled with an excessively high feedback resistance. Despite
these two issues, the ADA4895-1/ADA4895-2 noise and gain
bandwidth can provide a significant increase in performance
within certain transimpedance ranges.
Figure 55 shows an I/V converter with an electrical model of a
photomultiplier.
–
+
V
OUT
V
B
C
F
+C
S
C
D
C
M
C
M
R
F
R
SH
C
S
I
PHOTO
C
F
R
F
10186-050
Figure 55. Wideband Photomultiplier Preamplifier
The basic transfer function is
FF
F
PHOTO
OUT RsC
RI
V
1
where IPHOTO is the output current of the photomultiplier, and
the parallel combination of RF and CF sets the signal bandwidth.
The stable bandwidth attainable with this preamplifier is a function
of RF, the gain bandwidth product of the amplifier, and the total
capacitance at the summing junction of the amplifier, including CS
and the amplifier input capacitance.
RF and the total capacitance produce a pole in the loop trans-
mission of the amplifier that can result in peaking and instability.
Adding CF creates a zero in the loop transmission that compensates
for the pole effect and reduces the signal bandwidth. It can be
shown that the signal bandwidth resulting in a 45° phase margin
(f(45)) is defined as follows:
S
F
45 CR
GBP
f
π2
where:
GBP is the gain bandwidth product.
RF is the feedback resistance.
CS is the total capacitance at the amplifier summing junction
(amplifier + photomultiplier + board parasitics).
The value of CF that produces f(45) is
GBPR
C
C
F
S
F
π2
The frequency response in this case shows approximately 2 dB
of peaking and 15% overshoot. Doubling CF and reducing the
bandwidth by half results in a flat frequency response with
approximately 5% transient overshoot.
The output noise over frequency for the preamplifier is shown
in Figure 56.
FREQUENCY (Hz)
V
O
L
T
AGE NOISE
RF NOISE
f
1
NOISE DUE TO AMPLIFIER
ven
f
2
1
2
π
R
F
f
1
=
f
2
= 1
2
π
R
F
C
F
f
3
= GBP
ven (C
S
+ C
M
+ C
F
+ C
D
)
/C
F
f
3
10186-051
(C
S
+ C
M
+ C
F
+ C
D
)
(C
S
+ C
M
+ C
F
+ C
D
)
/C
F
(nV/ Hz)
Figure 56. Photomultiplier Voltage Noise Contributions
Table 12. RMS Noise Contributions of Photomultiplier
Preamplifier
Contributor Expression
RF 5714 .fRkT 2
F
Amplifier ven
57.1
3
F
DFM
Sf
C
CCCC
ven
Amplifier ien 571.fRien 2
F
ADA4895-1/ADA4895-2 Data Sheet
LAYOUT CONSIDERATIONS
To ensure optimal performance, careful and deliberate attention
must be paid to the board layout, signal routing, power supply
bypassing, and grounding.
Ground Plane
It is important to avoid ground in the areas under and around the
input and output of the ADA4895-1/ADA4895-2. Stray capacitance
created between the ground plane and the input and output pads of
a device is detrimental to high speed amplifier performance. Stray
capacitance at the inverting input, along with the amplifier input
capacitance, lowers the phase margin and can cause instability.
Stray capacitance at the output creates a pole in the feedback
loop, which can reduce phase margin and can cause the circuit
to become unstable.
Power Supply Bypassing
Power supply bypassing is a critical aspect in the performance
of the ADA4895-1/ADA4895-2. A parallel connection of capacitors
from each power supply pin to ground works best. Smaller value
capacitor electrolytics offer better high frequency response, whereas
larger value capacitor electrolytics offer better low frequency
performance.
Paralleling different values and sizes of capacitors helps to ensure
that the power supply pins are provided with low ac impedance
across a wide band of frequencies. This is important for minimizing
the coupling of noise into the amplifier—especially when the
amplifier PSRR begins to roll off—because the bypass capacitors
can help lessen the degradation in PSRR performance.
Place the smallest value capacitor on the same side of the board
as the amplifier and as close as possible to the amplifier power
supply pins. Connect the ground end of the capacitor directly to
the ground plane.
It is recommended that a 0.1 µF ceramic capacitor with a 0508 case
size be used. The 0508 case size offers low series inductance and
excellent high frequency performance. Place a 10 µF electrolytic
capacitor in parallel with the 0.1 µF capacitor. Depending on the
circuit parameters, some enhancement to performance can be
realized by adding additional capacitors. Each circuit is different
and should be analyzed individually for optimal performance.
Rev. B | Page 22 of 24
Data Sheet ADA4895-1/ADA4895-2
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-BA
091709-A
6°
0°
0.70
0.55
0.40
5
10
1
6
0.50 BSC
0.30
0.15
1.10 MAX
3.10
3.00
2.90
COPLANARITY
0.10
0.23
0.13
3.10
3.00
2.90
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
Figure 57. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
CONTROLLING DIMENSIONSARE INMIL
LIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOTAPPROPRIATEFOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50(0.0196)
0.25(0.0099)45°
8°
0°
1.75
(0.0688)
1.35(0.0532)
SEATING
PLANE
0.25(0.0098)
0.10(0.0040)
4
1
85
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27(0.0500)
BSC
6.20(0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31(0.0122)
COPLANARITY
0.10
Figure 58. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
Rev. B | Page 23 of 24
ADA4895-1/ADA4895-2 Data Sheet
COMPLIANT TO JEDEC STANDARDS MO-178-AB
10°
4°
0°
SEATING
PLANE
1.90
BSC
0.95 BSC
0.60
BSC
6 5
1 2 3
4
3.00
2.90
2.80
3.00
2.80
2.60
1.70
1.60
1.50
1.30
1.15
0.90
0.15 MAX
0.05 MIN
1.45 MAX
0.95 MIN
0.20 MAX
0.08 MIN
0.50 MAX
0.30 MIN
0.55
0.45
0.35
PIN 1
INDICATOR
12-16-2008-A
Figure 59. 6-Lead Small Outline Transistor Package [SOT-23]
(RJ-6)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option
Ordering
Quantity Branding
ADA4895-1ARZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADA4895-1ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADA4895-1ARZ-RL −40°C to +125°C 8-Lead SOIC_N R-8 2,500
ADA4895-1ARJZ-R2 −40°C to +125°C 6-Lead SOT-23 RJ-6 250 H3D
ADA4895-1ARJZ-R7 −40°C to +125°C 6-Lead SOT-23 RJ-6 3,000 H3D
ADA4895-1AR-EBZ Evaluation Board for the 8-Lead SOIC_N
ADA4895-1ARJ-EBZ Evaluation Board for the 6-Lead SOT-23
ADA4895-2ARMZ −40°C to +125°C 10-Lead Mini Small Outline Package [MSOP] RM-10 50 H35
ADA4895-2ARMZ-R7
−40°C to +125°C
10-Lead Mini Small Outline Package [MSOP]
RM-10
1,000
H35
ADA4895-2ARMZ-RL −40°C to +125°C 10-Lead Mini Small Outline Package [MSOP] RM-10 3,000 H35
ADA4895-2ARM-EBZ Evaluation Board
1 Z = RoHS Compliant Part.
©2012–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10186-0-4/15(B)
Rev. B | Page 24 of 24
