© Semiconductor Components Industries, LLC, 2010
September, 2010 − Rev. 1
1Publication Order Number:
7SB3126/D
7SB3126
Bus Switch
The 7SB3126 Bus Switch is an advanced high−speed line switch in
ultra−small footprint.
Features
•High Speed: tPD = 0.25 ns (Max) @ VCC = 4.5 V
•3 W Switch Connection Between 2 Ports
•Power Down Protection Provided on Inputs
•Ultra−Small Packages
•These are Pb−Free Devices
Figure 1. Logic Diagram
Figure 2. TSOP−5/SC−88A
(Top View)
BA
OE
OE
A
GND
VCC
B
1
2
3
5
4
OE
A
GND
VCC
B
NC
1
2
3
6
5
4
Figure 3. ULLGA6/UDFN6
(Top View)
Function Table
Input OE Function
L Disconnect
HB = A
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAMS
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1
1
1
ULLGA6
1.0 x 1.0
CASE 613AD
ULLGA6
1.2 x 1.0
CASE 613AE
ULLGA6
1.45 x 1.0
CASE 613AF
J
M
1
5
1
5
AF MG
G
(Note: Microdot may be in either location)
AJ, AF, J, 6, A, K = Specific Device Code
M = Date Code
G= Pb−Free Package
SOT23−5/TSOP−5/SC59−5
DT SUFFIX
CASE 483
SOT−353/SC70−5/SC−88A
DF SUFFIX
CASE 419A
1
5
AJ MG
G
G
M
G
M
G
1
5
UDFN6
1.2 x 1.0
CASE 517AA
K
M
G
1
6
A
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2
Table 1. MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC DC Supply Voltage −0.5 to +7.0 V
VIN Control Pin Input Voltage −0.5 to +7.0 V
VI/O Switch Input / Output Voltage −0.5 to +7.0 V
IIK Control Pin DC Input Diode Current VIN < GND −50 mA
IOK Switch I/O Port DC Diode Current VI/O < GND −50 mA
IOOn−State Switch Current ±128 mA
Continuous Current Through VCC or GND ±150 mA
ICC DC Supply Current per Supply Pin ±150 mA
IGND DC Ground Current per Ground Pin ±150 mA
TSTG Storage Temperature Range −65 to +150 °C
TLLead Temperature, 1 mm from Case for 10 Seconds 260 °C
TJJunction Temperature Under Bias 150 °C
qJA Thermal Resistance SC70−5/SC−88A (Note 1)
TSOP−5
ULLGA6/UDFN6
350
230
496
°C/W
PDPower Dissipation in Still Air at 85°C SC70−5/SC−88A (Note 1)
TSOP−5
ULLGA6/UDFN6
150
200
252
mW
MSL Moisture Sensitivity Level 1
FRFlammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
VESD ESD Withstand Voltage Human Body Mode (Note 2)
Machine Mode (Note 3)
Charged Device Mode (Note 4)
>2000
>200
N/A
V
ILATCHUP Latchup Performance Above VCC and Below GND at 85°C (Note 5) ±100 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA/ JESD22−A114−A
3. Tested to EIA/ JESD22−A115−A
4. Tested to JESD22−C101−A
5. Tested to EIA / JESD78.
Table 2. RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC Positive DC Supply Voltage 4.0 5.5 V
VIControl Pin Input Voltage 0 5.5 V
VI/O Switch Input / Output Voltage 0 5.5 V
TAOperating Free−Air Temperature −55 +125 °C
Dt / DVInput Transition Rise or Fall Rate Control Input
Switch I/O
0
0
5
DC
nS/V
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Table 3. DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Conditions VCC (V)
TA = 255C TA = −555C to +1255C
Unit
Min Typ Max Min Max
VIK Clamp Diode Voltage IIN = −18 mA 4.5 −1.2 −1.2 V
VIH High−Level Input Voltage
(Control)
4.0 to 5.5 2.0 2.0 V
VIL Low−Level Input Voltage
(Control)
4.0 to 5.5 0.8 0.8 V
IIN Input Leakage Current 0 ≤ VIN ≤ 5.5 V 5.5 ±0.1 ±1.0 mA
IOFF Power Off Leakage Current VI/O = 0 to 5.5 V 0±0.1 ±1.0 mA
ICC Quiescent Supply Current IO = 0, VIN =
VCC or 0 V
5.5 ±0.1 ±1.0 mA
DICC Increase in Supply Current
(Control Pin)
One input at 3.4
V; Other inputs
at VCC or GND
5.5 2.5 mA
RON Switch ON Resistance VI/O = 0,
II/O = 64 mA
II/O = 30 mA
4.5
3
3
7
7
7
7
W
VI/O = 2.4,
II/O = 15 mA
4.5
6 15 15
VI/O = 2.4,
II/O = 15 mA
4.0
10 20 20
Table 4. AC ELECTRICAL CHARACTERISTICS
Symbol Parameter VCC (V) Test Condition
TA = 255C
TA = −555C
to +1255C
Unit
Min Typ Max Min Max
tPD Propagation Delay,
A to B or B to A
4.0 to 5.5 See Figure 3 0.25 0.25 ns
0.25 0.25
tEN Output Enable Time 4.5 to 5.5 0.8 2.5 4.2 0.8 4.2 ns
4.0 0.8 3.0 4.6 0.8 4.6
tDIS Output Disable Time 4.5 to 5.5 0.8 3.1 4.8 0.8 4.8 ns
4.0 0.8 2.9 4.4 0.8 4.4
CIN Control Input Capacitance 5.0 VIN = 3 V or 0 2.0 pF
CIO(ON) Switch On Capacitance 5.0 Switch ON 10 pF
CIO(OFF) Switch Off Capacitance 5.0 Switch OFF 3.5 pF
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4
AC Loading and Waveforms
Figure 4. Load Circuit and Voltage Waveforms
500 W
CL = 50 pF
(see Note A)
7 V
From Output
Under Test
500 WS1 Open
GND
LOAD CIRCUIT
TEST S1
tPD
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
GND
Input 1.5 V 1.5 V
1.5 V 1.5 V
tPLH
tPHL
Output
3 V
VOH
0 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
tPZL
3 V
1.5 V
1.5 V
0 V
Output
Control
tPLZ
tPZH tPHZ
1.5 V
1.5 V
3.5 V
0 V
VOL
VOH
VOL + 0.3 V
VOH − 0.3 V
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The output is measured with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
DEVICE ORDERING INFORMATION
Device Package Shipping†
7SB3126DTT1G TSOP−5
(Pb−Free)
3000 / Tape & Reel
7SB3126DFT2G SC−88A
(Pb−Free)
3000 / Tape & Reel
7SB3126AMX1TCG ULLGA6 − 0.5 mm Pitch
(Pb−Free)
3000 / Tape & Reel
7SB3126BMX1TCG ULLGA6 − 0.4 mm Pitch
(Pb−Free)
3000 / Tape & Reel
7SB3126CMX1TCG ULLGA6 − 0.35 mm Pitch
(Pb−Free)
3000 / Tape & Reel
7SB3126MUTCG UDFN6 − 0.4 mm Pitch
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
7SB3126
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5
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
DIM
A
MIN MAX MIN MAX
MILLIMETERS
1.80 2.200.071 0.087
INCHES
B1.15 1.350.045 0.053
C0.80 1.100.031 0.043
D0.10 0.300.004 0.012
G0.65 BSC0.026 BSC
H--- 0.10---0.004
J0.10 0.250.004 0.010
K0.10 0.300.004 0.012
N0.20 REF0.008 REF
S2.00 2.200.079 0.087
B0.2 (0.008) MM
12 3
45
A
G
S
D 5 PL
H
C
N
J
K
−B−
SC−88A, SOT−353, SC−70
CASE 419A−02
ISSUE J
7SB3126
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6
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE H NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
DIM MIN MAX
MILLIMETERS
A3.00 BSC
B1.50 BSC
C0.90 1.10
D0.25 0.50
G0.95 BSC
H0.01 0.10
J0.10 0.26
K0.20 0.60
L1.25 1.55
M0 10
S2.50 3.00
123
54 S
A
G
L
B
D
H
C
J
__
0.7
0.028
1.0
0.039
ǒmm
inchesǓ
SCALE 10:1
0.95
0.037
2.4
0.094
1.9
0.074
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.20
5X
CAB
T0.10
2X
2X T0.20
NOTE 5
T
SEATING
PLANE
0.05
K
M
DETAIL Z
DETAIL Z
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7
PACKAGE DIMENSIONS
UDFN6 1.2x1.0, 0.4P
CASE 517AA−01
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
ÉÉÉ
ÉÉÉ
A
B
E
D
BOTTOM VIEW
b
e
6X
0.10 B
0.05
AC
C
L5X
NOTE 3
2X
0.10 C
PIN ONE
REFERENCE
TOP VIEW
2X
0.10 C
10X
A
A1
(A3)
0.08 C
0.10 C
C
SEATING
PLANE
SIDE VIEW
L2
13
46
DIM MIN MAX
MILLIMETERS
A0.45 0.55
A1 0.00 0.05
A3 0.127 REF
b0.15 0.25
D1.20 BSC
E1.00 BSC
e0.40 BSC
L0.30 0.40
L1 0.00 0.15
MOUNTING FOOTPRINT*
DIMENSIONS: MILLIMETERS
0.22
6X
0.42 6X
1.07
0.40
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
L1
DETAIL A
Bottom View
(Optional)
ÉÉÉ
ÉÉÉ
ÉÉÉ
A1
A3
DETAIL B
Side View
(Optional)
EDGE OF PACKAGE
MOLD CMPD
EXPOSED Cu
L2 0.40 0.50
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8
PACKAGE DIMENSIONS
ULLGA6 1.0x1.0, 0.35P
CASE 613AD−01
ISSUE A NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
ÉÉ
ÉÉ
A
B
E
D
BOTTOM VIEW
b
e
6X
0.10 B
0.05
AC
C
L5X
NOTE 3
0.10 C
PIN ONE
REFERENCE
TOP VIEW
0.10 C
6X
A
A1
0.05 C
0.05 C
C
SEATING
PLANE
SIDE VIEW
L1
13
46
DIM MIN MAX
MILLIMETERS
A−−− 0.40
A1 0.00 0.05
b0.12 0.22
D1.00 BSC
E1.00 BSC
e0.35 BSC
L0.25 0.35
L1 0.30 0.40
NOTE 4
SOLDERMASK DEFINED*
DIMENSIONS: MILLIMETERS
0.22
5X
0.48 6X
1.18
0.53 PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
0.35
1
MOUNTING FOOTPRINT
PKG
OUTLINE
7SB3126
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9
PACKAGE DIMENSIONS
ULLGA6 1.2x1.0, 0.4P
CASE 613AE−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
ÉÉ
ÉÉ
ÉÉ
A
B
E
D
BOTTOM VIEW
b
e
6X
0.10 B
0.05
AC
C
L5X
NOTE 3
0.10 C
PIN ONE
REFERENCE
TOP VIEW
0.10 C
6X
A
A1
0.05 C
0.05 C
C
SEATING
PLANE
SIDE VIEW
L1
13
46
DIM MIN MAX
MILLIMETERS
A−−− 0.40
A1 0.00 0.05
b0.15 0.25
D1.20 BSC
E1.00 BSC
e0.40 BSC
L0.25 0.35
L1 0.35 0.45
NOTE 4
SOLDERMASK DEFINED*
DIMENSIONS: MILLIMETERS
0.26
5X
0.49 6X
1.24
0.53
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
0.40
1
MOUNTING FOOTPRINT
PKG
OUTLINE
7SB3126
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10
PACKAGE DIMENSIONS
ULLGA6 1.45x1.0, 0.5P
CASE 613AF−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
ÉÉÉ
ÉÉÉ
ÉÉÉ
A
B
E
D
BOTTOM VIEW
b
e
6X
0.10 B
0.05
AC
C
L5X
NOTE 3
0.10 C
PIN ONE
REFERENCE
TOP VIEW
0.10 C
6X
A
A1
0.05 C
0.05 C
C
SEATING
PLANE
SIDE VIEW
L1
13
46
DIM MIN MAX
MILLIMETERS
A−−− 0.40
A1 0.00 0.05
b0.15 0.25
D1.45 BSC
E1.00 BSC
e0.50 BSC
L0.25 0.35
L1 0.30 0.40
NOTE 4
SOLDERMASK DEFINED*
DIMENSIONS: MILLIMETERS
0.30
5X
0.49 6X
1.24
0.53
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
0.50
1
MOUNTING FOOTPRINT
PKG
OUTLINE
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
7SB3126/D
PUBLICATION ORDERING INFORMATION
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
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