LTC3124IDHC#PBF - LINEAR TECHNOLOGY

LTC3124

3124f

For more information www.linear.com/LTC3124

TYPICAL APPLICATION

FEATURES DESCRIPTION

15V, 5A 2-Phase Synchronous

Step-Up DC/DC Converter with

Output Disconnect

The LTC

3124 is a dual-phase, synchronous step-up DC/

DC converter with true output disconnect and inrush

current limiting capable of providing output voltages up

to 15V. Dual-phase operation significantly reduces peak

inductor and capacitor ripple currents, minimizing induc-

tor and capacitor size. The 2.5A per phase current limit,

along with the ability to program output voltages up to 15V

make the LTC3124 well suited for a variety of demanding

applications. Once started, operation will continue with

inputs down to 500mV.

The LTC3124 switching frequency can be programmed

from 100kHz to 3MHz to optimize applications for highest

efficiency or smallest solution footprint. The oscillator can

be synchronized to an external clock for noise sensitive

applications. Selectable Burst Mode operation reduces

quiescent current to 25µA, ensuring high efficiency across

the entire load range. An internal soft-start limits inrush

current during start-up.

Other features include a <1µA shutdown current and robust

protection under short-circuit, thermal overload, and output

overvoltage conditions. The LTC3124 is offered in both

16-lead DFN and thermally-enhanced TSSOP packages.

5V to 12V Synchronous Boost Converter Efficiency Curve

APPLICATIONS

n VIN Range: 1.8V to 5.5V, 500mV After Start-Up

n Adjustable Output Voltage: 2.5V to 15V

n 1.5A Output Current for VIN = 5V and VOUT = 12V

n Dual-Phase Control Reduces Output Voltage Ripple

n Output Disconnects from Input When Shut Down

n Synchronous Rectification: Up to 95% Efficiency

n Inrush Current Limit

n Up to 3MHz Programmable Switching Frequency

Synchronizable to External Clock

n Selectable Burst Mode

Operation: 25µA IQ

n Output Overvoltage Protection

n Internal Soft-Start

n <1µA IQ in Shutdown

n 16-Lead, Thermally- Enhanced 3mm × 5mm ×

0.75mm DFN and TSSOP Packages

n RF, Microwave Power Amplifiers

n Piezo Actuators

n Small DC Motors, Thermal Printers

n 12V Analog Rail from Battery, 5V, or Backup Capacitor

L, LT, LT C, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks

and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners.

100nF V

OUT

12V

1.5A

22µF

×2

4.7µH

5V SWB CAP

PGNDB VOUTB

SWA

LTC3124

680pF

56pF

3124 TA01a

4.7µF

10µF

1.02M

113k

84.5k

28k

OFF ON

VIN SGND

PWM/SYNC SD

VCC FB

RT VC

PGNDA

VOUTA

BURST PWM

100

0.1

0.01

0.001

0.0001

LOAD CURRENT (mA)

EFFICIENCY (%)

POWER LOSS (W)

3124 TA01b

0.01 1000100

PWM

100.1 1

Burst Mode

OPERATION

Burst Mode

OPERATION

EFFICIENCY

POWER LOSS

fSW = 1MHz

LTC3124

3124f

For more information www.linear.com/LTC3124

ABSOLUTE MAXIMUM RATINGS

VIN Voltage ................................................... –0.3V to 6V

VOUTA, VOUTB Voltages ............................... –0.3V to 18V

SWA, SWB Voltages (Note 2) ..................... –0.3V to 18V

SWA, SWB (Pulsed < 100ns) (Note 2) ....... –0.3V to 19V

VC Voltage ..................................................–0.3V to VCC

RT Voltage ..................................................–0.3V to VCC

CAP Voltage

VOUT < 5.7V ............................–0.3V to (VOUT + 0.3V)

5.7V ≤ VOUT ≤ 11.7V......(VOUT – 6V) to (VOUT + 0.3V)

VOUT > 11.7V .................................(VOUT – 6V) to 12V

All Other Pins ............................................... –0.3V to 6V

Operating Junction Temperature Range (Notes 3, 4)

LTC3124E/LTC3124I ........................... –40°C to 125°C

LTC3124H .......................................... –40°C to 150°C

Storage Temperature Range ..................–65°C to 150°C

Lead Temperature (Soldering, 10 sec)

FE Package Only ...............................................300°C

(Note 1)

PGND

CAP

OUTB

OUTA

SGND

SWB

PGNDB

SWA

PGNDA

VIN

PWM/SYNC

VCC

TOP VIEW

DHC PACKAGE

16-LEAD (5mm × 3mm) PLASTIC DFN

TJMAX = 125°C, θJA = 43°C/W (NOTE 5), θJC = 5°C/W

EXPOSED PAD (PIN 17) IS PGND AND MUST BE SOLDERED TO PCB

FOR RATED THERMAL PERFORMANCE

FE PACKAGE

16-LEAD PLASTIC TSSOP

TOP VIEW

SWB

PGNDB

SWA

PGNDA

VIN

PWM/SYNC

VCC

CAP

OUTB

OUTA

SGND

PGND

TJMAX = 150°C, θJA = 40°C/W (NOTE 5), θJC = 10°C/W

EXPOSED PAD (PIN 17) IS PGND AND MUST BE SOLDERED TO PCB

FOR RATED THERMAL PERFORMANCE

PIN CONFIGURATION

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC3124EDHC#PBF LTC3124EDHC#TRPBF 3124 16-Lead (5mm × 3mm) Plastic DFN –40°C to 125°C

LTC3124IDHC#PBF LTC3124IDHC#TRPBF 3124 16-Lead (5mm × 3mm) Plastic DFN –40°C to 125°C

LTC3124EFE#PBF LTC3124EFE#TRPBF 3124FE 16-Lead Plastic TSSOP –40°C to 125°C

LTC3124IFE#PBF LTC3124IFE#TRPBF 3124FE 16-Lead Plastic TSSOP –40°C to 125°C

LTC3124HFE#PBF LTC3124HFE#TRPBF 3124FE 16-Lead Plastic TSSOP –40°C to 150°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping

container.Consult LTC Marketing for information on non-standard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

LTC3124

3124f

For more information www.linear.com/LTC3124

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: Voltage transients on the SW pin beyond the DC limit specified in

the Absolute Maximum Ratings are non-disruptive to normal operations

when using good layout practices, as shown on the demo board or

described in the data sheet or application notes.

Note 3: The LTC3124 is tested under pulsed load conditions such that

TA ≈ TJ. The LTC3124E is guaranteed to meet performance specifications

from 0°C to 85°C junction temperature. Specifications over the –40°C

to 125°C operating junction temperature range are assured by design,

characterization and correlation with statistical process controls. The

LTC3124I is guaranteed to meet specifications over the –40°C to 125°C

operating junction temperature range. The LTC3124H is guaranteed to

meet specifications over the full –40°C to 150°C operating junction range.

High junction temperatures degrade operating lifetimes; operating lifetime

is derated for junction temperatures greater than 125°C.

Note that the maximum ambient temperature consistent with these

specifications is determined by specific operating conditions in

conjunction with board layout, the rated package thermal impedance

and other environmental factors. The junction temperature (TJ in °C) is

calculated from the ambient temperature (TA in °C) and power dissipation

(PD in Watts) according to the formula:

TJ = TA + (PD • θJA)

where θJA is the thermal impedance of the package.

Note 4: The LTC3124 includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 150°C when overtemperature shutdown is active.

Continuous operation above the specified maximum operating junction

temperature may result in device degradation or failure.

Note 5: Failure to solder the exposed backside of the package to the PC

board ground plane will result in a thermal impedance much higher than

the rated package specifications.

The l denotes the specifications which apply over the specified operating

junction temperature range, otherwise specifications are at TA = 25°C (Note 3). VIN = 3.6V, VOUTA = VOUTB = 12V, RT = 28k unless

otherwise noted.

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Start-Up Voltage VOUT = 0V l1.6 1.8 V

Input Voltage Range VOUT ≥ 2.5V l0.5 5.5 V

Output Voltage Adjust Range l2.5 15 V

Feedback Voltage l1.176 1.200 1.224 V

Feedback Input Current FB = 1.4V 1 50 nA

Quiescent Current, Shutdown SD = 0V, VOUT = 0V, Not Including Switch Leakage 0.2 1 µA

Quiescent Current, Active FB = 1.4V, Measured on VIN, Non-Switching 600 840 µA

Quiescent Current, Burst Measured on VIN, FB = 1.4V

Measured on VOUT, FB = 1.4V 25

10 40

20 µA

µA

N-Channel MOSFET Switch Leakage Current SW = 15V, VOUT = 15V, Per Phase l0.1 40 µA

P-Channel MOSFET Switch Leakage Current SW = 0V, VOUT = 15V, SD = 0V, Per Phase l0.1 70 µA

N-Channel MOSFET Switch On-Resistance Per Phase 0.130 Ω

P-Channel MOSFET Switch On-Resistance Per Phase 0.200 Ω

N-Channel MOSFET Peak Current Limit Per Phase l2.5 3.5 4.5 A

Maximum Duty Cycle FB = 1.0V l90 94 %

Minimum Duty Cycle FB = 1.4V l0 %

Switching Frequency Per Phase l0.83 1 1.17 MHz

SYNC Frequency Range l0.2 6.0 MHz

PWM/SYNC Input High Voltage l0.9 • VCC V

PWM/SYNC Input Low Voltage l0.1 • VCC V

PWM/SYNC Input Current VPWM/SYNC = 5.5V 0.01 1 µA

CAP Clamp Voltage VOUT > 6.2V, Referenced to VOUT –5.0 –5.4 –5.8 V

VCC Regulation Voltage VIN < 2.8V, VOUT > 5V 3.9 4.25 4.6 V

Error Amplifier Transconductance l60 100 130 µS

Error Amplifier Sink Current FB = 1.6V, VC = 1.15V 25 µA

Error Amplifier Source Current FB = 800mV, VC = 1.15V –25 µA

Soft-Start Time 10 ms

SD Input High Voltage l1.6 V

SD Input Low Voltage l0.25 V

SD Input Current SD = 5.5V 1 2 µA

LTC3124

3124f

For more information www.linear.com/LTC3124

TYPICAL PERFORMANCE CHARACTERISTICS

PWM Mode Operation Load Transient Response Inrush Current Control

Feedback vs Temperature

RDS(ON) vs Temperature,

Both NMOS and PMOS

Switching Frequency

vs Temperature

Efficiency vs Load Current,

VOUT = 5V

Efficiency vs Load Current,

VOUT = 7.5V

Efficiency vs Load Current,

VOUT = 12V

100

LOAD CURRENT (mA)

EFFICIENCY (%)

3124 G01

0.01 1000100

PWM

100.1 1

VIN = 4.2V

VIN = 3.3V

VIN = 0.6V

Burst Mode

OPERATION

fSW = 1MHz

100

LOAD CURRENT (mA)

EFFICIENCY (%)

3124 G02

0.01 1000100

PWM

100.1 1

VIN = 5.4V

VIN = 3.8V

VIN = 2.3V

Burst Mode

OPERATION

fSW = 1MHz

100

LOAD CURRENT (mA)

EFFICIENCY (%)

3124 G03

0.01 1000100

PWM

100.1 1

VIN = 5.4V

VIN = 4.2V

VIN = 2.6V

Burst Mode

OPERATION

fSW = 1MHz

TEMPERATURE (°C)

–50

CHANGE IN RDS(ON) FROM 25°C (%)

–20

–40 70 110–10

3124 G08

30 150

VOUT

20mV/DIV

AC-COUPLED

PHASE A

INDUCTOR

CURRENT

500mA/DIV

PHASE B

INDUCTOR

CURRENT

500mA/DIV

2µs/DIVILOAD = 500mA 3124 G04

VOUT

500mV/DIV

AC-COUPLED

OUTPUT

CURRENT

500mA/DIV

500µs/DIVRC = 169k

CC = 330pF

NO CF

3124 G05

150mA 150mA

1500mA

5V/DIV

VOUT

5V/DIV

INDUCTOR A

CURRENT

1A/DIV

INDUCTOR B

CURRENT

1A/DIV

2ms/DIVI

LOAD

= 100mA 3124 G06

TEMPERATURE (°C)

–40

CHANGE IN VFB FROM 25°C (%)

–0.20

–0.15

–0.10

80 160

3124 G07

–0.25

–0.30

–0.35 0 40 120

–0.05

0.05

TEMPERATURE (°C)

–50 –20

–2.0

CHANGE IN FREQUENCY FROM 25°C (%)

–1.0

0.5

10 70 100

3124 G09

–1.5

–0.5

40 130 160

Configured as front page application at TA = 25°C, unless otherwise specified.

LTC3124

3124f

For more information www.linear.com/LTC3124

TYPICAL PERFORMANCE CHARACTERISTICS

Burst Mode Output Current vs VIN

Burst Mode No-Load Input

Current vs VIN

Burst Mode Quiescent Current

Change vs Temperature

SD Pin Threshold

PWM Mode Maximum Output

Current vs VIN

Peak Current Limit Change

vs Temperature

PWM Operation No-Load Input

Current vs VIN

VIN (V)

OUTPUT CURRENT (A)

2.4

3.2

4.0

3124 G10

1.6

0.8

2.0

2.8

3.6

1.2

0.4

0234

1.50.5 2.5 3.5 4.5 5.5

VOUT = 5V

VOUT = 7.5V

VOUT = 12V

VOUT = 15V

TEMPERATURE (°C)

–50

PEAK CURRENT LIMIT CHANGE FROM 25°C (%)

–1

–2

–3

–4 70 110–10

3124 G11

30 150

VIN (V)

INPUT CURRENT (mA)

120

160

200

3124 G12

100

140

180

0234

1.50.5 2.5 3.5 4.5 5.5

VOUT = 15V

VOUT = 12V

VOUT = 7.5V

VOUT = 5V

VOUT = 2.5V

VIN, FALLING (V)

OUTPUT CURRENT (mA)

300

400

3124 G13

200

100

250

350

150

0234

1.50.5 2.5 3.5 4.5 5.5

VOUT = 2.5V

VOUT = 5V

VOUT = 7.5V

VOUT = 12V

VOUT = 15V

VIN, FALLING (V)

0.5 1 1.5 2

INPUT CURRENT (µA)

100

1000

10000

2.5 3 3.5 4 4.5 5 5.5

3124 G14

VOUT = 15V

VOUT = 12V

VOUT = 7.5V

VOUT = 5V

VOUT = 2.5V

1s/DIV 3124 G16

VOUT

5V/DIV

VSD

500mV/DIV

900mV

400mV

RT vs Frequency

Configured as front page application at TA = 25°C, unless otherwise specified.

FREQUENCY (kHz)

100

RT RESISTANCE (kΩ)

100

1000 3000

3124 G17

TEMPERATURE (°C)

–50

CHANGE IN CURRENT FROM 25°C (%)

–15 70 110–10

3124 G15

30 150

LTC3124

3124f

For more information www.linear.com/LTC3124

TYPICAL PERFORMANCE CHARACTERISTICS

Burst Mode Operation

Burst Mode Operation to

PWM Mode

PWM Mode to Burst Mode

Operation Burst Mode Transient Synchronized Operation

Efficiency vs FrequencyFrequency Accuracy CAP Pin Voltage vs VOUT

VCC vs VIN

VIN, FALLING (V)

0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

CHANGE IN FREQUENCY (%)

3124 G19

–1

–2 5.5

VOUT = 15V

VOUT = 3.6V

VOUT = 2.5V

VOUT (V)

VCAP, REFERRED TO VOUT (V)

–3

–4

–5

–2

–1

–6

–7 10642

3124 G21

8 1412

VIN (V)

VCC (V)

4.5

4.0

3.5

3.0

2.5 421

3124 G22

3 65

VIN FALLING

VIN RISING

VOUT

100mV/DIV

AC-COUPLED

VSWA

10V/DIV

PHASE A

INDUCTOR

CURRENT

500mA/DIV

5µs/DIV

OUTPUT CURRENT = 50mA

3124 G23

VOUT

50mV/DIV

AC-COUPLED

VPWM/SYNC

2V/DIV

50µs/DIV

OUTPUT CURRENT = 100mA

TYPE III COMPENSATION—SEE FIGURE 10 FOR

COMPONENT VALUES

3124 G25

VOUT

100mV/DIV

AC-COUPLED

OUTPUT

CURRENT

100mA/DIV

200µs/DIV 3124 G26

100mA

10mA10mA

VSWB

10V/DIV

VSWA

10V/DIV

VPWM/SYNC

5V/DIV

1µs/DIV

OUTPUT CURRENT = 1A

3124 G27

SYNCHRONIZATION SIGNAL SET TO 2.6MHz

SYNCHRONIZED TO 1.3MHz

OUTPUT CURRENT (mA)

EFFICIENCY (%)

100 1000

3124 G20

100

100kHz EFFICIENCY

1MHz EFFICIENCY

3MHz EFFICIENCY

VOUT

50mV/DIV

AC-COUPLED

VPWM/SYNC

2V/DIV

50µs/DIV

OUTPUT CURRENT = 100mA

TYPE III COMPENSATION—SEE FIGURE 10 FOR

COMPONENT VALUES

3124 G24

Configured as front page application at TA = 25°C, unless otherwise specified.

LTC3124

3124f

For more information www.linear.com/LTC3124

TYPICAL PERFORMANCE CHARACTERISTICS

Output Voltage Ripple at 1.5A

Load with Two 10µF Ceramic

Capacitors

SWA and SWB at 1MHz/Phase

SW Pins while Synchronizing

to 1.2MHz

Short-Circuit Response

PIN FUNCTIONS

SWB, SWA (Pin 1, Pin 3): Phase B and Phase A Switch

Pins. Connect inductors from these pins to the input sup-

ply. Keep PCB trace lengths as short and wide as possible

to reduce EMI and voltage overshoot. When VOUT ≥ VIN +

2V, internal anti-ringing resistors are connected between

VIN and both SWA and SWB after their respective induc-

tor currents have dropped to near zero, to minimize EMI.

These anti-ringing resistors are also activated in shutdown

and during the sleep periods of Burst Mode operation.

PGNDB, PGNDA, PGND (Pin 2, Pin 4, Exposed Pad

Pin17): Power Ground. When laying out your PCB, provide

a short, direct path between PGND and the output capaci-

tors and tie directly to the ground plane. The exposed pad

is ground and must be soldered to the PCB ground plane

for rated thermal and electrical performance.

VIN (Pin 5): Input Supply Pin. The device is powered from

VIN if VIN is initially greater than approximately 3.5V, with

VIN continuing to supply the device down to approximately

3V; otherwise the greater of VIN and VOUT supplies the

Configured as front page application at TA = 25°C, unless otherwise specified.

VOUT

5V/DIV

INDUCTOR B

CURRENT

2A/DIV

INDUCTOR A

CURRENT

2A/DIV

100µs/DIVILOAD = 500mA 3124 G28

SHORT-CIRCUIT

APPLIED

SHORT-CIRCUIT

REMOVED

VSWA

5V/DIV

VSWB

5V/DIV

500ns/DIVILOAD = 1500mA 3124 G29

INDUCTOR B

CURRENT

500mA/DIV

INDUCTOR A

CURRENT

500mA/DIV

VOUT

20mV/DIV

AC-COUPLED

500ns/DIV 3124 G31

VSWA

5V/DIV

VSWB

5V/DIV

500ns/DIVILOAD = 1500mA 3124 G30

LTC3124

3124f

For more information www.linear.com/LTC3124

PIN FUNCTIONS

device. Place a low ESR ceramic bypass capacitor of at

least 10µF from VIN to PGND. X5R and X7R dielectrics

are preferred for their superior voltage and temperature

characteristics.

PWM/SYNC (Pin 6): Burst Mode Operation Select and

Oscillator Synchronization. Do not leave this pin floating.

• PWM/SYNC = High. Disable Burst Mode operation and

maintain low noise, constant frequency operation.

• PWM/SYNC = Low. The converter operates in Burst

Mode, independent of load current.

• PWM/SYNC = External CLK. The internal oscillator is

synchronized to the external CLK signal. Burst Mode

operation is disabled. A clock pulse width of 100ns

minimum is required to synchronize the oscillator.

An external resistor MUST BE connected between RT

and SGND to program the oscillator slightly below the

desired synchronization frequency.

In non-synchronized applications, repeated clocking of

the PWM/SYNC pin to affect an operating mode change

is supported with these restrictions:

• Boost Mode (VOUT > VIN): IOUT < 3mA: fPWM/SYNC ≤

10Hz, IOUT ≥ 3mA: fPWM/SYNC ≤ 5kHz.

• Buck Mode (VOUT < VIN): IOUT < 5mA: fPWM/SYNC ≤

2.5Hz, IOUT ≥ 5mA: fPWM/SYNC ≤ 5kHz.

VCC (Pin 7): VCC Regulator Output. Connect a low ESR

filter capacitor of at least 4.7µF from this pin to SGND to

provide a regulated rail approximately equal to the lower of

VIN and 4.25V. When VOUT is higher than VIN, and VIN falls

below 3V, VCC will regulate to the lower of approximately

VOUT and 4.25V. A UVLO event occurs if VCC drops below

1.5V, typical. Switching is inhibited, and a soft-start is

initiated when VCC returns above 1.6V, typical.

RT (Pin 8): Frequency Adjust Pin. Connect to SGND

through an external resistor (RT) to program the oscillator

frequency according to the formula:

fOSC ≅

fSWITCH =fOSC

2≅28

where fOSC is in MHz and RT is in kΩ.

VC (Pin 9): Error Amplifier Output. A frequency com-

pensation network is connected from this pin to SGND

to compensate the control loop. See Compensating the

Feedback Loop section for guidelines.

FB (Pin 10): Feedback Input to the Error Amplifier. Con-

nect the resistor divider tap to this pin. Connect the top

of the divider to VOUT and the bottom of the divider to

SGND. The output voltage can be adjusted from 2.5V to

15V according to the formula:

VOUT =1.2V • 1+











SD (Pin 11): Logic Controlled Shutdown Input. Pulling this

pin above 1.6V enables normal, free-running operation.

Forcing this pin below 0.25V shuts the LTC3124 off, with

quiescent current below 1µA. Do not leave this pin floating.

SGND (Pin 12): Signal Ground. When laying out your PC

board, provide a short, direct path between SGND and the

ground referenced sides of all the appropriate components

connecting to pins RT, VC, and FB.

VOUTA, VOUTB (Pin 13, Pin 15): Output Voltage Senses and

the Source of the Internal Synchronous Rectifier MOSFETs.

Driver bias is derived from VOUT. Connect the output filter

capacitor from VOUT to PGND, close to the IC. A minimum

value of 10µF ceramic per phase is recommended. VOUT is

disconnected from VIN when SD is low. VOUTA and VOUTB

must be tied together.

NC (Pin 14): No Connect. Not connected internally. Connect

this pin to VOUTA/VOUTB to provide a wider VOUT copper

plane on the printed circuit board.

CAP (Pin 16): Serves as the Low Reference for the Syn-

chronous Rectifiers Gate Drives. Connect a low ESR filter

capacitor (typically 100nF) from this pin to VOUT to provide

an elevated ground rail, approximately 5.4V below VOUT,

used to drive the synchronous rectifiers.

LTC3124

3124f

For more information www.linear.com/LTC3124

BLOCK DIAGRAM

––

PWM

LOGIC

AND

DRIVERS

PWM

COMP

CURRENT

SENSE IZERO

COMP

–

+–

3.5A

SWB

ANTI-

RING

VIN

16.5V

OVLO

STOP SWITCHING

VOUTB

CCAP

100nF

CAP

IPEAK

COMP

ADAPTIVE SLOPE COMP

VOUT – 5.4V RAIL

SHUT

DOWN

BULK

CONTROL

SIGNALS

NC 14

151

SWA

PGNDB PWM/SYNC

VCC

EXPOSED

PAD

3124 BD

VIN

––

PWM

LOGIC

AND

DRIVERS

Burst

Mode

CONTROL

4.25V

LDO SOFT-

START

gm ERROR

AMPLIFIER

PWM

COMP

CURRENT

SENSE IZERO

COMP

BURST

SLEEP

–

+–

3.5A VIN

VREFUP

VCC

VIN

TSD

VOUTA

IPEAK

COMP

ADAPTIVE SLOPE COMP

REFERENCE

1.2V

THERMAL SD

OSCILLATOR

BULK

CONTROL

SIGNALS

FB 10

–

ANTI-

RING

CIN

VIN

1.8V TO 5.5V

SGND

PGNDA

4 17

CVCC

COUT

VOUT

2.5V TO 15V

SYNC

LTC3124

3124f

For more information www.linear.com/LTC3124

OPERATION

The LTC3124 is a dual-phase, adjustable frequency (100kHz

to 3MHz) synchronous boost converter housed in either a

16-lead 5mm × 3mm DFN or a thermally-enhanced TSSOP

package. The LTC3124 offers the unique ability to start up

from inputs as low as 1.8V and continue to operate from

inputs as low as 0.5V, for output voltages greater than

2.5V. The device also features fixed frequency, current

mode PWM control for exceptional line and load regula-

tion. The current mode architecture with adaptive slope

compensation provides excellent load transient response

and requires minimal output filtering. An internal 10ms

soft-start limits inrush current during start-up and simpli-

fies the design process while minimizing the number of

external components.

With its low RDS(ON) and low gate charge internal N-channel

MOSFET switches and P-channel MOSFET synchronous

rectifiers, the LTC3124 achieves high efficiency over a

wide range of load current. High efficiency is achieved at

light loads by utilizing Burst Mode operation. Operation

can be best understood by referring to the Block Diagram.

MULTIPHASE OPERATION

The LTC3124 uses a dual-phase architecture, rather than

the conventional single phase of other boost converters.

By having two phases equally spaced 180° apart, not only

is the output ripple frequency increased by a factor of

two, but the output capacitor ripple current is significantly

reduced. Although this architecture requires two induc-

tors, rather than a single inductor, there are a number of

important advantages.

• Substantially lower peak inductor current allows the

use of smaller, lower cost inductors.

• Significantly reduced output ripple current minimizes

output capacitance requirement.

• Higher frequency output ripple is easier to filter for low

noise applications.

• Input ripple current is also reduced for lower noise on

VIN.

Figure 1. Comparison of Output Ripple Current with Single Phase

and Dual Phase Boost Converter in a 1.5A Load Application

Operating at 50% Duty Cycle

The peak inductor current, reduced nearly by a factor of

2 when compared to a single phase step-up converter,

is given by:

ILPEAK ≅

2•

(1–D) +

∆I

where IO is the average load current, D is the PWM duty

cycle, and ∆IL is the inductor ripple current. This relation-

ship is shown graphically in Figure 1.

With 2-phase operation, one of the phases is always de-

livering current to the load whenever VIN is greater than

one-half VOUT (duty cycles less than 50%). As the duty

cycle decreases further, load current delivery between the

two phases begins to overlap, occurring simultaneously

for a growing portion of each phase as the duty cycle ap-

proaches zero. This significantly reduces both the output

ripple current and the peak current in each inductor, when

compared with a single-phase converter. This is illustrated

in the waveforms of Figures 2 and 3.

TIME (µs)

OUTPUT RIPPLE CURRENT (A)

3.5

3.0

2.0

1.0

2.5

1.5

0.5

01.0

3124 F01

1.5

0.5

SINGLE PHASE

DUAL

PHASE

LTC3124

3124f

For more information www.linear.com/LTC3124

OPERATION

Figure 2. Simplified Voltage and Current Waveforms

for 2-Phase Operation at 50% Duty Cycle

Figure 3. Simplified Voltage and Current Waveforms

for 2-Phase Operation at 25% Duty Cycle

LOW VOLTAGE OPERATION

The LTC3124 is designed to allow start-up from input

voltages as low as 1.8V. When VOUT exceeds 2.5V, the

LTC3124 continues to regulate its output, even when VIN

falls as low as 0.5V. This feature extends operating times

by maximizing the amount of energy that can be extracted

from the input source. The limiting factors for the applica-

tion become the availability of the power source to supply

sufficient power to the output at the low input voltage,

and the maximum duty cycle, which is clamped at 94%.

Note that at low input voltages, small voltage drops due

to series resistance become critical and greatly limit the

power delivery capability of the converter.

LOW NOISE FIXED FREQUENCY OPERATION

Soft-Start

The LTC3124 contains internal circuitry to provide soft-

start operation. The soft-start utilizes a linearly increasing

ramp of the error amplifier reference voltage from zero

to its nominal value of 1.2V in approximately 10ms, with

the internal control loop driving VOUT from zero to its

final programmed value. This limits the inrush current

drawn from the input source. As a result, the duration

of the soft-start is largely unaffected by the size of the

output capacitor or the output regulation voltage. The

closed-loop nature of the soft-start allows the converter

to respond to load transients that might occur during

the soft-start interval. The soft-start period is reset by a

shutdown command on SD, a UVLO event on VCC (VCC <

1.5V), an overvoltage event on VOUT (VOUT ≥ 16.5V), or

an overtemperature event (TSD is invoked when the die

temperature exceeds 170°C). Upon removal of these fault

conditions, the LTC3124 will soft-start the output voltage.

Error Amplifier

The noninverting input of the transconductance error

amplifier is internally connected to the 1.2V reference and

the inverting input is connected to FB. An external resistive

voltage divider from VOUT to SGND programs the output

voltage from 2.5V to 15V via FB as shown in Figure 4.

VOUT =1.2V 1+











3124 F02

OUTPUT

RIPPLE

CURRENT

INDUCTOR B

CURRENT

INDUCTOR A

CURRENT

INPUT

CURRENT

RECTIFIER B

CURRENT

RECTIFIER A

CURRENT

SWITCH B

VOLTAGE

SWITCH A

VOLTAGE

3124 F03

OUTPUT

RIPPLE

CURRENT

INDUCTOR B

CURRENT

INDUCTOR A

CURRENT

INPUT

CURRENT

RECTIFIER B

CURRENT

RECTIFIER A

CURRENT

SWITCH B

VOLTAGE

SWITCH A

VOLTAGE

LTC3124

3124f

For more information www.linear.com/LTC3124

OPERATION

Thus RT (kΩ) ≅ 28/f (MHz). See Table 1 for various switch-

ing frequencies and their corresponding RT values.

Table 1. Switching Frequency and Their Respective RT

SWITCHING

FREQUENCY (kHz) RT (kΩ)

100 316

200 154

300 100

500 57.6

800 34.8

1000 28

1200 22.6

2000 13

2200 11.5

3000 8.06

For desired switching frequencies not included in Table 1,

please refer to the Resistance vs Frequency curve in the

Typical Performance Characteristics section.

The oscillator can be synchronized to an external frequency

by applying a pulse train of twice the desired switching

frequency to the PWM/SYNC pin. An external resistor

must be connected between RT and SGND to program the

oscillator to a frequency approximately 25% below that of

the externally applied pulse train used for synchronization.

RT is selected in this case according to this formula:

RT(SYNC) (kΩ) ≥ 1.25 • RT(SWITCH) (kΩ)

where RT(SWITCH) is the value of RT at the desired switching

frequency, which is half of the synchronization frequency.

Shutdown

The boost converter is disabled by pulling SD below 0.25V

and enabled by pulling SD above 1.6V. Note that SD can

be driven above VIN or VOUT, as long as it is limited to less

than its absolute maximum rating.

Thermal Shutdown

If the die temperature exceeds 170°C typical, the LTC3124

will go into thermal shutdown (TSD). All switches will be

shut off until the die temperature drops by approximately

7°C, when the device re-initiates a soft-start and switching

is re-enabled.

LTC3124

1.2V

OUT

3124 F04

–

Figure 4. Programming the Output Voltage

Selecting an R2 value of 113k to have approximately

10µA of bias current in the VOUT resistor divider yields

the formula:

R1 = 94 • (VOUT – 1.2V); VOUT in Volts and R1 in kΩ.

Power converter control loop compensation is set with

a simple RC network connected between VC and SGND.

Internal Current Limit

Current limit comparators shut off the N-channel MOSFET

switches once their respective peak current is reached.

Peak switch current per phase is limited to 3.5A, inde-

pendent of input or output voltage, unless VOUT is below

approximately 1.5V, resulting in the current limit being

approximately half of the nominal peak values.

Lossless current sensing converts the peak current signals

of the N-channel MOSFET switches into voltages that are

summed with their respective internal slope compensation. The

summed signals are compared to the error amplifier outputs

to provide a peak current control command for the PWMs.

Zero Current Comparator

The zero current comparators monitor the inductor currents

being delivered to the output and shut off the synchronous

rectifiers when the current is approximately 50mA. This

prevents the inductor currents from reversing in polarity,

improving efficiency at light loads.

Oscillator

The internal oscillator is programmed to twice the desired

switching frequency with an external resistor from the RT

pin to SGND according to the following formula:

fOSC (MHz)≅56

(kΩ)









=2• f (MHz)

where f = switching frequency of one phase.

LTC3124

3124f

For more information www.linear.com/LTC3124

OPERATION

Boost Anti-Ringing Control

When VOUT ≥ VIN + 2V, the anti-ringing circuitry connects a

resistor across each inductor to VIN to damp high frequency

ringing on the SW pins during discontinuous current mode

operation. Although the ringing of the resonant circuits

formed by the inductors and CSW(A/B) (capacitance on

the respective SW pins) is low energy, it can cause EMI

radiation if not damped.

VCC Regulator

An internal low dropout regulator generates the 4.25V

(nominal) VCC rail from VIN or VOUT, depending upon

operating conditions. VCC is supplied from VIN if VIN is

initially greater than approximately 3.5V, with VIN continuing

to supply VCC down to approximately 3V; otherwise the

greater of VIN and VOUT supplies VCC. The VCC rail powers

the internal control circuitry and power MOSFET gate drivers

of the LTC3124. The VCC regulator is disabled in shutdown

to reduce quiescent current and is enabled by forcing the

SD pin above its input high threshold. A 4.7µF or larger

capacitor must be connected between VCC and SGND.

Overvoltage Lockout

An overvoltage condition occurs when VOUT exceeds

approximately 16.5V. Switching is disabled and the in-

ternal soft-start ramp is reset. Once VOUT drops below

approximately 16V a soft-start is initiated and switching

is allowed to resume. If the boost converter output is

lightly loaded such that the time constant of the output

capacitance, COUT, and the output load resistance, ROUT

is near or greater than the soft-start time of approximately

10ms, the soft-start ramp may end before or soon after

switching resumes, defeating the inrush current limiting of

the closed-loop soft-start following an overvoltage event.

Short-Circuit Protection

The LTC3124 output disconnect feature allows output

short-circuit protection while maintaining a maximum set

current limit. To reduce power dissipation under overload

and short-circuit conditions, the peak switch current limits

are reduced to approximately 2A. Once VOUT exceeds

approximately 1.5V, the current limits are reset to their

nominal values of 3.5A per phase.

Output Disconnect

The LTC3124’s output disconnect feature eliminates body

diode conduction of the internal P-channel MOSFET recti-

fiers. This feature allows for VOUT to discharge to 0V during

shutdown, and draw no current from the input source.

Inrush current will also be limited at turn-on, minimizing

surge currents seen by the input supply. Note that to obtain

the advantages of output disconnect, there must not be

an external Schottky diode connected between SWA, SWB

and VOUT. The output disconnect feature also allows VOUT

to be pulled high, without backfeeding the power source

connected to VIN.

VIN > VOUT Operation

The LTC3124 step-up converter will maintain voltage

regulation even when the input voltage is above the desired

output voltage. Note that operating in this mode will exhibit

lower efficiency and a reduced output current capability.

Refer to the Typical Performance Characteristics for details.

Burst Mode OPERATION

When the PWM/SYNC pin is held low, the boost converter

operates in Burst Mode, independent of load current. This

mode of operation is typically commanded to improve

efficiency at light loads and reduce standby current at no

load. The output current (IOUT) capability in Burst Mode

operation is significantly less than in PWM mode and

varies with VIN and VOUT, as shown in Figure 5. The logic

input thresholds for this pin are determined relative to VCC

with a low being less than 10% of VCC and a high being

greater than 90% of VCC. The LTC3124 will operate in

fixed frequency PWM mode even if Burst Mode operation

is commanded during soft-start.

In Burst Mode operation, only Phase A of the LTC3124

is operational, while Phase B is disabled. The Phase A

inductor current is initially charged to approximately

700mA by turning on the N-channel MOSFET switch, at

which point the N-channel switch is turned off and the

P-channel synchronous switch is turned on, delivering

current to the output. When the inductor current discharges

to approximately zero, the cycle repeats. In Burst Mode

operation, energy is delivered to the output until the nominal

LTC3124

3124f

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OPERATION

APPLICATIONS INFORMATION

Figure 5. Burst Mode Output Current vs VIN

PCB LAYOUT CONSIDERATIONS

The LTC3124 switches currents as high as 4.5A at high

frequencies. Special attention should be paid to the PCB

layout to ensure a stable, noise-free and efficient application

circuit. Figure 6 presents the LTC3124’s 4-layer PCB demo

board layout (the schematic of which may be obtained

from the Quick Start Guide) to outline some of the primary

considerations. A few key guidelines are outlined below:

1. A 4-layer board is highly recommended for the LTC3124

to ensure stable performance over the full operating

voltage and current range. A dedicated/solid ground

plane should be placed directly under the VIN, VOUTA,

VOUTB, SWA, and SWB traces to provide a mirror plane

to minimize noise loops from high dI/dt and dV/dt

edges (see Figure 6, 2nd layer).

2. All circulating high current paths should be kept as

short as possible. Capacitor ground connections

should via down to the ground plane in the shortest

route possible. The bypass capacitors on VIN should be

placed as close to the IC as possible and should have

the shortest possible paths to ground (see Figure 6,

top layer).

VIN, FALLING (V)

OUTPUT CURRENT (mA)

300

400

3124 F05

200

100

250

350

150

0234

1.50.5 2.5 3.5 4.5 5.5

VOUT = 2.5V

VOUT = 5V

VOUT = 7.5V

VOUT = 12V

VOUT = 15V

3. PGNDA pin, PGNDB pin, and the exposed pad are the

power ground connections for the LTC3124. Multiple

vias should connect the back pad directly to the ground

plane. In addition, maximization of the metallization

connected to the back pad will improve the thermal

environment and improve the power handling capabili-

ties of the IC.

4. The high current components and their connections

should all be placed over a complete ground plane to

minimize loop cross-sectional areas. This minimizes

EMI and reduces inductive drops.

5. Connections to all of the high current components

should be made as wide as possible to reduce the

series resistance. This will improve efficiency and

maximize the output current capability of the boost

converter.

6. To prevent large circulating currents from disrupting

the converters’ output voltage sensing, compensation,

and programmed switching frequency, the ground for

the resistor divider, compensation components, and

RT should be returned to the ground plane using a

via placed close to the IC and away from the power

connections.

regulation value is reached, then the LTC3124 transitions

into a very low quiescent current sleep state. In sleep, the

output switches are turned off and the LTC3124 consumes

only 25μA of quiescent current. When the output volt-

age droops approximately 1%, switching resumes. This

maximizes efficiency at very light loads by minimizing

switching and quiescent losses. Output voltage ripple in

Burst Mode operation is typically 1% to 2% peak-to-peak.

Additional output capacitance (22μF or greater), or the

addition of a small feedforward capacitor (10pF to 50pF)

connected between VOUT and FB can help further reduce

the output ripple.

LTC3124

3124f

For more information www.linear.com/LTC3124

APPLICATIONS INFORMATION

7. Keep the connections from the resistor divider to the

FB pin and from the compensation components to the

VC pin as short as possible and away from the switch

pin connections.

Figure 6. Example PCB Layout

Bottom Layer (Top View)3rd Layer

2nd LayerTop Layer

8. Crossover connections should be made on inner cop-

per layers if available. If it is necessary to place these

on the ground plane, make the trace on the ground

plane as short as possible to minimize the disruption

to the ground plane (see Figure 6, 3rd layer).

LTC3124

3124f

For more information www.linear.com/LTC3124

APPLICATIONS INFORMATION

SCHOTTKY DIODE

Although it is not required, adding a Schottky diode from

both SW pins to VOUT can improve the converter efficiency

by up to 4%. Note that this defeats the output disconnect

and short-circuit protection features of the LTC3124.

COMPONENT SELECTION

Inductor Selection

The LTC3124 can utilize small inductors due to its capa-

bility of setting a fast (up to 3MHz) switching frequency.

Larger values of inductance will allow slightly greater

output current capability by reducing the inductor ripple

current. To design a stable converter the range of induc-

tance values is bounded by the targeted magnitude of the

internal slope compensation and is inversely proportional

to the switching frequency. The Inductor selection for the

LTC3124 has the following bounds:

µH>L>

µH

The inductor peak-to-peak ripple current is given by the

following equation:

Ripple A

( )

=VIN • VOUT – VIN

( )

f •L • VOUT

where:

L = Inductor Value in μH

f = Switching Frequency in MHz of One Phase

The inductor ripple current is a maximum at the minimum

inductor value. Substituting 3/f for the inductor value in

the above equation yields the following:

RippleMAX A

( )

=VIN • VOUT – VIN

( )

3• V

OUT

A reasonable operating range for the inductor ripple cur-

rent is typically 10% to 40% of the maximum inductor

current. High frequency ferrite core inductor materials

reduce frequency dependent power losses compared to

cheaper powdered iron types, improving efficiency. The

inductor should have low DCR (series resistance of the

windings) to reduce the I2R power losses, and must be

able to support the peak inductor current without saturat-

ing. Molded chokes and most chip inductors usually do

not have enough core area to support the peak inductor

currents of 3A to 4A seen on the LTC3124. To minimize

radiated noise, use a shielded inductor.

See Table 2 for suggested components and suppliers.

Table 2. Recommended Inductors

PART NUMBER

VALUE

(µH)

DCR

(mΩ)

ISAT

(A)

SIZE (mm)

W × L × H

Coilcraft XFL4020-102ME 1 12 5.4 4.3 × 4.3 × 2.1

Coilcraft MSS7341T-332NL 3.3 18 3.7 7.3 × 7.3 × 4.1

Coilcraft XAL5030-332ME 3.3 23 8.7 5.3 × 5.3 × 3.1

Coilcraft XAL5030-472ME 4.7 36 6.7 5.3 × 5.3 × 3.1

Coilcraft XAL5050-562ME 5.6 26 6.3 5.3 × 5.3 × 5.1

Coilcraft XAL6060-223ME 22 61 5.6 6.3 × 6.3 × 6.1

Coilcraft MSS1260T-333ML 33 57 4.34 12.3 × 12.3 × 6.2

Coiltronics SD53-1R1-R 1.1 20 4.8 5.2 × 5.2 × 3

Coiltronics DR74-4R7-R 4.7 25 4.37 7.6 × 7.6 × 4.35

Coiltronics DR125-330-R 33 51 3.84 12.5 × 12.5 × 6

Coiltronics DR127-470-R 47 72 5.28 12.5 × 12.5 × 8

Sumida CDR7D28MNNP-1R2NC 1.2 21 5.9 7.6 × 7.6 × 3

Sumida CDMC6D28NP-3R3MC 3.3 31 5 7.25 × 6.7 × 3

Taiyo-Yuden NR5040T3R3N 3.3 35 3.8 5 × 5 × 4

TDK LTF5022T-1R2N4R2-LC 1.2 25 4.3 5 × 5.2 × 2.2

TDK SPM6530T-3R3M 3.3 30 6.8 7.1 × 6.5 × 3

TDK VLP8040T-4R7M 4.7 25 4.4 8 × 7.7 × 4

Würth WE-LHMI 74437324010 1 27 9 4.45 × 4.06 × 1.8

Würth WE-PD 7447789002 2.2 20 4.8 7.3 × 7.3 × 3.2

Würth WE-PD 7447779002

Würth WE-PD 7447789003 2.2

3.3 20

30 6

4.2 7.3 × 7.3 × 4.5

7.3 × 7.3 × 3.2

Würth WE-PD 7447789004 4.7 35 3.9 7.3 × 7.3 × 3.2

Würth WE-HCI 7443251000 10 16 8.5 10 × 10 × 5

Würth WE-PD 744770122 22 43 5 12 × 12 × 8

Würth WE-PD 744770133 33 64 3.6 12 × 12 × 8

Würth WE-PD 7447709470 47 60 4.5 12 × 12 × 10

Output and Input Capacitor Selection

Low ESR (equivalent series resistance) capacitors should

be used to minimize the output voltage ripple. Multilayer

ceramic capacitors are an excellent choice as they have

extremely low ESR and are available in small footprints.

X5R and X7R dielectric materials are preferred for their

ability to maintain capacitance over wide voltage and tem-

perature ranges. Y5V types should not be used. Although

ceramic capacitors are recommended, low ESR tantalum

capacitors may be used as well.

LTC3124

3124f

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APPLICATIONS INFORMATION

When selecting output capacitors, the magnitude of the

peak inductor current, together with the ripple voltage

specification, determine the choice of the capacitor. Both

the ESR (equivalent series resistance) of the capacitor and

the charge stored in the capacitor each cycle contribute

to the output voltage ripple.

The peak-to-peak ripple due to the charge is approximately:

VRIPPLE(CHARGE)(V)≈

• V

COUT • VOUT • f •2

where:

IP = Peak inductor current

f = Switching frequency of one phase

The ESR of COUT is usually the most dominant factor for

ripple in most power converters. The peak-to-peak ripple

due to the capacitor ESR is:

VRIPPLE(ESR)(V)=ILOAD • RESR •

OUT

where RESR = capacitor equivalent series resistance.

The input filter capacitor reduces peak currents drawn

from the input source and reduces input switching noise.

A low ESR bypass capacitor with a minimum value of 10µF

should be located as close to VIN as possible.

Low ESR and high capacitance are critical to maintain low

output ripple. Capacitors can be used in parallel for even

larger capacitance values and lower effective ESR. Ceramic

capacitors are often utilized in switching converter appli-

cations due to their small size, low ESR and low leakage

currents. However, many ceramic capacitors experience

significant loss in capacitance from their rated value with

increased DC bias voltage. It is not uncommon for a small

surface mount capacitor to lose more than 50% of its rated

capacitance when operated near its rated voltage. As a

result it is sometimes necessary to use a larger capaci-

tor value or a capacitor with a larger value and case size,

such as 1812 rather than 1206, in order to actually realize

the intended capacitance at the full operating voltage. Be

sure to consult the vendor’s curve of capacitance versus

DC bias voltage. Table 3 shows a sampling of capacitors

suited for the LTC3124 applications.

Table 3: Representative Output Capacitors

Manufacturer,

Part Number

Value

(µF)

Voltage

(V)

SIZE L × W × H (mm)

Type, ESR (mΩ)

AVX,

1206YD226KAT2A 22 16 3.2 × 1.6 × 1.78,

X5R Ceramic

AVX,

1210YC226KAT2A 22 16 3.2 × 2.5 × 2.79,

X7R Ceramic

Murata,

GRM31CR61C226ME15L22 16 3.2 × 1.6 × 1.8,

X5R Ceramic

Murata,

GRM32ER71C226KE18K22 16 3.2 × 2.5 × 2.7,

X7R Ceramic

Murata,

GRM43ER61C226KE01L 22 16 4.5 × 3.2 × 2.7,

X5R Ceramic

Murata,

GRM32EB31C476ME15K47 16 3.2 × 2.5 × 2.5,

X5R Ceramic

Panasonic,

ECJ-4YB1C226M 22 16 3.2 × 2.5 × 2.7,

X5R Ceramic

Taiyo Yuden,

EMK316BJ226ML-T 22 16 3.2 × 1.6 × 1.8,

X5R Ceramic

Taiyo Yuden,

EMK325B7226MM-TR 22 16 3.2 × 2.5 × 2.7,

X7R Ceramic

Taiyo Yuden,

EMK432BJ226KM-T 22 16 4.5 × 3.2 × 2.7,

X5R Ceramic

TDK,

C5750X7R1C476M 47 16 5.7 × 5 × 2.5,

X7R Ceramic

TDK,

C4532X5R0J107M 100 6.3 4.5 × 3.2 × 2.8,

X5R Ceramic

Nichicon,

UBC1C101MNS1GS 100 16 8.3 × 8.3 × 11.5,

Aluminum Polymer

Sanyo,

25TQC22MV 22 25 7.3 x 4.3 x 1.9,

POSCAP, 45mΩ

Sanyo,

16TQC47MW 47 16 7.3 × 4.3 × 3.1,

POSCAP, 40mΩ

Sanyo,

16TQC100M 100 16 7.3 × 4.3 × 3.1,

POSCAP, 50mΩ

Sanyo,

25SVPF47M 47 25 6.6 × 6.6 × 5.9,

OS-CON, 30mΩ

AVX, BestCap Series

BZ125A105ZLB 1F 5.5 48 × 30 × 6.1,

35mΩ, 4 Lead

Cap-XX GS230F 1.2F 4.5 39 × 17 × 3.8, 28mΩ

Tecate Powerburst

TPL-100/22X45 100F 2.7 D = 22, H = 45

15mΩ

Cooper KR-5R5C155-R 1.5F 5.5 D = 21.5, H = 7.5

30mΩ

Cooper

HB1860-2R5117-R 110F 2.5 D = 18.5, H = 60

20mΩ

Maxwell

BCAP0050-P270 50F 2.5 D = 18, H = 40

20 mΩ

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3124f

For more information www.linear.com/LTC3124

APPLICATIONS INFORMATION

For applications requiring a very low profile and very large

capacitance, the GS, GS2 and GW series from Cap-XX,

the BestCap series from AVX and PowerStor KR series

capacitors from Cooper all offer very high capacitance

and low ESR in various low profile packages.

OPERATING FREQUENCY SELECTION

There are several considerations in selecting the operating

frequency of the converter. Typically, the first consideration

is to stay clear of sensitive frequency bands, which can-

not tolerate any spectral noise. For example, in products

incorporating RF communications, the 455kHz IF frequency

can be sensitive to any noise, therefore switching above

600kHz is desired. Some communications have sensitivity

to 1.1MHz and in that case a 1.5MHz switching converter

frequency may be employed. A second consideration is the

physical size of the converter. As the operating frequency

is increased, the inductor and filter capacitors typically

can be reduced in value, leading to smaller sized external

components. The smaller solution size is typically traded

for efficiency, since the switching losses due to gate charge

increase with frequency.

Another consideration is whether the application can allow

pulse-skipping. When the boost converter pulse-skips, the

minimum on-time of the converter is unable to support

the duty cycle. This results in a low frequency component

to the output ripple. In many applications where physical

size is the main criterion, running the converter in this

mode is acceptable. In applications where it is preferred

not to enter this mode, the maximum operating frequency

is given by:

fMAX _NOSKIP <≅

OUT

– V

VOUT • tON(MIN)

where tON(MIN) = minimum on-time, which is typically

around 100ns.

Thermal Considerations

For the LTC3124 to deliver its full power, it is imperative

that a good thermal path be provided to dissipate the

heat generated within the package. This can be accom-

plished by taking advantage of the large thermal pad on

the underside of the IC. It is recommended that multiple

vias in the printed circuit board be used to conduct heat

away from the IC and into a copper plane with as much

area as possible. If the junction temperature rises above

~170°C, the part will trip an internal thermal shutdown,

and all switching will stop until the junction temperature

drops ~7°C.

Compensating the Feedback Loop

The LTC3124 uses current mode control, with internal

adaptive slope compensation. Current mode control elimi-

nates the second order filter due to the inductor and output

capacitor exhibited in voltage mode control, and simplifies

the power loop to a single pole filter response. Because

of this fast current control loop, the power stage of the IC

combined with the external inductor can be modeled by a

transconductance amplifier gmp and a current controlled

current source. Figure 7 shows the key equivalent small

signal elements of a boost converter.

The DC small-signal loop gain of the system shown in

Figure 7 is given by the following equation:

GBOOST =GEA •GMP •GPOWER •

R1+R2

where GEA is the DC gain of the error amplifier, GMP is

the modulator gain, and GPOWER is the inductor current

to VOUT gain.

GEA = gma • RO ≈ 1000V/V

(Not Adjustable; gma ≈ 100µS, RO ≈ 10MΩ)

GMP =2•gmp; gmp =

∆I

∆VC

≈3.4S NotAdjustable

( )

GPOWER =∆VOUT

∆I

=η• VIN

2•I

OUT

=η• VIN •RL

2• V

OUT

LTC3124

3124f

For more information www.linear.com/LTC3124

APPLICATIONS INFORMATION

Phase Lead Zero: Z4 =

2π• R1+RPL

( )

•CPL

Phase Lead Pole: P4 = 1

2π•R1•R2

R1+R2 +RPL









•CPL

Error Amplifier Filter Pole:

P5=1

2π•RC•CC•CF

CC+CF

Hz, CF<CC

≈1

2π•R

•CF

The current mode zero (Z3) is a right-half plane zero

which can be an issue in feedback control design, but is

manageable with proper external component selection.

Also note that the RHP zero is a minimum at minimum

input voltage and maximum output current for a given

output voltage. As a general rule, the frequency at which

the open-loop gain of the converter is reduced to unity,

known as the crossover frequency fC , should be set to

less than one-sixth of the right-half plane zero (Z3), and

under one-eighth of the switching frequency fSWITCH. Once

fC is selected, the compensation component values can

be calculated using a Bode plot of the power stage or two

generally valid assumptions: P1 dominates the gain of the

power stage for frequencies lower than fC and fC is much

higher than P2. First calculate the power stage gain at fC,

GfC in V/V. Assuming the output pole P1 dominates GfC

for this range, it is expressed by:

GfC ≈

1+fC











2V/V

1.2V

REFERENCE

VOUT

3124 F07

RPL

CPL

CC: COMPENSATION CAPACITOR

RC: COMPENSATION RESISTOR

CF: HIGH FREQUENCY FILTER CAPACITOR

CPL: PHASE LEAD CAPACITOR

RPL: PHASE LEAD RESISTOR

gma: TRANSCONDUCTANCE AMPLIFIER INSIDE IC

RO: OUTPUT RESISTANCE OF gma

gmp: POWER STAGE TRANSCONDUCTANCE AMPLIFIER

COUT: OUTPUT CAPACITOR

RESR: OUTPUT CAPACITOR ESR

RL: OUTPUT RESISTANCE DEFINED AS VOUT/ILOAD(MAX)

R1, R2: FEEDBACK RESISTOR DIVIDER NETWORK

: CONVERSION EFFICIENCY (~90% AT HIGHER CURRENTS)

ERROR

AMPLIFIER

MODULATOR

RESR

COUT

–

gmp

–

• IL

η • VIN

2 • VOUT

gma

Figure 7. Boost Converter Equivalent Model

Combining the two equations above yields:

GDC =GMP •GPOWER ≈

3.4• η• V

•R

VOUT

V/V

Converter efficiency η will vary with IOUT and switching

frequency fSWITCH as shown in the typical performance

characteristics curves.

Output Pole: P1 =

2π•RL•COUT

Error Amplifier Pole:

P2 = 1

2π•RO• CC+CF

( )

Hz;CF<CC

≈1

2π•RO•CC

Hz; ExtremelyClosetoDC

Error Amplifier Zero: Z1 = 1

2π•RC•CC

ESR Zero: Z2 = 1

2π•RESR •COUT

RHP Zero: Z3 = VIN2•2RL

2π• VOUT2•L Hz

High Frequency Pole: P3 > fOSC

LTC3124

3124f

For more information www.linear.com/LTC3124

APPLICATIONS INFORMATION

Decide how much phase margin (Φm) is desired. Greater

phase margin can offer more stability while lower phase mar-

gin can yield faster transient response. Typically, Φm ≈ 60°

is optimal for minimizing transient response time while

allowing sufficient margin to account for component

variability. Φ1 is the phase boost of Z1, P2, and P5 while

Φ2 is the phase boost of Z4 and P4. Select Φ1 and Φ2

such that:



Φ1+ Φ2= Φm+tan−1ƒC









and

Φ1≤74°;Φ2≤2 • tan−1VOUT

1.2V









−90°

where VOUT is in V and ƒC and Z3 are in kHz.

Setting Z1, P5, Z4, and P4 such that

Z1=

, P5 =ƒCa1, Z4 =

, P4 =ƒCa2

allows a1 and a2 to be determined using Φ1 and Φ2

a1=tan2Φ1+90°









, a2 = tan2Φ2+90°











The compensation will force the converter gain GBOOST

to unity at ƒC by using the following expression for CC:

CC=103• gma •R2 •GƒC a1−1

( )

2π• ƒC• R1+R2

( )

(gma in µS, ƒC in kHz, GƒC in V/V)

Once CC is calculated, RC and CF are determined by:

RC=106• a1

2π• ƒC•CC

kΩ (ƒC in kHz, CC in pF)

CF=CC

−1

A method for improving the converter’s transient response

uses a small feedforward series network of a capacitor and

a resistor across the top resistor of the feedback divider

(from VOUT to FB). This adds a phase-lead zero and pole to

the transfer function of the converter. The values of these

phase lead components are given by the expressions:

RPL =

R1−a2•

R1•R2

R1+R2











a2−1kΩ and

CPL = 106a2−1

( )

R1+R2

( )

2π• ƒC•R12a2

where R1, R2, and RPL are in kΩ and ƒC is in kHz.

Note that selecting Φ2 = 0° forces a2 = 1, and so the

converter will have Type II compensation and therefore

no feedforward: RPL is open (infinite impedance) and CPL

= 0pF. If a2 = 0.833 • VOUT (its maximum), feedforward is

maximized; RPL = 0 and CPL is maximized for this com-

pensation method.

Once the compensation values have been calculated, ob-

taining a converter bode plot is strongly recommended to

verify calculations and adjust values as required.

Using the circuit in Figure 8 as an example, Table 4 shows

the parameters used to generate the Bode plot shown in

Figure 9.

Table 4. Bode Plot Parameters

PARAMETER VALUE UNITS COMMENT

VIN 5 V App Specific

VOUT 12 V App Specific

RL8 Ω App Specific

COUT at No Bias

COUT at 12V Bias 22 × 2

14 × 2 µF

µF App Specific

App Specific

RESR 2.5 mΩ App Specific

LA, LB 4.7 µH App Specific

fSWITCH 1 MHz Adjustable

R1 1020 kΩ Adjustable

R2 113 kΩ Adjustable

gma 100 µS Fixed

RO10 MΩ Fixed

gmp 3.4 S Fixed

η90 % App Specific

RC84.5 kΩ Adjustable

CC680 pF Adjustable

CF56 pF Adjustable

RPL Open kΩ Optional

CPL 0 pF Optional

LTC3124

3124f

For more information www.linear.com/LTC3124

APPLICATIONS INFORMATION

Switching Waveforms with 1.5A Load

Transient Response with 700mA to 1.5A Load Step

Figure 8. 1MHz, 5V to 12V, 1.5A Boost Converter

Figure 9. Bode Plot for Example Converter

100nF V

OUT

12V

1.5A

4.7µH

5V SWB CAP

PGNDB VOUTB

SWA

LTC3124

COUT

22µF

×2

680pF

56pF

3124 F08

CVCC

4.7µF

CIN

10µF

1.02M

113k

84.5k

28k

C1: 100nF, 16V, X5R, 0805

CIN: 10µF, 10V, X5R, 1206

COUT: 22µF ×2, 16V, X5R, 1210

CVCC: 4.7µF, 10V, X5R, 1206

LA, LB: COILCRAFT XAL5030-472ME

OFF ON

VIN SGND

PWM/SYNC SD

VCC FB

RT VC

PGNDA

VOUTA

BURST PWM

VOUT

20mV/DIV

AC-COUPLED

VSWB

10V/DIV

VSWA

10V/DIV

200ns/DIV 3124 F08b

INDUCTOR B

CURRENT

1A/DIV

INDUCTOR A

CURRENT

1A/DIV

VOUT

500mV/DIV

AC-COUPLED

OUTPUT

CURRENT

500mA/DIV

100µs/DIV 3124 F08c

700mA 700mA

1500mA

FREQUENCY (Hz)

100 1k

–15

GAIN (dB)

PHASE (DEG)

10k 100k

3124 F09

–30

–45

–90

–45

–135

–180

PHASE

GAIN

LTC3124

3124f

For more information www.linear.com/LTC3124

APPLICATIONS INFORMATION

Figure 11. Bode Plot Showing Phase Lead

Figure 10. Boost Converter with Phase Lead

100nF

CPL

12pF

VOUT

12V

1.5A

4.7µH

VIN

5V SWB CAP

PGNDB VOUTB

SWA

LTC3124

COUT

22µF

×2

470pF

120pF

3124 F10

CVCC

4.7µF

CIN

10µF

1.02M

RPL

787k

113k

71.5k

28k

C1: 100nF, 16V, X5R, 0805

CIN: 10µF, 10V, X5R, 1206

COUT: 22µF ×2, 16V, X5R, 1210

CVCC: 4.7µF, 10V, X5R, 1206

LA, LB: COILCRAFT XAL5030-472ME

OFF ON

VIN SGND

PWM/SYNC SD

VCC FB

RT VC

PGNDA

VOUTA

BURST PWM

Table 5. Bode Plot Parameters

PARAMETER VALUE UNITS COMMENT

VIN 5 V App Specific

VOUT 12 V App Specific

RL8 Ω App Specific

COUT at No Bias

COUT at 12V Bias 22 × 2

14 × 2 µF

µF App Specific

App Specific

RESR 2.5 mΩ App Specific

LA, LB 4.7 µH App Specific

fSWITCH 1 MHz Adjustable

R1 113 kΩ Adjustable

R2 1020 kΩ Adjustable

gma 100 µS Fixed

RO10 MΩ Fixed

gmp 3.4 S Fixed

η90 % App Specific

RC71.5 kΩ Adjustable

CC470 pF Adjustable

CF120 pF Adjustable

RPL 787 kΩ Adjustable

CPL 12 pF Adjustable

From Figure 9, the phase is ~60° when the gain reaches

0dB, so the phase margin of the converter is ~60°. The

crossover frequency is ~10kHz, which is more than six

times lower than the 94kHz frequency of the RHP zero to

achieve adequate phase margin.

The circuit in Figure 10 shows the same application as

that in Figure 8 with Type III compensation. This is ac-

complished by adding CPL and RPL and adjusting CC, CF,

and RC accordingly. Table 5 shows the parameters used

to generate the bode plot shown in Figure 11.

From Figure 11, the phase margin is still optimized at ~60°

and the crossover frequency remains ~10kHz. Adding CPL

and RPL provides some feedforward signal in Burst Mode

operation, leading to lower output voltage ripple.

FREQUENCY (Hz)

100 1k

–15

GAIN (dB)

PHASE (DEG)

10k 100k

3124 F11

–30

–45

–90

–45

–135

–180

PHASE

GAIN

LTC3124

3124f

For more information www.linear.com/LTC3124

TYPICAL APPLICATIONS

2-Port USB-Powered 1MHz Synchronous Boost Converter to 5V, 500mA

100nF VOUT

500mA

COUT

100µF

×2

3.3µH

VIN

4.3V TO 5.5V

SWB CAP

PGNDB VOUTB

SWA

LTC3124

2.7nF

270pF

3124 TA03a

CVCC

4.7µF

CIN

10µF

1.47M

464k

35.7k

28k

C1: 100nF, 16V, X5R, 0805

C2: KEMET T491C106K025AS

CIN: 10µF, 10V, X5R, 1206

COUT: 100µF × 2, 6.3V, X5R, 1812

CVCC: 4.7µF, 10V, X5R, 1206

LA, LB: COILCRAFT XAL5030-332ME

OFF ON

VIN SGND

PWM/SYNC SD

VCC FB

RT VC

PGNDA

VOUTA

Single Li Cell to 6V, 9W, 2.2MHz Synchronous Boost Converter

for RF Transmitter

Load Step

Bode Plot

100nF V

OUT

1.5A

COUT

47µF

×2

2.2µH

VIN

2.7V TO 4.2V

SWB CAP

PGNDB VOUTB

SWA

LTC3124

1.2nF

68pF

3124 TA02a

CVCC

4.7µF

CIN

10µF

1.13M

280k

60.4k

11.5k

C1: 100nF, 16V, X5R, 0805

CIN: 10µF, 10V, X5R, 1206

COUT: 47µF × 2, 16V, X5R, 1210

CVCC: 4.7µF, 10V, X5R, 1206

LA, LB: WÜRTH WE-PD 7447779002

OFF ON

VIN SGND

PWM/SYNC SD

VCC FB

RT VC

PGNDA

VOUTA

VOUT

500mV/DIV

AC-COUPLED

OUTPUT

CURRENT

500mA/DIV

100µs/DIVVIN = 3.6V 3124 TA02b

150mA 150mA

1.5A

FREQUENCY (Hz)

–20

GAIN (dB)

PHASE (DEG)

–30

–40

–10

100 10k 100k

3124 TA02c

–50

–90

120

–120

–150

–30

–60

–180

PHASE

GAIN

VIN

2V/DIV

VOUT

2V/DIV

INPUT

CURRENT

500mA/DIV

2ms/DIVRLOAD = 10Ω

VIN = USB 2.0

2-PORT HOT PLUGGED

3124 TA03b

2-Port USB 2.0 Hot Plugged

LTC3124

3124f

For more information www.linear.com/LTC3124

TYPICAL APPLICATIONS

Single Li Cell to 5V, 1.8A Synchronized 1.2MHz Switching Boost

Converter for RFPA Power Supply

100nF V

OUT

1.8A

COUT

22µF

×2

3.3µH

VIN

2.7V TO 4.2V

SWB CAP

PGNDB VOUTB

SWA

LTC3124

1.5nF

150pF

3124 TA05a

CVCC

4.7µF

CIN

10µF

2.4MHz SYNC PULSE R1

1.47M

464k

31.6k

28.7k

C1: 100nF, 16V, X7R, 0805

CIN: 10µF, 10V, X7R, 1206

COUT: 22µF × 2, 16V, X7R, 1210

CVCC: 4.7µF, 10V, X7R, 1206

LA, LB: COILCRAFT MSS7341T-332NL

OFF ON

VIN SGND

PWM/SYNC SD

VCC FB

RT VC

PGNDA

VOUTA

Efficiency

3.3V to 12V, 300kHz Synchronous Boost Converter

with Output Disconnect, 1A

100nF V

OUT

12V

COUT

47µF

×3

22µH

VIN

3.3V

SWB CAP

PGNDB VOUTB

SWA

LTC3124

3.9nF

270pF

3124 TA04a

CVCC

4.7µF

CIN

10µF

1.02M

113k

76.8k

100k

C1: 100nF, 16V, X5R, 0805

CIN: 10µF, 10V, X5R, 1206

COUT: 47µF × 3, 16V, X5R, 1210

CVCC: 4.7µF, 10V, X5R, 1206

LA, LB: WÜRTH WE-PDF 7447998221

BURST PWM

VIN SGND

PWM/SYNC SD

VCC FB

RT VC

PGNDA

VOUTA

OFF ON

Efficiency

LOAD CURRENT (mA)

0.01 0.1

EFFICIENCY (%)

1 10 100 1000

3124 TA04b

100

PWM

Burst Mode

OPERATION

VCC DERIVED

FROM VIN

VCC DERIVED

FROM VOUT

LOAD CURRENT (mA)

0.01 0.1

EFFICIENCY (%)

1 10 100 1000

3124 TA05b

100

PWM

Burst Mode

OPERATION

4.2VIN

3.3VIN

2.7VIN

LTC3124

3124f

For more information www.linear.com/LTC3124

TYPICAL APPLICATIONS

1.8V to 5.5V Input to 15V Output, 500kHz Synchronous Boost

Converter with Output Disconnect, 300mA

Single Li Cell to 12V, 1MHz Synchronous Boost Converter

with Output Disconnect, 800mA

100nF VOUT

15V

300mA

COUT

22µF

×2

10µH

VIN

1.8V TO 5.5V

SWB CAP

PGNDB VOUTB

SWA

LTC3124

3.3nF

100pF

3124 TA06a

CVCC

4.7µF

CIN

10µF

1.3M

113k

49.9k

57.6k

C1: 100nF, 16V, X7R, 0805

CIN: 10µF, 10V, X7R, 1206

COUT: 22µF × 2, 16V, X7R, 1210

CVCC: 4.7µF, 10V, X7R, 1206

LA, LB: WÜRTH WE-HCI 7443251000

OFF ON

VIN SGND

PWM/SYNC SD

VCC FB

RT VC

PGNDA

VOUTA

Efficiency

VIN (V)

1.5

EFFICIENCY (%)

100

3 4 5.5

3124 TA06b

75 2 2.5 3.5 4.5 5

OUTPUT CURRENT = 300mA

100nF VOUT

12V

800mA

COUT

22µF

×2

5.6µH

VIN

2.7V TO 4.2V SWB CAP

PGNDB VOUTB

SWA

LTC3124

680pF

47pF

3124 TA08

CVCC

4.7µF

CIN

10µF

1.02M

113k

88.7k

28k

C1: 100nF, 16V, X7R, 0805

CIN: 10µF, 10V, X7R, 1206

COUT: 22µF × 2, 16V, X7R, 1210

CVCC: 4.7µF, 10V, X7R, 1206

LA, LB: COILCRAFT XAL5050-562ME

OFF ON

VIN SGND

PWM/SYNC SD

VCC FB

RT VC

PGNDA

VOUTA

LTC3124

3124f

For more information www.linear.com/LTC3124

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

3.00 ±0.10

(2 SIDES)

5.00 ±0.10

(2 SIDES)

NOTE:

1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC

PACKAGE OUTLINE MO-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

0.40 ±0.10

BOTTOM VIEW—EXPOSED PAD

1.65 ±0.10

(2 SIDES)

0.75 ±0.05

R = 0.115

TYP

R = 0.20

TYP

4.40 ±0.10

(2 SIDES)

169

PIN 1

TOP MARK

(SEE NOTE 6)

0.200 REF

0.00 – 0.05

(DHC16) DFN 1103

0.25 ±0.05

PIN 1

NOTCH

0.50 BSC

4.40 ±0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

1.65 ±0.05

(2 SIDES)2.20 ±0.05

0.50 BSC

0.65 ±0.05

3.50 ±0.05

PACKAGE

OUTLINE

0.25 ± 0.05

DHC Package

16-Lead Plastic DFN (5mm × 3mm)

(Reference LTC DWG # 05-08-1706 Rev Ø)

LTC3124

3124f

For more information www.linear.com/LTC3124

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

FE16 (BC) TSSOP REV J 1012

0.09 – 0.20

(.0035 – .0079)

0° – 8°

0.25

REF

0.50 – 0.75

(.020 – .030)

4.30 – 4.50*

(.169 – .177)

1 3 4 5678

DETAIL B IS THE PART OF

THE LEAD FRAME FEATURE

FOR REFERENCE ONLY

NO MEASUREMENT PURPOSE

4.90 – 5.10*

(.193 – .201)

16 1514 13 12 11

1.10

(.0433)

MAX

0.05 – 0.15

(.002 – .006)

0.65

(.0256)

BSC

2.94

(.116)

0.48

(.019)

REF

0.51

(.020)

REF

0.195 – 0.30

(.0077 – .0118)

TYP

RECOMMENDED SOLDER PAD LAYOUT

0.45 ±0.05

0.65 BSC

4.50 ±0.10

6.60 ±0.10

1.05 ±0.10

2.94

(.116)

3.58

(.141)

3.58

(.141)

MILLIMETERS

(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.150mm (.006") PER SIDE

NOTE:

1. CONTROLLING DIMENSION: MILLIMETERS

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

SEE NOTE 4

4. RECOMMENDED MINIMUM PCB METAL SIZE

FOR EXPOSED PAD ATTACHMENT

6.40

(.252)

BSC

FE Package

16-Lead Plastic TSSOP (4.4mm)

(Reference LTC DWG # 05-08-1663 Rev J)

Exposed Pad Variation BC

DETAIL B

LTC3124

3124f

For more information www.linear.com/LTC3124

LINEAR TECHNOLOGY CORPORATION 2014

LT 0614 • PRINTED IN USA

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC3124

RELATED PARTS

TYPICAL APPLICATION

Dual Supercapacitor Backup Power Supply, 0.5V to 5.4V PWM Rundown Curve

Burst Mode Rundown Curve

100nF V

OUT

VIN

COUT

100µF

×2

3.3µH

VIN

0.5V TO 5.4V

SWB CAP

PGNDB VOUTB

SWA

LTC3124

1.5nF

47pF

3124 TA07a

CVCC

4.7µF

SC1

100F

SC2

100F

1.47M

464k

59k

28k

C1: 100nF, 16V, X5R, 0805

CIN: 10µF, 10V, X5R, 1206

COUT: 100µF × 2, 6.3V, X5R, 1812

CVCC: 4.7µF, 10V, X5R, 1206

LA, LB: COILCRAFT XAL5030-332ME

SC1, SC2: TECATE POWERBURST TPL-100/22X45

CIN

10µF

VIN SGND

PWM/SYNC SD

VCC

RT VC

PGNDA

VOUTA

OFF ON

PART NUMBER DESCRIPTION COMMENTS

LTC3459 70mA ISW, 10V Micropower Synchronous Boost Converter

with Output Disconnect, Burst Mode Operation VIN: 1.5V to 5.5V, VOUT(MAX) = 10V, IQ = 10μA, ISD < 1μA,

ThinSOT Package

LTC3528 1A ISW, 1MHz, Synchronous Step-Up DC/DC Converter with

Output Disconnect, Burst Mode Operation 94% Efficiency VIN: 700mV to 5.25V, VOUT(MAX) = 5.25V, IQ = 12µA,

ISD < 1µA, 2mm × 3mm DFN Package

LTC3539 2A ISW, 1MHz/2MHz, Synchronous Step-Up DC/DC Converters

with Output Disconnect, Burst Mode Operation 94% Efficiency VIN: 700mV to 5.25V, VOUT(MAX) = 5.25V, IQ = 10uA,

ISD < 1µA, 2mm × 3mm DFN Package

LTC3421 3A ISW, 3MHz, Synchronous Step-Up DC/DC Converter with

Output Disconnect 95% Efficiency VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12μA,

ISD < 1μA, QFN24 Package

LTC3428 4A ISW, 2MHz (1MHz Switching), Dual Phase Step-Up

DC/DC Converter 92% Efficiency VIN: 1.6V to 4.5V, VOUT(MAX) = 5.25V, ISD < 1µA,

3mm × 3mm DFN Package

LTC3425 5A ISW, 8MHz, Low Ripple, 4-Phase Synchronous Step-Up

DC/DC Converter with Output Disconnect 95% Efficiency VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12μA,

ISD < 1μA, QFN32

LTC3122 2.5A ISW, 3MHz, Synchronous Step-Up DC/DC Converter with

Output Disconnect, Burst Mode Operation 95% Efficiency VIN: 1.8V to 5.5V [500mV After Start-Up],

VOUT(MAX) = 15V, IQ = 25μA, ISD < 1μA, 3mm × 4mm DFN

and MSOP Packages

LTC3112 15V, 2.5A, 750kHz, Synchronous Buck-Boost DC/DC Converter

with Output Disconnect, Burst Mode Operation 95% Efficiency VIN: 2.7V to 15V, VOUT(MAX) = 14V, IQ = 50μA,

ISD < 1μA, 4mm × 5mm DFN and TSSOP Packages

LTC3114-1 40V, 1A, 2MHz, Synchronous Buck-Boost DC/DC Converter

with Output Disconnect, Output Current Limit, Burst Mode

Operation

95% Efficiency VIN: 2.2V to 40V, VOUT(MAX) = 40V, IQ = 30μA,

ISD = 3μA, 3mm × 5mm DFN and TSSOP Packages

LTC3115-1 40V, 2A, 2MHz, Synchronous Buck-Boost DC/DC Converter

with Output Disconnect, Burst Mode Operation 95% Efficiency VIN: 2.7V to 40V, VOUT(MAX) = 40V, IQ = 30μA,

ISD = 3μA, 4mm × 5mm DFN and TSSOP Packages

VIN

2V/DIV

VOUT

5V/DIV

OUTPUT

CURRENT

100mA/DIV

2V/DIV

200s/DIV 3124 TA07b

SUPPLY REMOVED

FROM SUPERCAP

VIN

2V/DIV

VOUT

5V/DIV

OUTPUT

CURRENT

20mA/DIV

2V/DIV

500s/DIV 3124 TA07c

SUPPLY REMOVED

FROM SUPERCAP