LTC3124 15V, 5A 2-Phase Synchronous Step-Up DC/DC Converter with Output Disconnect FEATURES n n n n n n n n n n n n n DESCRIPTION VIN Range: 1.8V to 5.5V, 500mV After Start-Up Adjustable Output Voltage: 2.5V to 15V 1.5A Output Current for VIN = 5V and VOUT = 12V Dual-Phase Control Reduces Output Voltage Ripple Output Disconnects from Input When Shut Down Synchronous Rectification: Up to 95% Efficiency Inrush Current Limit Up to 3MHz Programmable Switching Frequency Synchronizable to External Clock Selectable Burst Mode(R) Operation: 25A IQ Output Overvoltage Protection Internal Soft-Start <1A IQ in Shutdown 16-Lead, Thermally- Enhanced 3mm x 5mm x 0.75mm DFN and TSSOP Packages APPLICATIONS n n n n RF, Microwave Power Amplifiers Piezo Actuators Small DC Motors, Thermal Printers 12V Analog Rail from Battery, 5V, or Backup Capacitor L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. The LTC(R)3124 is a dual-phase, synchronous step-up DC/ DC converter with true output disconnect and inrush current limiting capable of providing output voltages up to 15V. Dual-phase operation significantly reduces peak inductor and capacitor ripple currents, minimizing inductor and capacitor size. The 2.5A per phase current limit, along with the ability to program output voltages up to 15V make the LTC3124 well suited for a variety of demanding applications. Once started, operation will continue with inputs down to 500mV. The LTC3124 switching frequency can be programmed from 100kHz to 3MHz to optimize applications for highest efficiency or smallest solution footprint. The oscillator can be synchronized to an external clock for noise sensitive applications. Selectable Burst Mode operation reduces quiescent current to 25A, ensuring high efficiency across the entire load range. An internal soft-start limits inrush current during start-up. Other features include a <1A shutdown current and robust protection under short-circuit, thermal overload, and output overvoltage conditions. The LTC3124 is offered in both 16-lead DFN and thermally-enhanced TSSOP packages. TYPICAL APPLICATION 5V to 12V Synchronous Boost Converter 4.7H SWB BURST PWM 10F 22F x2 VOUTA SWA LTC3124 PGNDA VIN SGND PWM/SYNC SD VCC RT FB VC 28k 1.02M OFF ON 80 10 Burst Mode OPERATION 70 113k 50 40 30 10 0 0.01 56pF 680pF 1 PWM 60 20 84.5k 4.7F VOUT 12V 1.5A 100nF VOUTB 90 0.1 Burst Mode OPERATION 0.01 POWER LOSS (W) 4.7H PGNDB CAP EFFICIENCY (%) VIN 5V Efficiency Curve 100 PWM 0.001 fSW = 1MHz EFFICIENCY POWER LOSS 0.0001 0.1 1 10 100 1000 LOAD CURRENT (mA) 3124 TA01b 3124 TA01a 3124f For more information www.linear.com/LTC3124 1 LTC3124 ABSOLUTE MAXIMUM RATINGS (Note 1) VIN Voltage.................................................... -0.3V to 6V VOUTA, VOUTB Voltages................................ -0.3V to 18V SWA, SWB Voltages (Note 2)...................... -0.3V to 18V SWA, SWB (Pulsed < 100ns) (Note 2)........ -0.3V to 19V VC Voltage...................................................-0.3V to VCC RT Voltage...................................................-0.3V to VCC CAP Voltage VOUT < 5.7V.............................-0.3V to (VOUT + 0.3V) 5.7V VOUT 11.7V...... (VOUT - 6V) to (VOUT + 0.3V) VOUT > 11.7V..................................(VOUT - 6V) to 12V All Other Pins................................................ -0.3V to 6V Operating Junction Temperature Range (Notes 3, 4) LTC3124E/LTC3124I............................ -40C to 125C LTC3124H........................................... -40C to 150C Storage Temperature Range................... -65C to 150C Lead Temperature (Soldering, 10 sec) FE Package Only................................................ 300C PIN CONFIGURATION TOP VIEW TOP VIEW SWB 1 16 CAP PGNDB 2 15 VOUTB SWA 3 14 NC 13 VOUTA PGNDA 4 12 SGND VIN 5 11 SD PWM/SYNC 6 11 SD 7 10 FB VCC 7 10 FB 8 9 VC RT 8 9 SWB 1 16 CAP PGNDB 2 15 VOUTB SWA 3 14 NC PGNDA 4 VIN 5 PWM/SYNC 6 VCC RT 17 PGND DHC PACKAGE 16-LEAD (5mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 43C/W (NOTE 5), JC = 5C/W EXPOSED PAD (PIN 17) IS PGND AND MUST BE SOLDERED TO PCB FOR RATED THERMAL PERFORMANCE 17 PGND 13 VOUTA 12 SGND VC FE PACKAGE 16-LEAD PLASTIC TSSOP TJMAX = 150C, JA = 40C/W (NOTE 5), JC = 10C/W EXPOSED PAD (PIN 17) IS PGND AND MUST BE SOLDERED TO PCB FOR RATED THERMAL PERFORMANCE ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3124EDHC#PBF LTC3124EDHC#TRPBF 3124 16-Lead (5mm x 3mm) Plastic DFN -40C to 125C LTC3124IDHC#PBF LTC3124IDHC#TRPBF 3124 16-Lead (5mm x 3mm) Plastic DFN -40C to 125C LTC3124EFE#PBF LTC3124EFE#TRPBF 3124FE 16-Lead Plastic TSSOP -40C to 125C LTC3124IFE#PBF LTC3124IFE#TRPBF 3124FE 16-Lead Plastic TSSOP -40C to 125C LTC3124HFE#PBF LTC3124HFE#TRPBF 3124FE 16-Lead Plastic TSSOP -40C to 150C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3124f 2 For more information www.linear.com/LTC3124 LTC3124 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25C (Note 3). VIN = 3.6V, VOUTA = VOUTB = 12V, RT = 28k unless otherwise noted. PARAMETER Minimum Start-Up Voltage Input Voltage Range Output Voltage Adjust Range Feedback Voltage Feedback Input Current Quiescent Current, Shutdown Quiescent Current, Active Quiescent Current, Burst N-Channel MOSFET Switch Leakage Current P-Channel MOSFET Switch Leakage Current N-Channel MOSFET Switch On-Resistance P-Channel MOSFET Switch On-Resistance N-Channel MOSFET Peak Current Limit Maximum Duty Cycle Minimum Duty Cycle Switching Frequency SYNC Frequency Range PWM/SYNC Input High Voltage PWM/SYNC Input Low Voltage PWM/SYNC Input Current CAP Clamp Voltage VCC Regulation Voltage Error Amplifier Transconductance Error Amplifier Sink Current Error Amplifier Source Current Soft-Start Time SD Input High Voltage SD Input Low Voltage SD Input Current CONDITIONS VOUT = 0V VOUT 2.5V MIN l l l l FB = 1.4V SD = 0V, VOUT = 0V, Not Including Switch Leakage FB = 1.4V, Measured on VIN, Non-Switching Measured on VIN, FB = 1.4V Measured on VOUT, FB = 1.4V SW = 15V, VOUT = 15V, Per Phase SW = 0V, VOUT = 15V, SD = 0V, Per Phase Per Phase Per Phase Per Phase FB = 1.0V FB = 1.4V Per Phase 0.5 2.5 1.176 l l l l 2.5 90 TYP 1.6 1.200 1 0.2 600 25 10 0.1 0.1 0.130 0.200 3.5 94 l l l l 0.83 0.2 0.9 * VCC 1 l VPWM/SYNC = 5.5V VOUT > 6.2V, Referenced to VOUT VIN < 2.8V, VOUT > 5V l -5.0 3.9 60 l 1.6 FB = 1.6V, VC = 1.15V FB = 800mV, VC = 1.15V 0.01 -5.4 4.25 100 25 -25 10 l SD = 5.5V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Voltage transients on the SW pin beyond the DC limit specified in the Absolute Maximum Ratings are non-disruptive to normal operations when using good layout practices, as shown on the demo board or described in the data sheet or application notes. Note 3: The LTC3124 is tested under pulsed load conditions such that TA TJ. The LTC3124E is guaranteed to meet performance specifications from 0C to 85C junction temperature. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3124I is guaranteed to meet specifications over the -40C to 125C operating junction temperature range. The LTC3124H is guaranteed to meet specifications over the full -40C to 150C operating junction range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125C. 1 MAX 1.8 5.5 15 1.224 50 1 840 40 20 40 70 4.5 0 1.17 6.0 0.1 * VCC 1 -5.8 4.6 130 0.25 2 UNITS V V V V nA A A A A A A A % % MHz MHz V V A V V S A A ms V V A Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. The junction temperature (TJ in C) is calculated from the ambient temperature (TA in C) and power dissipation (PD in Watts) according to the formula: TJ = TA + (PD * JA) where JA is the thermal impedance of the package. Note 4: The LTC3124 includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 150C when overtemperature shutdown is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. Note 5: Failure to solder the exposed backside of the package to the PC board ground plane will result in a thermal impedance much higher than the rated package specifications. For more information www.linear.com/LTC3124 3124f 3 LTC3124 TYPICAL PERFORMANCE CHARACTERISTICS Configured as front page application at TA = 25C, unless otherwise specified. Efficiency vs Load Current, VOUT = 5V Efficiency vs Load Current, VOUT = 7.5V 100 100 Burst Mode 90 OPERATION 50 40 30 fSW = 1MHz VIN = 4.2V VIN = 3.3V VIN = 0.6V 20 10 1 10 100 LOAD CURRENT (mA) 80 70 PWM 60 50 40 30 fSW = 1MHz VIN = 5.4V VIN = 3.8V VIN = 2.3V 20 10 0 0.01 1000 0.1 1 10 100 LOAD CURRENT (mA) 3124 G01 PHASE A INDUCTOR CURRENT 500mA/DIV OUTPUT CURRENT 500mA/DIV PHASE B INDUCTOR CURRENT 500mA/DIV 3124 G04 -0.05 -0.10 -0.15 -0.20 -0.25 -0.30 160 0.1 1 10 100 LOAD CURRENT (mA) VOUT 5V/DIV 150mA 150mA 500s/DIV INDUCTOR A CURRENT 1A/DIV INDUCTOR B CURRENT 1A/DIV 3124 G05 ILOAD = 100mA 3124 G06 2ms/DIV Switching Frequency vs Temperature 0.5 60 40 20 0 -20 -40 -50 1000 Inrush Current Control CHANGE IN FREQUENCY FROM 25C (%) 0 fSW = 1MHz VIN = 5.4V VIN = 4.2V VIN = 2.6V 3124 G03 80 CHANGE IN RDS(ON) FROM 25C (%) CHANGE IN VFB FROM 25C (%) 0 0.01 1000 RDS(ON) vs Temperature, Both NMOS and PMOS 0.05 120 80 TEMPERATURE (C) 30 SD 5V/DIV RC = 169k CC = 330pF NO CF Feedback vs Temperature 40 40 10 1500mA 0 50 20 VOUT 500mV/DIV AC-COUPLED 2s/DIV 60 Load Transient Response VOUT 20mV/DIV AC-COUPLED ILOAD = 500mA PWM 70 3124 G02 PWM Mode Operation -0.35 -40 EFFICIENCY (%) EFFICIENCY (%) EFFICIENCY (%) 60 Burst Mode OPERATION 90 80 PWM 70 0.1 100 Burst Mode 90 OPERATION 80 0 0.01 Efficiency vs Load Current, VOUT = 12V -10 70 110 30 TEMPERATURE (C) 150 3124 G08 3124 G07 0 -0.5 -1.0 -1.5 -2.0 -50 -20 70 10 100 40 TEMPERATURE (C) 130 160 3124 G09 3124f 4 For more information www.linear.com/LTC3124 LTC3124 TYPICAL PERFORMANCE CHARACTERISTICS Configured as front page application at TA = 25C, unless otherwise specified. Peak Current Limit Change vs Temperature PWM Mode Maximum Output Current vs VIN OUTPUT CURRENT (A) 3.2 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0 0.5 1 1.5 2 2.5 3 3.5 VIN (V) 4 4.5 5 200 VOUT = 15V VOUT = 12V VOUT = 7.5V VOUT = 5V VOUT = 2.5V 180 1 160 INPUT CURRENT (mA) VOUT = 5V VOUT = 7.5V VOUT = 12V VOUT = 15V 3.6 2 PEAK CURRENT LIMIT CHANGE FROM 25C (%) 4.0 PWM Operation No-Load Input Current vs VIN 0 -1 -2 140 120 100 80 60 40 -3 20 -4 -50 5.5 -10 70 110 30 TEMPERATURE (C) 0 0.5 150 1 1.5 3124 G11 2 2.5 3 3.5 VIN (V) 4 4.5 3124 G10 Burst Mode No-Load Input Current vs VIN 10000 VOUT = 15V VOUT = 12V VOUT = 7.5V VOUT = 5V VOUT = 2.5V INPUT CURRENT (A) 1000 250 200 150 100 100 50 1.5 2 2.5 3 3.5 4 VIN, FALLING (V) VOUT = 2.5V VOUT = 5V VOUT = 7.5V 4.5 5 10 0.5 5.5 1 3124 G13 1.5 2 2.5 3 3.5 4 VIN, FALLING (V) 4.5 VOUT = 12V VOUT = 15V SD Pin Threshold 5.5 60 45 30 15 0 -15 -50 -10 70 110 30 TEMPERATURE (C) 150 3124 G15 RT vs Frequency VOUT 5V/DIV 100 900mV VSD 500mV/DIV 5 75 3124 G14 RT RESISTANCE (k) OUTPUT CURRENT (mA) 350 300 Burst Mode Quiescent Current Change vs Temperature CHANGE IN CURRENT FROM 25C (%) 400 1 5.5 3124 G12 Burst Mode Output Current vs VIN 0 0.5 5 400mV 1s/DIV 10 3124 G16 10 100 1000 FREQUENCY (kHz) 3000 3124 G17 For more information www.linear.com/LTC3124 3124f 5 LTC3124 TYPICAL PERFORMANCE CHARACTERISTICS Configured as front page application at TA = 25C, unless otherwise specified. Frequency Accuracy Efficiency vs Frequency CAP Pin Voltage vs VOUT 100 2 0 EFFICIENCY (%) 1 0 -1 -2 0.5 -1 1 1.5 2 2.5 3 3.5 4 VIN, FALLING (V) 4.5 5 70 60 50 40 30 20 VOUT = 15V VOUT = 3.6V VOUT = 2.5V 100kHz EFFICIENCY 1MHz EFFICIENCY 3MHz EFFICIENCY 10 0 5.5 VCAP, REFERRED TO VOUT (V) CHANGE IN FREQUENCY (%) 90 80 10 100 OUTPUT CURRENT (mA) -2 -3 -4 -5 -6 -7 1000 0 2 4 8 6 10 VOUT (V) 12 3124 G20 3124 G19 VCC vs VIN 14 3124 G21 Burst Mode Operation to PWM Mode Burst Mode Operation 4.5 VOUT 100mV/DIV AC-COUPLED VCC (V) 4.0 VSWA 10V/DIV 3.5 VIN FALLING VIN RISING 0 1 2 3 VIN (V) VPWM/SYNC 2V/DIV PHASE A INDUCTOR CURRENT 500mA/DIV 3.0 2.5 VOUT 50mV/DIV AC-COUPLED 4 5 6 5s/DIV OUTPUT CURRENT = 50mA 3124 G23 3124 G24 50s/DIV OUTPUT CURRENT = 100mA TYPE III COMPENSATION--SEE FIGURE 10 FOR COMPONENT VALUES 3124 G22 PWM Mode to Burst Mode Operation Burst Mode Transient Synchronized Operation VOUT 100mV/DIV AC-COUPLED VOUT 50mV/DIV AC-COUPLED VSWB 10V/DIV SYNCHRONIZED TO 1.3MHz VSWA 10V/DIV VPWM/SYNC 2V/DIV OUTPUT CURRENT 100mA/DIV 3124 G25 50s/DIV OUTPUT CURRENT = 100mA TYPE III COMPENSATION--SEE FIGURE 10 FOR COMPONENT VALUES SYNCHRONIZATION SIGNAL SET TO 2.6MHz 100mA 10mA VPWM/SYNC 5V/DIV 10mA 200s/DIV 3124 G26 1s/DIV OUTPUT CURRENT = 1A 3124 G27 3124f 6 For more information www.linear.com/LTC3124 LTC3124 TYPICAL PERFORMANCE CHARACTERISTICS Configured as front page application at TA = 25C, unless otherwise specified. SWA and SWB at 1MHz/Phase Short-Circuit Response SHORT-CIRCUIT APPLIED VOUT 5V/DIV VSWB 5V/DIV SHORT-CIRCUIT REMOVED INDUCTOR B CURRENT 2A/DIV VSWA 5V/DIV INDUCTOR A CURRENT 2A/DIV ILOAD = 500mA 3124 G28 100s/DIV ILOAD = 1500mA 500ns/DIV 3124 G29 Output Voltage Ripple at 1.5A Load with Two 10F Ceramic Capacitors SW Pins while Synchronizing to 1.2MHz VOUT 20mV/DIV AC-COUPLED VSWB 5V/DIV INDUCTOR B CURRENT 500mA/DIV INDUCTOR A CURRENT 500mA/DIV VSWA 5V/DIV ILOAD = 1500mA 500ns/DIV 3124 G30 500ns/DIV 3124 G31 PIN FUNCTIONS SWB, SWA (Pin 1, Pin 3): Phase B and Phase A Switch Pins. Connect inductors from these pins to the input supply. Keep PCB trace lengths as short and wide as possible to reduce EMI and voltage overshoot. When VOUT VIN + 2V, internal anti-ringing resistors are connected between VIN and both SWA and SWB after their respective inductor currents have dropped to near zero, to minimize EMI. These anti-ringing resistors are also activated in shutdown and during the sleep periods of Burst Mode operation. PGNDB, PGNDA, PGND (Pin 2, Pin 4, Exposed Pad Pin 17): Power Ground. When laying out your PCB, provide a short, direct path between PGND and the output capacitors and tie directly to the ground plane. The exposed pad is ground and must be soldered to the PCB ground plane for rated thermal and electrical performance. VIN (Pin 5): Input Supply Pin. The device is powered from VIN if VIN is initially greater than approximately 3.5V, with VIN continuing to supply the device down to approximately 3V; otherwise the greater of VIN and VOUT supplies the 3124f For more information www.linear.com/LTC3124 7 LTC3124 PIN FUNCTIONS device. Place a low ESR ceramic bypass capacitor of at least 10F from VIN to PGND. X5R and X7R dielectrics are preferred for their superior voltage and temperature characteristics. VC (Pin 9): Error Amplifier Output. A frequency compensation network is connected from this pin to SGND to compensate the control loop. See Compensating the Feedback Loop section for guidelines. PWM/SYNC (Pin 6): Burst Mode Operation Select and Oscillator Synchronization. Do not leave this pin floating. FB (Pin 10): Feedback Input to the Error Amplifier. Connect the resistor divider tap to this pin. Connect the top of the divider to VOUT and the bottom of the divider to SGND. The output voltage can be adjusted from 2.5V to 15V according to the formula: * PWM/SYNC = High. Disable Burst Mode operation and maintain low noise, constant frequency operation. * PWM/SYNC = Low. The converter operates in Burst Mode, independent of load current. * PWM/SYNC = External CLK. The internal oscillator is synchronized to the external CLK signal. Burst Mode operation is disabled. A clock pulse width of 100ns minimum is required to synchronize the oscillator. An external resistor MUST BE connected between RT and SGND to program the oscillator slightly below the desired synchronization frequency. In non-synchronized applications, repeated clocking of the PWM/SYNC pin to affect an operating mode change is supported with these restrictions: * Boost Mode (VOUT > VIN): IOUT < 3mA: fPWM/SYNC 10Hz, IOUT 3mA: fPWM/SYNC 5kHz. * Buck Mode (VOUT < VIN): IOUT < 5mA: fPWM/SYNC 2.5Hz, IOUT 5mA: fPWM/SYNC 5kHz. VCC (Pin 7): VCC Regulator Output. Connect a low ESR filter capacitor of at least 4.7F from this pin to SGND to provide a regulated rail approximately equal to the lower of VIN and 4.25V. When VOUT is higher than VIN, and VIN falls below 3V, VCC will regulate to the lower of approximately VOUT and 4.25V. A UVLO event occurs if VCC drops below 1.5V, typical. Switching is inhibited, and a soft-start is initiated when VCC returns above 1.6V, typical. RT (Pin 8): Frequency Adjust Pin. Connect to SGND through an external resistor (RT) to program the oscillator frequency according to the formula: fOSC 56 RT fSWITCH = R1 VOUT = 1.2V * 1+ R2 SD (Pin 11): Logic Controlled Shutdown Input. Pulling this pin above 1.6V enables normal, free-running operation. Forcing this pin below 0.25V shuts the LTC3124 off, with quiescent current below 1A. Do not leave this pin floating. SGND (Pin 12): Signal Ground. When laying out your PC board, provide a short, direct path between SGND and the ground referenced sides of all the appropriate components connecting to pins RT, VC, and FB. VOUTA, VOUTB (Pin 13, Pin 15): Output Voltage Senses and the Source of the Internal Synchronous Rectifier MOSFETs. Driver bias is derived from VOUT. Connect the output filter capacitor from VOUT to PGND, close to the IC. A minimum value of 10F ceramic per phase is recommended. VOUT is disconnected from VIN when SD is low. VOUTA and VOUTB must be tied together. NC (Pin 14): No Connect. Not connected internally. Connect this pin to VOUTA/VOUTB to provide a wider VOUT copper plane on the printed circuit board. CAP (Pin 16): Serves as the Low Reference for the Synchronous Rectifiers Gate Drives. Connect a low ESR filter capacitor (typically 100nF) from this pin to VOUT to provide an elevated ground rail, approximately 5.4V below VOUT, used to drive the synchronous rectifiers. fOSC 28 2 RT where fOSC is in MHz and RT is in k. 8 3124f For more information www.linear.com/LTC3124 LTC3124 BLOCK DIAGRAM VIN VOUTB SWB PWM COMP EN + - CURRENT SENSE + IPEAK COMP LB OVLO STOP SWITCHING + - 3.5A ADAPTIVE SLOPE COMP VIN 1.8V TO 5.5V + PWM LOGIC AND DRIVERS IZERO COMP BURST SLEEP + VIN THERMAL SD + + - REFERENCE 1.2V Burst Mode CONTROL VREFUP VIN 3.5A 4.25V LDO ADAPTIVE SLOPE COMP OSCILLATOR SOFTSTART gm ERROR AMPLIFIER SYNC - + + VC VCC RC CC RT PGNDB 2 8 PWM/SYNC 6 RT 13 TSD IPEAK COMP CF 16 + - CURRENT SENSE CIN 9 CCAP 100nF BULK CONTROL SIGNALS VOUTA PWM COMP 5 VIN +-- LA COUT 11 16.5V SWA ANTIRING VOUT 2.5V TO 15V 15 NC 14 + 3 CAP VOUT - 5.4V RAIL IZERO COMP + - ANTIRING SD SHUT DOWN PWM LOGIC AND DRIVERS +-- 1 BULK CONTROL SIGNALS VCC PGNDA SGND 12 7 4 FB R1 10 EXPOSED PAD 17 R2 3124 BD CVCC 3124f For more information www.linear.com/LTC3124 9 LTC3124 OPERATION The LTC3124 is a dual-phase, adjustable frequency (100kHz to 3MHz) synchronous boost converter housed in either a 16-lead 5mm x 3mm DFN or a thermally-enhanced TSSOP package. The LTC3124 offers the unique ability to start up from inputs as low as 1.8V and continue to operate from inputs as low as 0.5V, for output voltages greater than 2.5V. The device also features fixed frequency, current mode PWM control for exceptional line and load regulation. The current mode architecture with adaptive slope compensation provides excellent load transient response and requires minimal output filtering. An internal 10ms soft-start limits inrush current during start-up and simplifies the design process while minimizing the number of external components. With its low RDS(ON) and low gate charge internal N-channel MOSFET switches and P-channel MOSFET synchronous rectifiers, the LTC3124 achieves high efficiency over a wide range of load current. High efficiency is achieved at light loads by utilizing Burst Mode operation. Operation can be best understood by referring to the Block Diagram. The peak inductor current, reduced nearly by a factor of 2 when compared to a single phase step-up converter, is given by: 1 I I ILPEAK * O + L 1 2 (1-D) 2 where IO is the average load current, D is the PWM duty cycle, and IL is the inductor ripple current. This relationship is shown graphically in Figure 1. With 2-phase operation, one of the phases is always delivering current to the load whenever VIN is greater than one-half VOUT (duty cycles less than 50%). As the duty cycle decreases further, load current delivery between the two phases begins to overlap, occurring simultaneously for a growing portion of each phase as the duty cycle approaches zero. This significantly reduces both the output ripple current and the peak current in each inductor, when compared with a single-phase converter. This is illustrated in the waveforms of Figures 2 and 3. MULTIPHASE OPERATION The LTC3124 uses a dual-phase architecture, rather than the conventional single phase of other boost converters. By having two phases equally spaced 180 apart, not only is the output ripple frequency increased by a factor of two, but the output capacitor ripple current is significantly reduced. Although this architecture requires two inductors, rather than a single inductor, there are a number of important advantages. * Substantially lower peak inductor current allows the use of smaller, lower cost inductors. * Significantly reduced output ripple current minimizes output capacitance requirement. OUTPUT RIPPLE CURRENT (A) 3.5 SINGLE PHASE 3.0 2.5 2.0 DUAL PHASE 1.5 1.0 0.5 0 0 0.5 1.0 1.5 TIME (s) 3124 F01 Figure 1. Comparison of Output Ripple Current with Single Phase and Dual Phase Boost Converter in a 1.5A Load Application Operating at 50% Duty Cycle * Higher frequency output ripple is easier to filter for low noise applications. * Input ripple current is also reduced for lower noise on VIN. 3124f 10 For more information www.linear.com/LTC3124 LTC3124 OPERATION LOW VOLTAGE OPERATION SWITCH A VOLTAGE The LTC3124 is designed to allow start-up from input voltages as low as 1.8V. When VOUT exceeds 2.5V, the LTC3124 continues to regulate its output, even when VIN falls as low as 0.5V. This feature extends operating times by maximizing the amount of energy that can be extracted from the input source. The limiting factors for the application become the availability of the power source to supply sufficient power to the output at the low input voltage, and the maximum duty cycle, which is clamped at 94%. Note that at low input voltages, small voltage drops due to series resistance become critical and greatly limit the power delivery capability of the converter. SWITCH B VOLTAGE INDUCTOR A CURRENT INDUCTOR B CURRENT INPUT CURRENT RECTIFIER A CURRENT RECTIFIER B CURRENT OUTPUT RIPPLE CURRENT LOW NOISE FIXED FREQUENCY OPERATION 3124 F02 Figure 2. Simplified Voltage and Current Waveforms for 2-Phase Operation at 50% Duty Cycle SWITCH A VOLTAGE SWITCH B VOLTAGE INDUCTOR A CURRENT INDUCTOR B CURRENT INPUT CURRENT RECTIFIER A CURRENT RECTIFIER B CURRENT OUTPUT RIPPLE CURRENT Soft-Start The LTC3124 contains internal circuitry to provide softstart operation. The soft-start utilizes a linearly increasing ramp of the error amplifier reference voltage from zero to its nominal value of 1.2V in approximately 10ms, with the internal control loop driving VOUT from zero to its final programmed value. This limits the inrush current drawn from the input source. As a result, the duration of the soft-start is largely unaffected by the size of the output capacitor or the output regulation voltage. The closed-loop nature of the soft-start allows the converter to respond to load transients that might occur during the soft-start interval. The soft-start period is reset by a shutdown command on SD, a UVLO event on VCC (VCC < 1.5V), an overvoltage event on VOUT (VOUT 16.5V), or an overtemperature event (TSD is invoked when the die temperature exceeds 170C). Upon removal of these fault conditions, the LTC3124 will soft-start the output voltage. Error Amplifier 3124 F03 Figure 3. Simplified Voltage and Current Waveforms for 2-Phase Operation at 25% Duty Cycle The noninverting input of the transconductance error amplifier is internally connected to the 1.2V reference and the inverting input is connected to FB. An external resistive voltage divider from VOUT to SGND programs the output voltage from 2.5V to 15V via FB as shown in Figure 4. R1 VOUT = 1.2V 1+ R2 For more information www.linear.com/LTC3124 3124f 11 LTC3124 OPERATION Selecting an R2 value of 113k to have approximately 10A of bias current in the VOUT resistor divider yields the formula: R1 = 94 * (VOUT - 1.2V); VOUT in Volts and R1 in k. Power converter control loop compensation is set with a simple RC network connected between VC and SGND. VOUT LTC3124 R1 FB 1.2V R2 + - 3124 F04 Figure 4. Programming the Output Voltage Internal Current Limit Current limit comparators shut off the N-channel MOSFET switches once their respective peak current is reached. Peak switch current per phase is limited to 3.5A, independent of input or output voltage, unless VOUT is below approximately 1.5V, resulting in the current limit being approximately half of the nominal peak values. Lossless current sensing converts the peak current signals of the N-channel MOSFET switches into voltages that are summed with their respective internal slope compensation. The summed signals are compared to the error amplifier outputs to provide a peak current control command for the PWMs. Zero Current Comparator The zero current comparators monitor the inductor currents being delivered to the output and shut off the synchronous rectifiers when the current is approximately 50mA. This prevents the inductor currents from reversing in polarity, improving efficiency at light loads. Oscillator The internal oscillator is programmed to twice the desired switching frequency with an external resistor from the RT pin to SGND according to the following formula: 56 fOSC (MHz) = 2 * f (MHz) R T (k) where f = switching frequency of one phase. 12 Thus RT (k) 28/f (MHz). See Table 1 for various switching frequencies and their corresponding RT values. Table 1. Switching Frequency and Their Respective RT SWITCHING FREQUENCY (kHz) 100 200 300 500 800 1000 1200 2000 2200 3000 RT (k) 316 154 100 57.6 34.8 28 22.6 13 11.5 8.06 For desired switching frequencies not included in Table 1, please refer to the Resistance vs Frequency curve in the Typical Performance Characteristics section. The oscillator can be synchronized to an external frequency by applying a pulse train of twice the desired switching frequency to the PWM/SYNC pin. An external resistor must be connected between RT and SGND to program the oscillator to a frequency approximately 25% below that of the externally applied pulse train used for synchronization. RT is selected in this case according to this formula: RT(SYNC) (k) 1.25 * RT(SWITCH) (k) where RT(SWITCH) is the value of RT at the desired switching frequency, which is half of the synchronization frequency. Shutdown The boost converter is disabled by pulling SD below 0.25V and enabled by pulling SD above 1.6V. Note that SD can be driven above VIN or VOUT, as long as it is limited to less than its absolute maximum rating. Thermal Shutdown If the die temperature exceeds 170C typical, the LTC3124 will go into thermal shutdown (TSD). All switches will be shut off until the die temperature drops by approximately 7C, when the device re-initiates a soft-start and switching is re-enabled. For more information www.linear.com/LTC3124 3124f LTC3124 OPERATION Boost Anti-Ringing Control Output Disconnect When VOUT VIN + 2V, the anti-ringing circuitry connects a resistor across each inductor to VIN to damp high frequency ringing on the SW pins during discontinuous current mode operation. Although the ringing of the resonant circuits formed by the inductors and CSW(A/B) (capacitance on the respective SW pins) is low energy, it can cause EMI radiation if not damped. The LTC3124's output disconnect feature eliminates body diode conduction of the internal P-channel MOSFET rectifiers. This feature allows for VOUT to discharge to 0V during shutdown, and draw no current from the input source. Inrush current will also be limited at turn-on, minimizing surge currents seen by the input supply. Note that to obtain the advantages of output disconnect, there must not be an external Schottky diode connected between SWA, SWB and VOUT. The output disconnect feature also allows VOUT to be pulled high, without backfeeding the power source connected to VIN. VCC Regulator An internal low dropout regulator generates the 4.25V (nominal) VCC rail from VIN or VOUT, depending upon operating conditions. VCC is supplied from VIN if VIN is initially greater than approximately 3.5V, with VIN continuing to supply VCC down to approximately 3V; otherwise the greater of VIN and VOUT supplies VCC. The VCC rail powers the internal control circuitry and power MOSFET gate drivers of the LTC3124. The VCC regulator is disabled in shutdown to reduce quiescent current and is enabled by forcing the SD pin above its input high threshold. A 4.7F or larger capacitor must be connected between VCC and SGND. Overvoltage Lockout An overvoltage condition occurs when VOUT exceeds approximately 16.5V. Switching is disabled and the internal soft-start ramp is reset. Once VOUT drops below approximately 16V a soft-start is initiated and switching is allowed to resume. If the boost converter output is lightly loaded such that the time constant of the output capacitance, COUT, and the output load resistance, ROUT is near or greater than the soft-start time of approximately 10ms, the soft-start ramp may end before or soon after switching resumes, defeating the inrush current limiting of the closed-loop soft-start following an overvoltage event. Short-Circuit Protection The LTC3124 output disconnect feature allows output short-circuit protection while maintaining a maximum set current limit. To reduce power dissipation under overload and short-circuit conditions, the peak switch current limits are reduced to approximately 2A. Once VOUT exceeds approximately 1.5V, the current limits are reset to their nominal values of 3.5A per phase. VIN > VOUT Operation The LTC3124 step-up converter will maintain voltage regulation even when the input voltage is above the desired output voltage. Note that operating in this mode will exhibit lower efficiency and a reduced output current capability. Refer to the Typical Performance Characteristics for details. Burst Mode OPERATION When the PWM/SYNC pin is held low, the boost converter operates in Burst Mode, independent of load current. This mode of operation is typically commanded to improve efficiency at light loads and reduce standby current at no load. The output current (IOUT) capability in Burst Mode operation is significantly less than in PWM mode and varies with VIN and VOUT, as shown in Figure 5. The logic input thresholds for this pin are determined relative to VCC with a low being less than 10% of VCC and a high being greater than 90% of VCC. The LTC3124 will operate in fixed frequency PWM mode even if Burst Mode operation is commanded during soft-start. In Burst Mode operation, only Phase A of the LTC3124 is operational, while Phase B is disabled. The Phase A inductor current is initially charged to approximately 700mA by turning on the N-channel MOSFET switch, at which point the N-channel switch is turned off and the P-channel synchronous switch is turned on, delivering current to the output. When the inductor current discharges to approximately zero, the cycle repeats. In Burst Mode operation, energy is delivered to the output until the nominal 3124f For more information www.linear.com/LTC3124 13 LTC3124 OPERATION 400 OUTPUT CURRENT (mA) 350 300 250 200 150 100 50 0 0.5 1 1.5 2 2.5 3 3.5 4 VIN, FALLING (V) VOUT = 2.5V VOUT = 5V VOUT = 7.5V 4.5 5 5.5 3124 F05 VOUT = 12V VOUT = 15V regulation value is reached, then the LTC3124 transitions into a very low quiescent current sleep state. In sleep, the output switches are turned off and the LTC3124 consumes only 25A of quiescent current. When the output voltage droops approximately 1%, switching resumes. This maximizes efficiency at very light loads by minimizing switching and quiescent losses. Output voltage ripple in Burst Mode operation is typically 1% to 2% peak-to-peak. Additional output capacitance (22F or greater), or the addition of a small feedforward capacitor (10pF to 50pF) connected between VOUT and FB can help further reduce the output ripple. Figure 5. Burst Mode Output Current vs VIN APPLICATIONS INFORMATION PCB LAYOUT CONSIDERATIONS The LTC3124 switches currents as high as 4.5A at high frequencies. Special attention should be paid to the PCB layout to ensure a stable, noise-free and efficient application circuit. Figure 6 presents the LTC3124's 4-layer PCB demo board layout (the schematic of which may be obtained from the Quick Start Guide) to outline some of the primary considerations. A few key guidelines are outlined below: 1. A 4-layer board is highly recommended for the LTC3124 to ensure stable performance over the full operating voltage and current range. A dedicated/solid ground plane should be placed directly under the VIN, VOUTA, VOUTB, SWA, and SWB traces to provide a mirror plane to minimize noise loops from high dI/dt and dV/dt edges (see Figure 6, 2nd layer). 2. All circulating high current paths should be kept as short as possible. Capacitor ground connections should via down to the ground plane in the shortest route possible. The bypass capacitors on VIN should be placed as close to the IC as possible and should have the shortest possible paths to ground (see Figure 6, top layer). 3. PGNDA pin, PGNDB pin, and the exposed pad are the power ground connections for the LTC3124. Multiple vias should connect the back pad directly to the ground plane. In addition, maximization of the metallization connected to the back pad will improve the thermal environment and improve the power handling capabilities of the IC. 4. The high current components and their connections should all be placed over a complete ground plane to minimize loop cross-sectional areas. This minimizes EMI and reduces inductive drops. 5. Connections to all of the high current components should be made as wide as possible to reduce the series resistance. This will improve efficiency and maximize the output current capability of the boost converter. 6. To prevent large circulating currents from disrupting the converters' output voltage sensing, compensation, and programmed switching frequency, the ground for the resistor divider, compensation components, and RT should be returned to the ground plane using a via placed close to the IC and away from the power connections. 3124f 14 For more information www.linear.com/LTC3124 LTC3124 APPLICATIONS INFORMATION 7. Keep the connections from the resistor divider to the FB pin and from the compensation components to the VC pin as short as possible and away from the switch pin connections. 8. Crossover connections should be made on inner copper layers if available. If it is necessary to place these on the ground plane, make the trace on the ground plane as short as possible to minimize the disruption to the ground plane (see Figure 6, 3rd layer). Top Layer 2nd Layer 3rd Layer Bottom Layer (Top View) Figure 6. Example PCB Layout For more information www.linear.com/LTC3124 3124f 15 LTC3124 APPLICATIONS INFORMATION SCHOTTKY DIODE Although it is not required, adding a Schottky diode from both SW pins to VOUT can improve the converter efficiency by up to 4%. Note that this defeats the output disconnect and short-circuit protection features of the LTC3124. windings) to reduce the I2R power losses, and must be able to support the peak inductor current without saturating. Molded chokes and most chip inductors usually do not have enough core area to support the peak inductor currents of 3A to 4A seen on the LTC3124. To minimize radiated noise, use a shielded inductor. COMPONENT SELECTION See Table 2 for suggested components and suppliers. Inductor Selection Table 2. Recommended Inductors The LTC3124 can utilize small inductors due to its capability of setting a fast (up to 3MHz) switching frequency. Larger values of inductance will allow slightly greater output current capability by reducing the inductor ripple current. To design a stable converter the range of inductance values is bounded by the targeted magnitude of the internal slope compensation and is inversely proportional to the switching frequency. The Inductor selection for the LTC3124 has the following bounds: 10 3 H >L > H f f The inductor peak-to-peak ripple current is given by the following equation: Ripple ( A ) = VIN * ( VOUT - VIN ) f *L * VOUT where: L = Inductor Value in H f = Switching Frequency in MHz of One Phase The inductor ripple current is a maximum at the minimum inductor value. Substituting 3/f for the inductor value in the above equation yields the following: RippleMAX ( A ) = VIN * ( VOUT - VIN ) 3 * VOUT A reasonable operating range for the inductor ripple current is typically 10% to 40% of the maximum inductor current. High frequency ferrite core inductor materials reduce frequency dependent power losses compared to cheaper powdered iron types, improving efficiency. The inductor should have low DCR (series resistance of the Sumida CDR7D28MNNP-1R2NC Sumida CDMC6D28NP-3R3MC 1.2 3.3 21 31 Taiyo-Yuden NR5040T3R3N 3.3 35 SIZE (mm) ISAT (A) WxLxH 5.4 4.3 x 4.3 x 2.1 3.7 7.3 x 7.3 x 4.1 8.7 5.3 x 5.3 x 3.1 6.7 5.3 x 5.3 x 3.1 6.3 5.3 x 5.3 x 5.1 5.6 6.3 x 6.3 x 6.1 4.34 12.3 x 12.3 x 6.2 4.8 5.2 x 5.2 x 3 4.37 7.6 x 7.6 x 4.35 3.84 12.5 x 12.5 x 6 5.28 12.5 x 12.5 x 8 5.9 7.6 x 7.6 x 3 5 7.25 x 6.7 x 3 3.8 5x5x4 TDK LTF5022T-1R2N4R2-LC TDK SPM6530T-3R3M TDK VLP8040T-4R7M 1.2 3.3 4.7 25 30 25 4.3 6.8 4.4 5 x 5.2 x 2.2 7.1 x 6.5 x 3 8 x 7.7 x 4 Wurth WE-LHMI 74437324010 Wurth WE-PD 7447789002 Wurth WE-PD 7447779002 Wurth WE-PD 7447789003 Wurth WE-PD 7447789004 Wurth WE-HCI 7443251000 Wurth WE-PD 744770122 Wurth WE-PD 744770133 Wurth WE-PD 7447709470 1 2.2 2.2 3.3 4.7 10 22 33 47 27 20 20 30 35 16 43 64 60 9 4.8 6 4.2 3.9 8.5 5 3.6 4.5 4.45 x 4.06 x 1.8 7.3 x 7.3 x 3.2 7.3 x 7.3 x 4.5 7.3 x 7.3 x 3.2 7.3 x 7.3 x 3.2 10 x 10 x 5 12 x 12 x 8 12 x 12 x 8 12 x 12 x 10 PART NUMBER Coilcraft XFL4020-102ME Coilcraft MSS7341T-332NL Coilcraft XAL5030-332ME Coilcraft XAL5030-472ME Coilcraft XAL5050-562ME Coilcraft XAL6060-223ME Coilcraft MSS1260T-333ML Coiltronics SD53-1R1-R Coiltronics DR74-4R7-R Coiltronics DR125-330-R Coiltronics DR127-470-R VALUE DCR (H) (m) 1 12 3.3 18 3.3 23 4.7 36 5.6 26 22 61 33 57 1.1 20 4.7 25 33 51 47 72 Output and Input Capacitor Selection Low ESR (equivalent series resistance) capacitors should be used to minimize the output voltage ripple. Multilayer ceramic capacitors are an excellent choice as they have extremely low ESR and are available in small footprints. X5R and X7R dielectric materials are preferred for their ability to maintain capacitance over wide voltage and temperature ranges. Y5V types should not be used. Although ceramic capacitors are recommended, low ESR tantalum capacitors may be used as well. 3124f 16 For more information www.linear.com/LTC3124 LTC3124 APPLICATIONS INFORMATION When selecting output capacitors, the magnitude of the peak inductor current, together with the ripple voltage specification, determine the choice of the capacitor. Both the ESR (equivalent series resistance) of the capacitor and the charge stored in the capacitor each cycle contribute to the output voltage ripple. Manufacturer, Part Number AVX, 1206YD226KAT2A Value (F) 22 Voltage (V) 16 SIZE L x W x H (mm) Type, ESR (m) AVX, 1210YC226KAT2A 22 16 3.2 x 2.5 x 2.79, X7R Ceramic The peak-to-peak ripple due to the charge is approximately: Murata, GRM31CR61C226ME15L 22 16 3.2 x 1.6 x 1.8, X5R Ceramic Murata, GRM32ER71C226KE18K 22 16 3.2 x 2.5 x 2.7, X7R Ceramic Murata, GRM43ER61C226KE01L 22 16 4.5 x 3.2 x 2.7, X5R Ceramic IP = Peak inductor current Murata, GRM32EB31C476ME15K 47 16 3.2 x 2.5 x 2.5, X5R Ceramic f = Switching frequency of one phase Panasonic, ECJ-4YB1C226M 22 16 3.2 x 2.5 x 2.7, X5R Ceramic Taiyo Yuden, EMK316BJ226ML-T 22 16 3.2 x 1.6 x 1.8, X5R Ceramic Taiyo Yuden, EMK325B7226MM-TR 22 16 3.2 x 2.5 x 2.7, X7R Ceramic Taiyo Yuden, EMK432BJ226KM-T 22 16 4.5 x 3.2 x 2.7, X5R Ceramic TDK, C5750X7R1C476M 47 16 5.7 x 5 x 2.5, X7R Ceramic TDK, C4532X5R0J107M 100 6.3 4.5 x 3.2 x 2.8, X5R Ceramic Nichicon, UBC1C101MNS1GS 100 16 Sanyo, 25TQC22MV Sanyo, 16TQC47MW 22 25 8.3 x 8.3 x 11.5, Aluminum Polymer 7.3 x 4.3 x 1.9, POSCAP, 45m 47 16 7.3 x 4.3 x 3.1, POSCAP, 40m Sanyo, 16TQC100M 100 16 7.3 x 4.3 x 3.1, POSCAP, 50m Sanyo, 25SVPF47M 47 25 6.6 x 6.6 x 5.9, OS-CON, 30m AVX, BestCap Series BZ125A105ZLB 1F 5.5 48 x 30 x 6.1, 35m, 4 Lead 39 x 17 x 3.8, 28m D = 22, H = 45 15m D = 21.5, H = 7.5 30m D = 18.5, H = 60 20m D = 18, H = 40 20 m VRIPPLE(CHARGE)(V) where: IP * VIN COUT * VOUT * f * 2 The ESR of COUT is usually the most dominant factor for ripple in most power converters. The peak-to-peak ripple due to the capacitor ESR is: VRIPPLE(ESR)(V) =ILOAD * RESR * VOUT VIN where RESR = capacitor equivalent series resistance. The input filter capacitor reduces peak currents drawn from the input source and reduces input switching noise. A low ESR bypass capacitor with a minimum value of 10F should be located as close to VIN as possible. Low ESR and high capacitance are critical to maintain low output ripple. Capacitors can be used in parallel for even larger capacitance values and lower effective ESR. Ceramic capacitors are often utilized in switching converter applications due to their small size, low ESR and low leakage currents. However, many ceramic capacitors experience significant loss in capacitance from their rated value with increased DC bias voltage. It is not uncommon for a small surface mount capacitor to lose more than 50% of its rated capacitance when operated near its rated voltage. As a result it is sometimes necessary to use a larger capacitor value or a capacitor with a larger value and case size, such as 1812 rather than 1206, in order to actually realize the intended capacitance at the full operating voltage. Be sure to consult the vendor's curve of capacitance versus DC bias voltage. Table 3 shows a sampling of capacitors suited for the LTC3124 applications. Table 3: Representative Output Capacitors Cap-XX GS230F 1.2F 4.5 Tecate Powerburst TPL-100/22X45 Cooper KR-5R5C155-R 100F 2.7 1.5F 5.5 Cooper HB1860-2R5117-R Maxwell BCAP0050-P270 110F 2.5 50F 2.5 3.2 x 1.6 x 1.78, X5R Ceramic 3124f For more information www.linear.com/LTC3124 17 LTC3124 APPLICATIONS INFORMATION For applications requiring a very low profile and very large capacitance, the GS, GS2 and GW series from Cap-XX, the BestCap series from AVX and PowerStor KR series capacitors from Cooper all offer very high capacitance and low ESR in various low profile packages. OPERATING FREQUENCY SELECTION There are several considerations in selecting the operating frequency of the converter. Typically, the first consideration is to stay clear of sensitive frequency bands, which cannot tolerate any spectral noise. For example, in products incorporating RF communications, the 455kHz IF frequency can be sensitive to any noise, therefore switching above 600kHz is desired. Some communications have sensitivity to 1.1MHz and in that case a 1.5MHz switching converter frequency may be employed. A second consideration is the physical size of the converter. As the operating frequency is increased, the inductor and filter capacitors typically can be reduced in value, leading to smaller sized external components. The smaller solution size is typically traded for efficiency, since the switching losses due to gate charge increase with frequency. Another consideration is whether the application can allow pulse-skipping. When the boost converter pulse-skips, the minimum on-time of the converter is unable to support the duty cycle. This results in a low frequency component to the output ripple. In many applications where physical size is the main criterion, running the converter in this mode is acceptable. In applications where it is preferred not to enter this mode, the maximum operating frequency is given by: f MAX _ NOSKIP < VOUT - VIN Hz VOUT * tON(MIN) Thermal Considerations For the LTC3124 to deliver its full power, it is imperative that a good thermal path be provided to dissipate the heat generated within the package. This can be accomplished by taking advantage of the large thermal pad on the underside of the IC. It is recommended that multiple vias in the printed circuit board be used to conduct heat away from the IC and into a copper plane with as much area as possible. If the junction temperature rises above ~170C, the part will trip an internal thermal shutdown, and all switching will stop until the junction temperature drops ~7C. Compensating the Feedback Loop The LTC3124 uses current mode control, with internal adaptive slope compensation. Current mode control eliminates the second order filter due to the inductor and output capacitor exhibited in voltage mode control, and simplifies the power loop to a single pole filter response. Because of this fast current control loop, the power stage of the IC combined with the external inductor can be modeled by a transconductance amplifier gmp and a current controlled current source. Figure 7 shows the key equivalent small signal elements of a boost converter. The DC small-signal loop gain of the system shown in Figure 7 is given by the following equation: GBOOST = GEA *GMP *GPOWER * R2 R1+R2 where GEA is the DC gain of the error amplifier, GMP is the modulator gain, and GPOWER is the inductor current to VOUT gain. GEA = gma * RO 1000V/V where tON(MIN) = minimum on-time, which is typically around 100ns. (Not Adjustable; gma 100S, RO 10M) GMP = 2 * gmp ; gmp = GPOWER = IL 3.4S (Not Adjustable ) VC VOUT * VIN * VIN *RL = = IL 2 *IOUT 2 * VOUT 3124f 18 For more information www.linear.com/LTC3124 LTC3124 APPLICATIONS INFORMATION - MODULATOR +gmp IL ERROR AMPLIFIER VC CF RC CC RO VOUT * VIN *I 2 * VOUT L RESR + - RL COUT 1.2V REFERENCE RPL CPL gma Phase Lead Zero: Z4 = R1 FB R2 CC: COMPENSATION CAPACITOR 3124 F07 RC: COMPENSATION RESISTOR CF: HIGH FREQUENCY FILTER CAPACITOR CPL: PHASE LEAD CAPACITOR RPL: PHASE LEAD RESISTOR gma: TRANSCONDUCTANCE AMPLIFIER INSIDE IC RO: OUTPUT RESISTANCE OF gma gmp: POWER STAGE TRANSCONDUCTANCE AMPLIFIER COUT: OUTPUT CAPACITOR RESR: OUTPUT CAPACITOR ESR RL: OUTPUT RESISTANCE DEFINED AS VOUT/ILOAD(MAX) R1, R2: FEEDBACK RESISTOR DIVIDER NETWORK : CONVERSION EFFICIENCY (~90% AT HIGHER CURRENTS) Figure 7. Boost Converter Equivalent Model Combining the two equations above yields: GDC = GMP *GPOWER 3.4 * * VIN *RL V/V VOUT Converter efficiency will vary with IOUT and switching frequency fSWITCH as shown in the typical performance characteristics curves. Output Pole: P1 = 2 Hz 2 *RL *COUT Error Amplifier Pole: P2 = C 1 Hz; CF < C 10 2 *RO * (CC +CF ) 1 Hz; ExtremelyClose toDC 2 *RO *CC 1 Hz Error Amplifier Zero: Z1 = 2 *RC *CC ESR Zero: Z2 = RHP Zero: Z3 = Phase Lead Pole: P4 = 1 2 *RESR *COUT 1 Hz 2 * (R1+RPL ) *CPL 1 Hz R1*R2 2 * +RPL *CPL R1+R2 Error Amplifier Filter Pole: P5 = 1 2 *RC * CC *CF CC +CF Hz, CF < CC 10 1 Hz 2 *RC *CF The current mode zero (Z3) is a right-half plane zero which can be an issue in feedback control design, but is manageable with proper external component selection. Also note that the RHP zero is a minimum at minimum input voltage and maximum output current for a given output voltage. As a general rule, the frequency at which the open-loop gain of the converter is reduced to unity, known as the crossover frequency fC , should be set to less than one-sixth of the right-half plane zero (Z3), and under one-eighth of the switching frequency fSWITCH. Once fC is selected, the compensation component values can be calculated using a Bode plot of the power stage or two generally valid assumptions: P1 dominates the gain of the power stage for frequencies lower than fC and fC is much higher than P2. First calculate the power stage gain at fC, GfC in V/V. Assuming the output pole P1 dominates GfC for this range, it is expressed by: G fC GDC f 1+ C P1 2 V/V Hz VIN 2 * 2RL Hz 2 * VOUT 2 *L High Frequency Pole: P3 > fOSC Hz 3 3124f For more information www.linear.com/LTC3124 19 LTC3124 APPLICATIONS INFORMATION Decide how much phase margin (m) is desired. Greater phase margin can offer more stability while lower phase margin can yield faster transient response. Typically, m 60 is optimal for minimizing transient response time while allowing sufficient margin to account for component variability. 1 is the phase boost of Z1, P2, and P5 while 2 is the phase boost of Z4 and P4. Select 1 and 2 such that: 1 + 2 = m + tan- C and Z3 1 where VOUT is in V and C and Z3 are in kHz. Setting Z1, P5, Z4, and P4 such that C , P5 = C a1, Z4 = C , P4 = C a2 a1 a2 allows a1 and a2 to be determined using 1 and 2 + 90 + 90 a1 = tan2 1 , a2 = tan2 2 2 2 The compensation will force the converter gain GBOOST to unity at C by using the following expression for CC: CC = 103 * g ma * R2 * GC ( a1 - 1) a2 2 * C * (R1+ R2) a1 pF (gma in S, C in kHz, GC in V/V) Once CC is calculated, RC and CF are determined by: 106 * a1 RC = k (C in kHz, C C in pF) 2 * C * CC CF = RPL R1* R2 R1- a2 * R1+ R2 = k and a2 - 1 CPL = 106 ( a2 - 1) (R1+ R2) 2 * C * R12 a2 pF where R1, R2, and RPL are in k and C is in kHz. V 1 74 ; 2 2 * tan-1 OUT - 90 1.2V Z1= the transfer function of the converter. The values of these phase lead components are given by the expressions: CC a1 - 1 A method for improving the converter's transient response uses a small feedforward series network of a capacitor and a resistor across the top resistor of the feedback divider (from VOUT to FB). This adds a phase-lead zero and pole to Note that selecting 2 = 0 forces a2 = 1, and so the converter will have Type II compensation and therefore no feedforward: RPL is open (infinite impedance) and CPL = 0pF. If a2 = 0.833 * VOUT (its maximum), feedforward is maximized; RPL = 0 and CPL is maximized for this compensation method. Once the compensation values have been calculated, obtaining a converter bode plot is strongly recommended to verify calculations and adjust values as required. Using the circuit in Figure 8 as an example, Table 4 shows the parameters used to generate the Bode plot shown in Figure 9. Table 4. Bode Plot Parameters PARAMETER VIN VOUT RL COUT at No Bias COUT at 12V Bias RESR LA, LB fSWITCH R1 R2 gma RO gmp RC CC CF RPL CPL VALUE 5 12 8 22 x 2 14 x 2 2.5 4.7 1 1020 113 100 10 3.4 90 84.5 680 56 Open 0 UNITS V V F F COMMENT App Specific App Specific App Specific App Specific App Specific m H MHz k k S M S % App Specific App Specific Adjustable Adjustable Adjustable Fixed Fixed Fixed App Specific k pF pF k pF Adjustable Adjustable Adjustable Optional Optional 3124f 20 For more information www.linear.com/LTC3124 LTC3124 APPLICATIONS INFORMATION Switching Waveforms with 1.5A Load SWB LA 4.7H PGNDB CAP C1 100nF VOUTB VIN BURST PWM CIN 10F CVCC 4.7F VOUT 20mV/DIV AC-COUPLED SD VCC RT FB VC CC 680pF 200ns/DIV R2 113k RC 84.5k VOUT 500mV/DIV AC-COUPLED 3124 F08 OUTPUT CURRENT 500mA/DIV Figure 8. 1MHz, 5V to 12V, 1.5A Boost Converter 1500mA 700mA 700mA 100s/DIV 45 90 30 45 PHASE 0 GAIN 0 -45 -15 -90 -30 -135 1k 10k FREQUENCY (Hz) 100k 3124 F08c PHASE (DEG) 15 -45 100 3124 F08b Transient Response with 700mA to 1.5A Load Step CF 56pF C1: 100nF, 16V, X5R, 0805 CIN: 10F, 10V, X5R, 1206 COUT: 22F x2, 16V, X5R, 1210 CVCC: 4.7F, 10V, X5R, 1206 LA, LB: COILCRAFT XAL5030-472ME INDUCTOR A CURRENT 1A/DIV VSWA 10V/DIV R1 1.02M OFF ON INDUCTOR B CURRENT 1A/DIV VSWB 10V/DIV SGND PWM/SYNC RT 28k VOUT 12V 1.5A COUT 22F x2 SWA VOUTA LTC3124 PGNDA GAIN (dB) VIN 5V LB 4.7H -180 3124 F09 Figure 9. Bode Plot for Example Converter 3124f For more information www.linear.com/LTC3124 21 LTC3124 APPLICATIONS INFORMATION From Figure 9, the phase is ~60 when the gain reaches 0dB, so the phase margin of the converter is ~60. The crossover frequency is ~10kHz, which is more than six times lower than the 94kHz frequency of the RHP zero to achieve adequate phase margin. The circuit in Figure 10 shows the same application as that in Figure 8 with Type III compensation. This is accomplished by adding CPL and RPL and adjusting CC, CF, and RC accordingly. Table 5 shows the parameters used to generate the bode plot shown in Figure 11. From Figure 11, the phase margin is still optimized at ~60 and the crossover frequency remains ~10kHz. Adding CPL and RPL provides some feedforward signal in Burst Mode operation, leading to lower output voltage ripple. VIN 5V LB 4.7H SWB LA 4.7H CAP PGNDB C1 100nF VOUTB VOUTA SWA LTC3124 PGNDA VIN BURST PWM CIN 10F CVCC 4.7F RPL 787k CPL 12pF SGND PWM/SYNC SD VCC RT FB VC RT 28k CC 470pF VOUT 12V 1.5A COUT 22F x2 OFF ON R1 1.02M R2 113k RC 71.5k CF 120pF C1: 100nF, 16V, X5R, 0805 CIN: 10F, 10V, X5R, 1206 COUT: 22F x2, 16V, X5R, 1210 CVCC: 4.7F, 10V, X5R, 1206 LA, LB: COILCRAFT XAL5030-472ME 3124 F10 Figure 10. Boost Converter with Phase Lead Table 5. Bode Plot Parameters RC CC CF RPL CPL 22 x 2 14 x 2 2.5 4.7 1 113 1020 100 10 3.4 90 71.5 470 120 787 12 UNITS V V F F COMMENT App Specific App Specific App Specific App Specific App Specific m H MHz k k S M S % App Specific App Specific Adjustable Adjustable Adjustable Fixed Fixed Fixed App Specific k pF pF k pF Adjustable Adjustable Adjustable Adjustable Adjustable 90 45 45 30 PHASE 15 GAIN (dB) RESR LA, LB fSWITCH R1 R2 gma RO gmp VALUE 5 12 8 0 GAIN 0 -45 -15 -90 -30 -135 -45 100 1k 10k FREQUENCY (Hz) 100k PHASE (DEG) PARAMETER VIN VOUT RL COUT at No Bias COUT at 12V Bias -180 3124 F11 Figure 11. Bode Plot Showing Phase Lead 3124f 22 For more information www.linear.com/LTC3124 LTC3124 TYPICAL APPLICATIONS Single Li Cell to 6V, 9W, 2.2MHz Synchronous Boost Converter for RF Transmitter VOUT 500mV/DIV AC-COUPLED LB 2.2H VIN 2.7V TO 4.2V SWB LA 2.2H CAP PGNDB CIN 10F CVCC 4.7F C1 100nF VOUTB VOUT 6V 1.5A COUT 47F x2 VOUTA SWA LTC3124 PGNDA VIN Load Step 1.5A OUTPUT CURRENT 500mA/DIV SD VCC RT FB VC RT 11.5k 150mA VIN = 3.6V SGND PWM/SYNC 150mA 3124 TA02b R1 1.13M OFF ON RC 60.4k CC 1.2nF 100s/DIV Bode Plot R2 280k CF 68pF 50 120 40 90 30 GAIN (dB) 60 PHASE 20 3124 TA02a 10 30 0 GAIN 0 -30 -10 -60 PHASE (DEG) C1: 100nF, 16V, X5R, 0805 CIN: 10F, 10V, X5R, 1206 COUT: 47F x 2, 16V, X5R, 1210 CVCC: 4.7F, 10V, X5R, 1206 LA, LB: WURTH WE-PD 7447779002 -20 -90 -30 -120 -40 -150 -50 100 1k 10k FREQUENCY (Hz) -180 100k 3124 TA02c 2-Port USB-Powered 1MHz Synchronous Boost Converter to 5V, 500mA LB 3.3H VIN 4.3V TO 5.5V SWB LA 3.3H PGNDB CAP VOUTB VOUTA SWA LTC3124 PGNDA VIN C2 10F CIN 10F CVCC 4.7F SD VCC RT FB VC C1: 100nF, 16V, X5R, 0805 C2: KEMET T491C106K025AS CIN: 10F, 10V, X5R, 1206 COUT: 100F x 2, 6.3V, X5R, 1812 CVCC: 4.7F, 10V, X5R, 1206 LA, LB: COILCRAFT XAL5030-332ME VOUT 5V 500mA COUT 100F x2 R1 1.47M OFF ON RC 35.7k CC 2.7nF 2-Port USB 2.0 Hot Plugged VIN 2V/DIV SGND PWM/SYNC RT 28k C1 100nF R2 464k VOUT 2V/DIV INPUT CURRENT 500mA/DIV CF 270pF RLOAD = 10 2ms/DIV VIN = USB 2.0 2-PORT HOT PLUGGED 3124 TA03b 3124 TA03a 3124f For more information www.linear.com/LTC3124 23 LTC3124 TYPICAL APPLICATIONS 3.3V to 12V, 300kHz Synchronous Boost Converter with Output Disconnect, 1A Efficiency LB 22H SWB LA 22H CAP PGNDB VOUTB BURST PWM CVCC 4.7F SGND PWM/SYNC SD VCC RT FB VC R1 1.02M OFF ON RC 76.8k CC 3.9nF RT 100k 100 VOUT 12V 1A COUT 47F x3 VOUTA SWA LTC3124 PGNDA VIN CIN 10F C1 100nF CF 270pF C1: 100nF, 16V, X5R, 0805 CIN: 10F, 10V, X5R, 1206 COUT: 47F x 3, 16V, X5R, 1210 CVCC: 4.7F, 10V, X5R, 1206 LA, LB: WURTH WE-PDF 7447998221 90 Burst Mode OPERATION 80 EFFICIENCY (%) VIN 3.3V R2 113k 70 60 PWM 50 40 30 VCC DERIVED FROM VIN VCC DERIVED FROM VOUT 20 10 0 0.01 0.1 3124 TA04a 1 10 100 LOAD CURRENT (mA) 1000 3124 TA04b Single Li Cell to 5V, 1.8A Synchronized 1.2MHz Switching Boost Converter for RFPA Power Supply Efficiency LB 3.3H SWB LA 3.3H PGNDB CVCC 4.7F VOUTB VOUTA SWA LTC3124 PGNDA 2.4MHz SYNC PULSE CIN 10F CAP VIN COUT 22F x2 SD VCC RT FB VC CF 150pF C1: 100nF, 16V, X7R, 0805 CIN: 10F, 10V, X7R, 1206 COUT: 22F x 2, 16V, X7R, 1210 CVCC: 4.7F, 10V, X7R, 1206 LA, LB: COILCRAFT MSS7341T-332NL R1 1.47M OFF ON RC 31.6k CC 1.5nF 100 VOUT 5V 1.8A SGND PWM/SYNC RT 28.7k C1 100nF R2 464k 90 80 EFFICIENCY (%) VIN 2.7V TO 4.2V Burst Mode OPERATION 70 60 PWM 50 40 30 20 4.2VIN 3.3VIN 2.7VIN 10 0 0.01 3124 TA05a 0.1 1 10 100 LOAD CURRENT (mA) 1000 3124 TA05b 3124f 24 For more information www.linear.com/LTC3124 LTC3124 TYPICAL APPLICATIONS 1.8V to 5.5V Input to 15V Output, 500kHz Synchronous Boost Converter with Output Disconnect, 300mA Efficiency LB 10H SWB LA 10H PGNDB CAP C1 100nF VOUTB COUT 22F x2 VOUTA SWA LTC3124 PGNDA VIN CIN 10F CVCC 4.7F 100 VOUT 15V 300mA SGND PWM/SYNC SD VCC RT FB VC RT 57.6k R1 1.3M OFF ON RC 49.9k CC 3.3nF CF 100pF R2 113k C1: 100nF, 16V, X7R, 0805 CIN: 10F, 10V, X7R, 1206 COUT: 22F x 2, 16V, X7R, 1210 CVCC: 4.7F, 10V, X7R, 1206 LA, LB: WURTH WE-HCI 7443251000 OUTPUT CURRENT = 300mA 95 EFFICIENCY (%) VIN 1.8V TO 5.5V 90 85 80 75 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VIN (V) 3124 TA06a 3124 TA06b Single Li Cell to 12V, 1MHz Synchronous Boost Converter with Output Disconnect, 800mA LB 5.6H VIN 2.7V TO 4.2V SWB LA 5.6H PGNDB CAP VOUTB VOUTA SWA LTC3124 PGNDA VIN CIN 10F CVCC 4.7F C1 100nF VOUT 12V 800mA COUT 22F x2 SGND PWM/SYNC SD VCC RT FB VC RT 28k R1 1.02M OFF ON RC 88.7k CC 680pF C1: 100nF, 16V, X7R, 0805 CIN: 10F, 10V, X7R, 1206 COUT: 22F x 2, 16V, X7R, 1210 CVCC: 4.7F, 10V, X7R, 1206 LA, LB: COILCRAFT XAL5050-562ME CF 47pF R2 113k 3124 TA08 3124f For more information www.linear.com/LTC3124 25 LTC3124 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DHC Package 16-Lead Plastic DFN (5mm x 3mm) (Reference LTC DWG # 05-08-1706 Rev O) 0.65 0.05 3.50 0.05 1.65 0.05 2.20 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 4.40 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 5.00 0.10 (2 SIDES) R = 0.20 TYP 3.00 0.10 (2 SIDES) 9 R = 0.115 TYP 0.40 0.10 16 1.65 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) PIN 1 NOTCH 0.200 REF 0.75 0.05 0.00 - 0.05 8 1 0.25 0.05 0.50 BSC (DHC16) DFN 1103 4.40 0.10 (2 SIDES) BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3124f 26 For more information www.linear.com/LTC3124 LTC3124 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev J) Exposed Pad Variation BC 4.90 - 5.10* (.193 - .201) 3.58 (.141) 16 1514 13 12 11 6.60 0.10 4.50 0.10 0.48 (.019) REF 3.58 (.141) 2.94 (.116) 10 9 DETAIL B 6.40 2.94 (.252) (.116) BSC SEE NOTE 4 0.45 0.05 1.05 0.10 0.51 (.020) REF DETAIL B IS THE PART OF THE LEAD FRAME FEATURE FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 0.65 BSC 1 2 3 4 5 6 7 8 RECOMMENDED SOLDER PAD LAYOUT 4.30 - 4.50* (.169 - .177) 0.09 - 0.20 (.0035 - .0079) 0.50 - 0.75 (.020 - .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 0.25 REF 1.10 (.0433) MAX 0 - 8 0.65 (.0256) BSC 0.195 - 0.30 (.0077 - .0118) TYP 0.05 - 0.15 (.002 - .006) FE16 (BC) TSSOP REV J 1012 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 3124f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LTC3124 27 LTC3124 TYPICAL APPLICATION PWM Rundown Curve Dual Supercapacitor Backup Power Supply, 0.5V to 5.4V LB 3.3H VIN 0.5V TO 5.4V SWB LA 3.3H PGNDB C1 100nF VOUTB VIN + VOUT 5V COUT 100F x2 OUTPUT CURRENT 100mA/DIV R3 1M SD VCC FB RT VC RT 28k R1 1.47M OFF ON RC 59k CC 1.5nF C1: 100nF, 16V, X5R, 0805 CIN: 10F, 10V, X5R, 1206 COUT: 100F x 2, 6.3V, X5R, 1812 CVCC: 4.7F, 10V, X5R, 1206 LA, LB: COILCRAFT XAL5030-332ME SC1, SC2: TECATE POWERBURST TPL-100/22X45 SD 2V/DIV SUPPLY REMOVED FROM SUPERCAP VOUT 5V/DIV VIN SGND PWM/SYNC + CVCC 4.7F CAP VOUTA SWA LTC3124 PGNDA CIN 10F SC1 100F SC2 100F VIN 2V/DIV CF 47pF R2 464k 3124 TA07b Burst Mode Rundown Curve VIN 2V/DIV SD 2V/DIV 3124 TA07a 200s/DIV SUPPLY REMOVED FROM SUPERCAP VOUT 5V/DIV OUTPUT CURRENT 20mA/DIV 500s/DIV 3124 TA07c RELATED PARTS PART NUMBER LTC3459 LTC3528 LTC3539 LTC3421 LTC3428 LTC3425 LTC3122 LTC3112 LTC3114-1 LTC3115-1 DESCRIPTION 70mA ISW, 10V Micropower Synchronous Boost Converter with Output Disconnect, Burst Mode Operation 1A ISW, 1MHz, Synchronous Step-Up DC/DC Converter with Output Disconnect, Burst Mode Operation 2A ISW, 1MHz/2MHz, Synchronous Step-Up DC/DC Converters with Output Disconnect, Burst Mode Operation 3A ISW, 3MHz, Synchronous Step-Up DC/DC Converter with Output Disconnect 4A ISW, 2MHz (1MHz Switching), Dual Phase Step-Up DC/DC Converter 5A ISW, 8MHz, Low Ripple, 4-Phase Synchronous Step-Up DC/DC Converter with Output Disconnect 2.5A ISW, 3MHz, Synchronous Step-Up DC/DC Converter with Output Disconnect, Burst Mode Operation COMMENTS VIN: 1.5V to 5.5V, VOUT(MAX) = 10V, IQ = 10A, ISD < 1A, ThinSOT Package 94% Efficiency VIN: 700mV to 5.25V, VOUT(MAX) = 5.25V, IQ = 12A, ISD < 1A, 2mm x 3mm DFN Package 94% Efficiency VIN: 700mV to 5.25V, VOUT(MAX) = 5.25V, IQ = 10uA, ISD < 1A, 2mm x 3mm DFN Package 95% Efficiency VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12A, ISD < 1A, QFN24 Package 92% Efficiency VIN: 1.6V to 4.5V, VOUT(MAX) = 5.25V, ISD < 1A, 3mm x 3mm DFN Package 95% Efficiency VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12A, ISD < 1A, QFN32 95% Efficiency VIN: 1.8V to 5.5V [500mV After Start-Up], VOUT(MAX) = 15V, IQ = 25A, ISD < 1A, 3mm x 4mm DFN and MSOP Packages 15V, 2.5A, 750kHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency VIN: 2.7V to 15V, VOUT(MAX) = 14V, IQ = 50A, ISD < 1A, 4mm x 5mm DFN and TSSOP Packages with Output Disconnect, Burst Mode Operation 40V, 1A, 2MHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency VIN: 2.2V to 40V, VOUT(MAX) = 40V, IQ = 30A, ISD = 3A, 3mm x 5mm DFN and TSSOP Packages with Output Disconnect, Output Current Limit, Burst Mode Operation 40V, 2A, 2MHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency VIN: 2.7V to 40V, VOUT(MAX) = 40V, IQ = 30A, ISD = 3A, 4mm x 5mm DFN and TSSOP Packages with Output Disconnect, Burst Mode Operation 3124f 28 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC3124 (408) 432-1900 FAX: (408) 434-0507 www.linear.com/LTC3124 LT 0614 * PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2014