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TC9400
TC9401
TC9402
VOLTAGE-TO-FREQUENCY/FREQUENCY-TO-VOLTAGE CONVERTERS
FEATURES
Voltage-to-Frequency
■Choice of Guaranteed Linearity:
TC9401.........................................................0.01%
TC9400.........................................................0.05%
TC9402.........................................................0.25%
■DC to 100 kHz (F/V) or 1Hz to 100kHz (V/F)
■Low Power Dissipation .......................... 27mW Typ
■Single/Dual Supply Operation .................................
+ 8V to + 15V or ± 4V to ± 7.5V
■Gain Temperature Stability ..........± 25 ppm/°C Typ
■Programmable Scale Factor
Frequency-to-Voltage
■Operation........................................... DC to 100 kHz
■Choice of Guaranteed Linearity:
TC9401.........................................................0.02%
TC9400.........................................................0.05%
TC9402.........................................................0.25%
■Programmable Scale Factor
APPLICATIONS
■µP Data Acquisition
■13-Bit Analog-to-Digital Converters
■Analog Data Transmission and Recording
■Phase-Locked Loops
■Frequency Meters/Tachometer
■Motor Control
■FM Demodulation
GENERAL DESCRIPTION
The TC9400/TC9401/TC9402 are low-cost voltage-to-
frequency (V/F) converters utilizing low power CMOS
technology. The converters accept a variable analog input
signal and generate an output pulse train whose frequency
is linearly proportional to the input voltage.
The devices can also be used as highly-accurate fre-
quency-to-voltage (F/V) converters, accepting virtually any
input frequency waveform and providing a linearly-propor-
tional voltage output.
A complete V/F or F/V system only requires the addition
of two capacitors, three resistors, and reference voltage.
I
IN
I
REF
TC9400
R
IN
Integrator
OpAmp
Integrator
Capacitor Threshold
Detector One
Shot
Pulse Output
Pulse/2 Output
÷2
Input
Voltage
Reference
Capacitor
Reference
Voltage
ORDERING INFORMATION
Linearity Temperature
Part No. (V/F) Package Range
TC9400COD 0.05% 14-Pin 0°C to +70°C
SOIC (Narrow)
TC9400CPD 0.05% 14-Pin 0°C to +70°C
Plastic DIP
TC9400EJD 0.05% 14-Pin – 40°C to +85°C
CerDIP
TC9401CPD 0.01% 14-Pin 0°C to +70°C
Plastic DIP
TC9401EJD 0.01% 14-Pin – 40°C to +85°C
CerDIP
TC9402CPD 0.25% 14-Pin 0°C to +70°C
Plastic DIP
TC9402EJD 0.25% 14-Pin – 40°C to +85°C
CerDIP
FUNCTIONAL BLOCK DIAGRAM
TC9400/1/2-5 11/6/96
3-288 TELCOM SEMICONDUCTOR, INC.
ELECTRICAL CHARACTERISTICS: VDD = +5V, VSS = – 5V, VGND = 0V, VREF = – 5V, RBIAS = 100kΩ,
Full Scale = 10kHz, unless otherwise specified. TA = +25°C, unless temperature range is specified (– 40°C to +85°C
for E device, 0°C to +70°C for C device).
VOLTAGE-TO-FREQUENCY TC9401 TC9400 TC9402
Parameter Definition Min Typ Max Min Typ Max Min Typ Max Unit
Accuracy
Linearity 10 kHz Output Deviation From Straight — 0.004 0.01 — 0.01 0.05 — 0.05 0.25 % Full
Line Between Normalized Zero Scale
and Full-Scale Input
Linearity 100 kHz Output Deviation From Straight — 0.04 0.08 — 0.1 0.25 — 0.25 0.5 % Full
Line Between Normalized Zero Scale
Reading and Full-Scale Input
Gain Temperature Variation in Gain A Due to — ± 25 ± 40 — ± 25 ± 40 — ± 50 ± 10 0 ppm/°C
Drift (Note 1) Temperature Change Full Scale
Gain Variance Variation From Ideal Accuracy — ± 10 – — ± 10 — — ± 10 – % of
Nominal
Zero Offset (Note 2) Correction at Zero Adjust for Zero — ± 10 ± 50 — ± 10 ± 50 — ± 20 ± 100 mV
Output When Input is Zero
Zero Temperature Variation in Zero Offset Due to — ± 25 ± 50 — ± 25 ± 50 — ± 50 ± 100 µV/°C
Drift (Note 1) Temperature Change
Analog Input
IIN Full Scale Full-Scale Analog Input Current to — 10 — — 10 — 10 — µA
Achieve Specified Accuracy
IIN Overrange Overrange Current — — 50 — — 50 — — 50 µA
Response Time Settling Time to 0.1% Full Scale — 2 — — 2 — — 2 — Cycle
Digital Section
VSAT @ IOL = 10mA Logic "0" Output Voltage (Note 3) — 0.2 0.4 — 0.2 0.4 — 0.2 0.4 V
VOUT Max – VOUT Voltage Range Between Output — — 18 — — 18 — — 18 V
Common (Note 4) and Common
Pulse Frequency — 3 — — 3 — — 3 — µsec
Output Width
ABSOLUTE MAXIMUM RATINGS*
VDD – VSS ................................................................. +18V
IIN ...........................................................................10mA
VOUT Max –VOUT Common..........................................23V
VREF – VSS ..............................................................– 1.5V
Storage Temperature Range ................– 65°C to +150°C
Operating Temperature Range
C Device ................................................0°C to +70°C
E Device ...........................................– 40°C to +85°C
Package Dissipation (TA ≤ 70°C)
8-Pin CerDIP ..................................................800mW
8-Pin Plastic DIP.............................................730mW
8-Pin SOIC .....................................................470mW
Lead Temperature (Soldering, 10 sec) .................+300°C
*Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied.
Exposure to Absolute Maximum Rating Conditions for extended periods
may affect device reliability.
VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS
TC9400
TC9401
TC9402
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NOTES: 1. Full temperature range. Guaranteed, Not Tested.
2. IIN = 0.
3. Full temperature range, IOUT = 10mA.
4. IOUT = 10µA.
5. Threshold Detect = 5V, Amp Out = 0V, Full Temperature
Range
ELECTRICAL CHARACTERISTICS: (Cont.) VDD = +5V, VSS = – 5V, VGND = 0, VREF = – 5V, RBIAS = 100kΩ,
Full Scale = 10kHz, unless otherwise specified. TA = +25°C, unless temperature range is specified – 40°C to +85°C for
E device, 0°C to +70°C for C device.
FREQUENCY-TO-VOLTAGE TC9401 TC9400 TC9402
Parameter Definition Min Typ Max Min Typ Max Min Typ Max Unit
Supply Current
IDD Quiescent Current Required From Positive
(Note 5) Supply During Operation — 1.5 6 — 1.5 6 — 3 1 0 mA
ISS Quiescent Current Required From Negative
(Note 5) Supply During Operation — – 1.5 – 6 — – 1.5 – 6 – 3 – 10 mA
VDD Supply Operating Range of Positive Supply 4 — 7.5 4 — 7.5 4 — 7.5 V
VSS Supply Operating Range of Negative Supply – 4 — – 7.5 – 4 — – 7.5 – 4 — – 7.5 V
Reference Voltage
VREF –VSS Range of Voltage Reference Input – 2.5 — — – 2.5 — — – 2.5 — — V
Accuracy
Nonlinearity (Note 10) Deviation From Ideal Transfer — 0.01 0.02 — 0.02 0.05 — 0.05 0.25 % Full
Function as a Percentage Scale
Full-Scale Voltage
Input Frequency Frequency Range for Specified 10 — 100k 10 — 100k 10 — 100k Hz
Range (Note 7 and 8) Nonlinearity
Frequency Input
Positive Excursion Voltage Required to Turn 0.4 — VDD 0.4 — VDD 0.4 — VDD V
Threshold Detector On
Negative Excursion Voltage Required to Turn – 0.4 – 2 – 0.4 — – 2 – 0.4 — – 2 V
Threshold Detector Off
Minimum Positive Time Between Threshold — 5 — — 5 — — 5 — µsec
Pulse Width (Note 8) Crossings
Minimum Negative Time Between Threshold — 0.5 — — 0.5 — — 0.5 µsec
Pulse Width (Note 8) Crossings
Input Impedance — 10 — — 10 — — 10 — MΩ
Analog Outputs
Output Voltage Voltage Range of Op Amp Output —
V
DD
– 1
——
V
DD – 1
——
V
DD
– 1
—V
(Note 9) for Specified Nonlinearity
Output Loading Resistive Loading at Output of 2 — — 2 — — 2 — — kΩ
Op Amp
Supply Current
IDD Quiescent Current Required From Positive
(Note 10) Supply During Operation — 1.5 6 — 1.5 6 — 3 10 mA
ISS Quiescent Current Required From Negative
(Note 10) Supply During Operation — – 1.5 – 6 – 1.5 – 6 – 3 – 10 mA
VDD Supply Operating Range of Positive Supply 4 — 7.5 4 — 7.5 4 — 7.5 V
VSS Supply Operating Range of Negative Supply – 4 — – 7.5 – 4 — – 7.5 – 4 — – 7.5 V
Reference Voltage
VREF –VSS Range of Voltage Reference Input – 2.5 — — – 2.5 — — – 2.5 — — V
6. 10Hz to 100kHz.; Guaranteed, Not Tested
7. 5µsec minimum positive pulse width and 0.5 µsec minimum
negative pulse width.
8. tR = tF = 20 nsec.
9. RL ≥ 2kΩ.; Tested @ 10kΩ
10.Full temperature range, VIN = – 0.1V.
VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS TC9400
TC9401
TC9402
3-290 TELCOM SEMICONDUCTOR, INC.
Pin No. Symbol Description
1I
BIAS This pin sets bias current in the TC9400. Connect to VSS through a 100 kΩ resistor.
See text.
2 Zero Adj Low frequency adjustment input. See text.
3I
IN Input current connection for the V/F converter.
4V
SS Negative power supply voltage connection, typically – 5V.
5V
REFOUT Reference capacitor connection.
6 GND Analog ground.
7V
REF Voltage reference input, typically – 5V.
8 Pulse Freq Out Frequency output. This open drain output will pulse LOW each time the Freq
threshold detector limit is reached. The pulse rate is proportional to input voltage.
9 Output Common Source connection for the open drain output FETs. See text.
10 Freq/2 Out This open drain output is a square wave at one half the frequency of the pulse
output (pin 8). Output transitions of this pin occur on the rising edge of pin 8.
11 Threshold Detect Input to the threshold detector. This pin is the frequency input during F/V operation.
12 Amplifier Out Output of the integrator amplifier.
13 NC No internal connection
14 VDD Positive power supply connection, typically +5V.
PIN DESCRIPTIONS
PIN CONFIGURATIONS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VDD
NC
AMPLIFIER OUT
THRESHOLD DETECTOR
FREQ/2 OUT
OUTPUT COMMON
PULSE FREQ OUT
IBIAS
ZERO ADJ
IIN
VSS
VREF OUT
GND
VREF
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VDD
NC
AMPLIFIER OUT
THRESHOLD DETECTOR
FREQ/2 OUT
OUTPUT COMMON
PULSE FREQ OUT
IBIAS
ZERO ADJ
IIN
VSS
VREF OUT
GND
VREF
TC9400
TC9401
TC9402
TC9400
TC9401
TC9402
NC = NO INTERNAL CONNECTION
14-Pin Plastic DIP/CerDIP 14-Pin SOIC (Narrow)
VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS
TC9400
TC9401
TC9402
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Figure 1. 10 Hz to 10 kHz V/F Converter
–
+
+5V +5V
14
VDD
+5V
RL
10kΩ
RL
10kΩ
8
10
9
fOUT
fOUT/2
11 3µsec
DELAY
SELF-
START
12
5
20kΩ
60pF
OpAmp
CINT
820pF CREF
180pF 12pF
RIN
1MΩ
VIN
INPUT
+5V
–5V
50kΩ510kΩ
10kΩ
3
1
OFFSET
ADJUST
IIN
ZERO
ADJUST
0V –10V
IBIAS VSS
4
–5V
2
OUTPUT
COMMON
VREF OUT
RBIAS
100kΩ
AMP OUT
TC9400
TC9401
TC9402
GND
6
THRESHOLD
DETECTOR
THRESHOLD
DETECT
REFERENCE
VOLTAGE
(TYPICALLY –5V)
÷2
VREF
7
–3V
At the end of the charging period, CREF is shorted out.
This dissipates the charge stored on the reference capaci-
tor, so that when the output again crosses zero the system
is ready to recycle. In this manner, the continued discharg-
ing of the integrating capacitor by the input is balanced out
by fixed charges from the reference voltage. As the input
voltage is increased, the number of reference pulses re-
quired to maintain balance increases, which causes the
output frequency to also increase. Since each charge in-
crement is fixed, the increase in frequency with voltage is
linear. In addition, the accuracy of the output pulse width
does not directly affect the linearity of the V/F. The pulse
must simply be long enough for full charge transfer to take
place.
VOLTAGE-TO-FREQUENCY (V/F)
CIRCUIT DESCRIPTION
The TC9400 V/F converter operates on the principal
of charge balancing. The operation of the TC9400 is easily
understood by referring to Figure 1. The input voltage (VIN)
is converted to a current (IIN) by the input resistor. This
current is then converted to a charge on the integrating
capacitor and shows up as a linearly decreasing voltage at
the output of the op amp. The lower limit of the output
swing is set by the threshold detector, which causes the
reference voltage to be applied to the reference capacitor
for a time period long enough to charge the capacitor to
the reference voltage. This action reduces the charge on
the integrating capacitor by a fixed amount (q = CREF ×
VREF), causing the op amp output to step up a finite
amount.
VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS TC9400
TC9401
TC9402
3-292 TELCOM SEMICONDUCTOR, INC.
VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS
TC9400
TC9401
TC9402
PIN FUNCTIONS
Threshold Detector Input
In the V/F mode, this input is connected to the amplifier
output (pin 12) and triggers a 3 µsec pulse when the input
voltage passes through its threshold. In the F/V mode, the
input frequency is applied to this input.
The nominal threshold of the detector is halfway be-
tween the power supplies, or (VDD + VSS)/2 ±400mV. The
TC9400's charge balancing V/F technique is not dependent
on a precision comparator threshold, because the threshold
only sets the lower limit of the op-amp output. The op-amp's
peak-to-peak output swing, which determines the frequency,
is only influenced by external capacitors and by VREF.
Pulse Freq Out
This output is an open-drain N-channel FET which
provides a pulse waveform whose frequency is proportional
to the input voltage. This output requires a pull-up resistor
and interfaces directly with MOS, CMOS, and TTL logic.
Freq/2 Out
This output is an open-drain N-channel FET which
provides a square wave one-half the frequency of the pulse
frequency output. The Freq/2 output will change state on the
rising edge of Pulse Freq Out. This output requires a pull-
up resistor and interfaces directly with MOS, CMOS, and
TTL logic.
The TC9400 contains a "self-start" circuit to ensure the
V/F converter always operates properly when power is first
applied. In the event that, during power-on, the Op Amp
output is below the threshold and CREF is already charged,
a positive voltage step will not occur. The op-amp output will
continue to decrease until it crosses the –3.0V threshold of
the "self-start" comparator. When this happens, an internal
resistor is connected to the op-amp input, which forces the
output to go positive until the TC9400 is in its normal
operating mode.
The TC9400 utilizes low power CMOS processing for
low input bias and offset currents with very low power
dissipation. The open-drain N-channel output FETs provide
high voltage and high current sink capability.
VOLTAGE-TO-TIME MEASUREMENTS
The TC9400 output can be measured in the time do-
main as well as the frequency domain. Some microcom-
puters, for example, have extensive timing capability but
limited counter capability. Also, the response time of a time
domain measurement is only the period between two out-
put pulses, while the frequency measurement must accu-
mulate pulses during the entire counter timebase period.
Time measurements can be made from either the
TC9400's Pulse Freq Out output or from the Freq/2 output.
The Freq/2 output changes state on the rising edge of
Pulse Freq Out, so Freq/2 is a symmetrical square wave at
one half the pulse output frequency. Timing measurements
can therefore be made between successive Pulse Freq
Out pulses, or while Freq/2 is high (or low).
Figure 2 . Output Waveforms
3 µsec
TYP
1/f
fOUT
fOUT/2
AMP
OUT
VREF
0V
CREF
CINT
NOTES: 1. To adjust fMIN, set VIN = 10mV and adjust the 50kΩ offset for 10Hz output.
2. To adjust fMAX, set VIN = 10V and adjust RIN or VREF for 10 kHz output.
3. To increase fOUT MAX to 100kHz, change CREF to 2pF and CINT to 75pF.
4. For high-performance applications, use high-stability components for RIN, CREF, VREF (metal film
resistors and glass capacitors). Also, separate output ground (pin 9) from input ground (pin 6).
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VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS TC9400
TC9401
TC9402
Output Common
The sources of both the Freq/2 out and the Pulse Freq
Out are connected to this pin. An output level swing from the
drain voltage to ground or to the VSS supply may be obtained
by connecting this pin to the appropriate point.
RBIAS
An external resistor, connected to VSS, sets the bias
point for the TC9400. Specifications for the TC9400 are
based on RBIAS = 100kΩ ±10%, unless otherwise noted.
Increasing the maximum frequency of the TC9400
beyond 100kHz is limited by the pulse width of the Pulse
Output (typically 3µsec). Reducing RBIAS will decrease the
pulse width and increase the maximum operating frequency,
but linearity errors will also increase. RBIAS can be reduced
to 20kΩ, which will typically produce a maximum full scale
frequency of 500kHz.
Amplifier Out
The output stage of the operational amplifier. During
V/F operation, a negative-going ramp signal is available at
this pin. In the F/V mode, a voltage proportional to the
frequency input is generated.
Zero Adjust
This pin is the noninverting input of the operational
amplifier. The low-frequency set point is determined by
adjusting the voltage at this pin.
IIN
The inverting input of the operational amplifier and the
summing junction when connected in the V/F mode. An
input current of 10µA is specified, but an overrange current
up to 50µA can be used without detrimental effect to the
circuit operation. IIN connects the summing junction of an
operational amplifier. Voltage sources cannot be attached
directly, but must be buffered by external resistors.
VREF
A reference voltage from either a precision source or the
VSS supply is applied to this pin. Accuracy of the TC9400 is
dependent on the voltage regulation and temperature char-
acteristics of the reference circuitry.
Since the TC9400 is a charge balancing V/F converter,
the reference current will be equal to the input current. For
this reason, the DC impedance of the reference voltage
source must be kept low enough to prevent linearity errors.
For linearity of 0.01%, a reference impedance of 200Ω or
less is recommended. A 0.1µF bypass capacitor should be
connected from VREF to ground.
VREF Out
The charging current for CREF is supplied through this
pin. When the op amp output reaches the threshold level,
this pin is internally connected to the reference voltage and
a charge, equal to VREF x CREF, is removed from the
integrator capacitor. After about 3 µsec, this pin is internally
connected to the summing junction of the op amp to dis-
charge CREF. Break-before-make switching ensures that
the reference voltage is not directly applied to the summing
junction.
V/F CONVERTER DESIGN INFORMATION
Input/Output Relationships
The output frequency (fOUT) is related to the analog input
voltage (VIN) by the transfer equation:
Frequency out = ×
External Component Selection
RIN The value of this component is chosen to give a full-
scale input current of approximately 10µA:
RIN ≅ .
Example:
Note that the value is an approximation and the exact
relationship is defined by the transfer equation. In practice,
the value of RIN typically would be trimmed to obtain full-
scale frequency at VIN full scale (see "Adjustment Proce-
dure"). Metal film resistors with 1% tolerance or better are
recommended for high-accuracy applications because of
their thermal stability and low-noise generation.
CINTThe exact value is not critical but is related to CREF by
the relationship:
3CREF ≤ CINT ≤ 10 CREF.
Improved stability and linearity are obtained when
CINT ≤ 4CREF. Low-leakage types are recommended,
although mica and ceramic devices can be used in applica-
tions where their temperature limits are not exceeded.
Locate as close as possible to pins 12 and 13.
VIN
RIN
1
(VREF) (CREF)
VIN Full Scale
10µA
RIN ≅ = 1MΩ.
10V
10µA
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VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS
TC9400
TC9401
TC9402
CREF
The exact value is not critical and may be used to trim the
full-scale frequency (see "Input/Output Relationships"). Glass
film or air trimmer capacitors are recommended because of
their stability and low leakage. Locate as close as possible
to pins 5 and 3.
VDD, VSS
Power supplies of ±5V are recommended. For high-
accuracy requirements, 0.05% line and load regulation and
0.1µF disc decoupling capacitors located near the pins are
recommended.
Adjustment Procedure
Figure 1 shows a circuit for trimming the zero location.
Full scale may be trimmed by adjusting RIN, VREF, or CREF.
Recommended procedure for a 10kHz full-scale frequency
is as follows:
(1) Set VIN to 10 mV and trim the zero adjust circuit to
obtain a 10Hz output frequency.
(2) Set VIN to 10V and trim either RIN, VREF, or CREF to
obtain a 10kHz output frequency.
If adjustments are performed in this order, there should be
no interaction and they should not have to be repeated.
Figure 3. Recommended CREF vs VREF
500
400
300
200
100
0 –1
–2 –3 –4 –5 –6 –7
VREF (V)
CREF (pF) +12pF
1 kHz
100kHz
VDD = +5V
VSS = – 5V
RIN = 1MΩ
VIN = +10V
TA = +25°C
Improved Single Supply V/F Converter
Operation
A TC9400 which operates from a single 12 to 15V
variable power source is shown in Figure 5. This circuit uses
two Zener diodes to set stable biasing levels for the TC9400.
The Zener diodes also provide the reference voltage, so the
output impedance and temperature coefficient of the Zeners
will directly affect power supply rejection and temperature
performance.
Full scale adjustment is accomplished by trimming the
input current. Trimming the reference voltage is not recom-
mended for high accuracy applications unless an op amp is
used as a buffer, because the TC9400 requires a low
impedance reference (see the VREF pin description section
for more information).
The circuit of Figure 5 will directly interface with CMOS
logic operating at 12V to 15V. TTL or 5V CMOS logic can be
accommodated by connecting the output pullup resistors to
the +5V supply. An optoisolator can also be used if an
isolated output is required.
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VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS TC9400
TC9401
TC9402
V+ = 8V TO 15V (FIXED)
14
8
10kΩ
10kΩ
fOUT
fOUT/2
10
149
100 kΩ
0V–10V IIN
180
pF
820
pF 3
5
12
11
7
0.01
µF
2
kΩ
8.2
kΩ
6
2
V2
R2
0.9
R1
0.2
R1
RIN
1MΩIIN
VREF
TC9400
OFFSET
ADJUST
GAIN
ADJUST
V+
10V
12V
15V
1 MΩ
1.4 MΩ
2 MΩ
R1R2
10kΩ
14kΩ
20kΩ
fOUT = IIN × 1
(V2–V7) (CREF)
(VIN–V2) (V+–V2)
+
IIN
=RIN (0.9 R1+0.2 R1)
5V
0.01
µF
VIN
Figure 4 . Fixed Voltage — Single Supply Operation
Figure 5. Voltage to Frequency
R1
910k R4
100k
1µF
D2
5.1VZ
R2
910k R5
91k
Rp
OFFSET
20k
100k
D1
5.1VZ 0.1µ
100k
CREF
CINT
1.2k* +12 to +15V
10k 10k
OUTPUT
FREQUENCY
DIGITAL
GROUND
ANALOG GROUND
INPUT
VOLTAGE
(0 to 10V)
R3
GAIN TC9400
11
12
5
3
2
6
7
1
4
14
9
10
8
THRESHOLD
DETECT
AMP OUT
CREF
IIN
ZERO
ADJUST
GND
VREF
IBIAS
OUTPUT
COMMON
fOUT/2
fOUT
VDD
VSS
COMPONENT SELECTION
F/S FREQ.
1 kHz
10 kHz
100 kHz
CREF
2200pF
180pF
27pF
CINT
4700pF
470pF
75pF
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FREQUENCY-TO-VOLTAGE (F/V)
CIRCUIT DESCRIPTION
When used as an F/V converter, the TC9400 generates
an output voltage linearly proportional to the input frequency
waveform.
Each zero crossing at the threshold detector's input
causes a precise amount of charge (q = CREF × VREF) to be
dispensed into the op amp's summing junction. This charge
in turn flows through the feedback resistor, generating
voltage pulses at the output of the op amp. A capacitor (CINT)
across RINT averages these pulses into a DC voltage which
is linearly proportional to the input frequency.
F/V CONVERTER DESIGN INFORMATION
Input/Output Relationships
The output voltage is related to the input frequency (fIN)
by the transfer equation:
VOUT = [VREF CREF RINT] fIN.
The response time to a change in fIN is equal to (RINT
CINT). The amount of ripple on VOUT is inversely proportional
to CINT and the input frequency.
CINT can be increased to lower the ripple. Values of 1µF
to 100µF are perfectly acceptable for low frequencies.
When the TC9400 is used in the single-supply mode,
VREF is defined as the voltage difference between pin 7 and
pin 2.
+5V
14
64
+5V
–5V
VDD
1.0M
11
33k
IN914
VSS
DET
TC9400
0.01µF
Frequency
Input
0V
GND
+8V to +5V
14
10k
4
+5V
VDD
1.0M
11
33k
IN914
VSS
DET
TC9400
0.01µF
Frequency
Input
0V
0.1µF10k
(B) Single Supply
(A) ±5V Supply
Figure 6. Frequency Input Level Shifter
Input Voltage Levels
The input frequency is applied to the Threshold Detector
input (Pin 11). As discussed in the V/F circuit section of this
data sheet, the threshold of pin 11 is approximately (VDD +
VSS) /2 ±400mV. Pin 11's input voltage range extends from
VDD to about 2.5 V below the threshold. If the voltage on pin
11 goes more than 2.5 volts below the threshold, the V/F
mode startup comparator will turn on and corrupt the output
voltage. The Threshold Detector input has about 200 mV of
hysteresis.
In ±5 V applications, the input voltage levels for the
TC9400 are ±400mV, minimum. If the frequency source
being measured is unipolar, such as TTL or CMOS operat-
ing from a +5V source, then an AC coupled level shifter
should be used. One such circuit is shown in Figure 6a.
The level shifter circuit in Figure 6b can be used in single
supply F/V applications. The resistor divider ensures that
the input threshold will track the supply voltages. The diode
clamp prevents the input from going far enough in the
negative direction to turn on the startup comparator. The
diode's forward voltage decreases by 2.1 mV/°C, so for high
ambient temperature operation two diodes in series are
recommended.
VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS
TC9400
TC9401
TC9402
3-297
TELCOM SEMICONDUCTOR, INC.
7
6
5
4
3
1
2
8
0.5µsec
MIN 5.0µsec
MIN
DELAY = 3µsec
INPUT
fOUT
fOUT/2
Figure 7. DC — 10 kHz F/V Converter
TC9400A
TC9401A
TC9402A
+5V
14
VDD
V+
V+
fOUT/2
fOUT
OUTPUT
COMMON
10
9
8
5
3
12
12pF CREF
56 pF SEE
EQUATION,
PAGE 12
CINT
1000pF
RINT
1 MΩ
60pF AMP
OUT VO
VSS
IBIAS
14
10 kΩ
2.2kΩ
100kΩ
2 kΩ
–5V
+5V
ZERO ADJUST
2
7
(
TYPICALLY –5V
)
VREF
fIN 11
THRESHOLD
DETECTOR
3 µsec
DELAY
*
*
*
* OPTIONAL
IF BUFFER
IS NEEDED
OFFSET
ADJUST
VREF
OUT
IIN
42
–
+
OP
AMP
+
VREF
SEE
FIGURE
6
6
GND
THRESHOLD
DETECT
Figure 8 . F/V Digital Outputs
Input Buffer
fOUT and fOUT/2 are not used in the F/V mode. However,
these outputs may be useful for some applications, such as
a buffer to feed additional circuitry. Then, fOUT will follow the
input frequency waveform, except that fOUT will go high
3µsec after fIN goes high; fOUT/2 will be squarewave with a
frequency of one-half fOUT.
If these outputs are not used, pins 8, 9 and 10 should be
connected to ground.
VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS TC9400
TC9401
TC9402
3-298 TELCOM SEMICONDUCTOR, INC.
VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS
TC9400
TC9401
TC9402
Figure 10. Ripple Filter
Offset
Adjust
10k
.01µF
6.2V
IN914
33k
100k 500k
0.1µF
100k
V+ = 10V to 15V
1M
47pF
V
OUT
Frequency
Input
TC9400
6
10k
2
11
1.0M 4
14
12
3
5
GND
V
REF
OUT
I
IN
ZERO
ADJUST
V
REF
I
BIAS
AMP OUT
V
DD
V
SS
GND 6
7
1.0k
V+
1.0k
0.01µF
.001µF
DET
Note: The output is referenced to pin 6, which is at 6.2V (Vz). For frequency meter applications,
a 1 mA meter with a series-scaling resistor can be placed across pins 6 and 12.
1M
47pF
V
OUT
TC9400
12
3
5
V
REF
OUT
I
IN
GND
AMP OUT
6
.001µF
+
–
1M 3
2
.01µF1M 0.1µF
+5
76
4–5
TL071
200
Output Filtering
The output of the TC9400 has a sawtooth ripple super-
imposed on a DC level. The ripple will be rejected if the
TC9400 output is converted to a digital value by an integrat-
ing analog to digital converter, such as the TC7107 or
TC7109. The ripple can also be reduced by increasing the
value of the integrating capacitor, although this will reduce
the response time of the F/V converter.
The sawtooth ripple on the output of an F/V can be
eliminated without affecting the F/V's response time by
using the circuit in Figure 10. The circuit is a capacitance
multiplier, where the output coupling capacitor is multiplied
by the AC gain of the op amp. A moderately fast op amp,
such as the TL071, should be used.
Figure 9. F/V Single Supply F/V Converter
3-299
TELCOM SEMICONDUCTOR, INC.
7
6
5
4
3
1
2
8
VOLTAGE-TO-FREQUENCY/
FREQUENCY-TO-VOLTAGE CONVERTERS TC9400
TC9401
TC9402
In some cases, however, the TC9400 output must be
zero at power-on without a frequency input. In such cases,
a capacitor connected from pin 11 to VDD will usually be
sufficient to pulse the TC9400 and provide a power-on reset
(see Figure 11A). Where predictable power-on operation is
critical, a more complicated circuit, such as Figure 11B, may
be required.
VDD
14
11
1000pF
THRESHOLD
DETECTOR
1kΩ
fIN
VDD
100kΩ
1µF
3
4
8
6
fIN
12516
VCC B R C
Q
VSS
A
CLRA
CD4538
(A)
(B)
TC9400
To TC 9400
Figure 11. Power-On Operation/Reset
F/V POWER-ON RESET
In F/V mode, the TC9400 output voltage will occasion-
ally be at its maximum value when power is first applied. This
condition remains until the first pulse is applied to fIN. In most
frequency-measurement applications this is not a problem,
because proper operation begins as soon as the frequency
input is applied.
