1. Product profile
1.1 General description
PNP low VCEsat Breakthrough in Small Signal (BISS) transistor in a SOT416 (SC-75) SMD
plastic package.
NPN complement: PBSS2540E.
1.2 Features
Low collector-emitter saturation voltage VCEsat
High collector current capability: IC and ICM
High collector current gain (hFE) at high IC
High efficiency due to less heat generation
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
DC-to-DC conversion
MOSFET gate driving
Motor control
Charging circuits
Low power switches (e.g. motors, fans)
1.4 Quick reference data
[1] Pulse test: tp ≤ 300 μs; δ ≤ 0.02.
PBSS3540E
40 V, 500 mA PNP low VCEsat (BISS) transistor
Rev. 02 — 11 December 2009 Product data sheet
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCEO collector-emitter voltage open base - - −40 V
ICcollector current (DC) - - −500 mA
ICM peak collector current - - −1A
RCEsat collector-emitter
saturation resistance IC=−500 mA;
IB=−50 mA [1] - 440 700 mΩ
PBSS3540E_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 11 December 2009 2 of 11
NXP Semiconductors PBSS3540E
40 V, 500 mA PNP low VCEsat (BISS) transistor
2. Pinning information
3. Ordering information
4. Marking
Table 2. Pinning
Pin Description Simplified outline Symbol
1base
2emitter
3 collector
12
3
sym01
3
3
2
1
Table 3. Ordering information
Type number Package
Name Description Version
PBSS3540E SC-75 plastic surface mounted package; 3 leads SOT416
Table 4. Marking codes
Type number Marking code
PBSS3540E 1T
PBSS3540E_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 11 December 2009 3 of 11
NXP Semiconductors PBSS3540E
40 V, 500 mA PNP low VCEsat (BISS) transistor
5. Limiting values
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCBO collector-base voltage open emitter - −40 V
VCEO collector-emitter voltage open base - −40 V
VEBO emitter-base voltage open collector - −6V
ICcollector current (DC) - −500 mA
ICM peak collector current - −1A
IBM peak base current - −100 mA
Ptot total power dissipation Tamb ≤ 25 °C [1] -150mW
[2] -250mW
Tjjunction temperature - 150 °C
Tamb ambient temperature −65 +150 °C
Tstg storage temperature −65 +150 °C
(1) FR4 PCB, mounting pad for collector 1 cm2
(2) FR4 PCB, standard footprint
Fig 1. Power derating curves
T
amb
(°C)
0 16012040 80
006aaa412
100
200
300
P
tot
(mW)
0
(1)
(2)
PBSS3540E_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 11 December 2009 4 of 11
NXP Semiconductors PBSS3540E
40 V, 500 mA PNP low VCEsat (BISS) transistor
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-a) thermal resistance from
junction to ambient in free air [1] --833K/W
[2] --500K/W
FR4 PCB, mounting pad for collector 1 cm2
Fig 2. Transient thermal impedance from junction to ambient as a func tion of pulse time; typical values
006aaa413
10−51010−2
10−4102
10−1
tp (s)
10−3103
1
102
10
103
1
0.1
0.05
0.02
0.01
0
Zth(j-a)
(K/W)
1
duty cycle =
0.75
0.5
0.33
0.2
PBSS3540E_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 11 December 2009 5 of 11
NXP Semiconductors PBSS3540E
40 V, 500 mA PNP low VCEsat (BISS) transistor
7. Characteristics
[1] Pulse test: tp ≤ 300 μs; δ ≤ 0.02.
Table 7. Characteristics
Tamb = 25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
ICBO collector-base cut-off
current VCB =−40 V; IE=0A - - −100 nA
VCB =−40 V; IE=0A;
Tj= 150 °C--−50 μA
IEBO emitter-base cut-off
current VEB =−5V; I
C=0A - - −100 nA
hFE DC current gain VCE =−2V; I
C=−10 mA 200 - -
VCE =−2V; I
C=−100 mA [1] 150 - -
VCE =−2V; I
C=−500 mA [1] 40 - -
VCEsat collector-emitter
saturation voltage IC=−10 mA; IB=−0.5 mA - - −50 mV
IC=−100 mA; IB=−5mA - - −130 mV
IC=−200 mA; IB=−10 mA - - −200 mV
IC=−500 mA; IB=−50 mA [1] --−350 mV
RCEsat collector-emitter
saturation resistance IC=−500 mA; IB=−50 mA [1] - 440 700 mΩ
VBEsat base-emitter
saturation voltage IC=−500 mA; IB=−50 mA [1] --−1.2 V
VBEon base-emitter turn-on
voltage VCE =−2V; I
C=−100 mA - - −1.1 V
fTtransition frequency VCE =−5V; I
C=−100 mA;
f=100MHz 100 300 - MHz
Cccollector capacit ance VCB =−10 V; IE=i
e=0A;
f=1MHz --10pF
PBSS3540E_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 11 December 2009 6 of 11
NXP Semiconductors PBSS3540E
40 V, 500 mA PNP low VCEsat (BISS) transistor
VCE = −2V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
VCE =−2V
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig 3. DC current gain as a function of collector
current; typical values Fig 4. Base-emitter volt age as a function of collector
current; typical values
IC/IB =20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Tamb = 25 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
Fig 5. Collector-emitter saturation voltage as a
function of collector current; typical values Fig 6. Collec tor-emitter saturation voltage as a
function of collector current; typical values
006aaa388
200
400
600
hFE
0
IC (mA)
−10−1−103
−102
−1−10
(1)
(2)
(3)
006aaa389
−0.5
−0.7
−0.3
−0.9
−1.1
VBE
(V)
− 0.1
IC (mA)
−10−1−103
−102
−1−10
(1)
(2)
(3)
006aaa390
IC (mA)
−10−1−103
−102
−1−10
−10−1
−1
VCEsat
(V)
−10−2
(1)
(2)
(3)
006aaa391
IC (mA)
−10−1−103
−102
−1−10
−10−1
−1
VCEsat
(V)
−10−2
(1)
(2)
(3)
PBSS3540E_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 11 December 2009 7 of 11
NXP Semiconductors PBSS3540E
40 V, 500 mA PNP low VCEsat (BISS) transistor
IC/IB =20
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig 7. Base-emitter saturation vo ltage as a function
of collector current; typical values Fig 8. Collector-emitte r saturation resistance as a
function of collector current; typical values
Tamb = 25 °CT
amb = 25 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
Fig 9. Collector current as a fun ction of
collector -em itter voltage; ty pic a l va lues Fig 10. Collector-emitter satur ation resistance as a
function of collector current; typical values
006aaa392
−0.5
−0.7
−0.3
−0.9
−1.1
VBEsat
(V)
−0.1
IC (mA)
−10−1−103
−102
−1−10
(1)
(2)
(3)
006aaa393
IC (mA)
−10−1−103
−102
−1−10
1
10
102
103
RCEsat
(Ω)
10−1
(1)
(2)
(3)
VCE (V)
0−5−4−2−3−1
006aaa394
−0.4
−0.6
−0.2
−0.8
−1
IC
(A)
0
IB (mA) = −30
−3
−6
−9
−12
−15
−27
−24
−21
−18
006aaa395
IC (mA)
−10−1−103
−102
−1−10
1
10
102
103
RCEsat
(Ω)
10−1
(1)
(2)
(3)
PBSS3540E_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 11 December 2009 8 of 11
NXP Semiconductors PBSS3540E
40 V, 500 mA PNP low VCEsat (BISS) transistor
8. Package outline
9. Packing information
[1] For further information and the availability of packing methods, see Section 13.
10. Soldering
Fig 11. Package outline SOT416 (SC-75)
04-11-04Dimensions in mm
0.95
0.60
1.8
1.4
1.75
1.45
0.9
0.7
0.25
0.10
1
0.30
0.15
12
30.45
0.15
Table 8. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number Package Description Packing quantity
3000 10000
PBSS3540E SOT416 4 mm pitch, 8 mm tape and reel -115 -135
Reflow soldering is the only recommended soldering method.
Fig 12. Reflow soldering foo tprin t
solder resist occupied area
solder lands solder pasteDimensions in mm
msa438
2.0
0.6
(3x)
0.7
1.5
1
2
3
1.1
2.2
0.5
(3x)
0.85
0.6
1.9
PBSS3540E_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 11 December 2009 9 of 11
NXP Semiconductors PBSS3540E
40 V, 500 mA PNP low VCEsat (BISS) transistor
11. Revision history
Table 9. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PBSS3540E_2 20091211 Product data sheet - PBSS3540E_1
Modifications: •This data sheet was changed to reflec t the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
•Figure 4 “Base-emitter voltage as a function of collector current; typical va lues”: updated
•Figure 12 “Reflow soldering footprint”: updated
PBSS3540E_1 20050503 Product data sheet - -
PBSS3540E_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 11 December 2009 10 of 11
NXP Semiconductors PBSS3540E
40 V, 500 mA PNP low VCEsat (BISS) transistor
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warrant ies as to t he accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short dat a sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
12.3 Disclaimers
General — In formation in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give an y represent ations or
warranties, expressed or impli ed, as to the accuracy or completeness of such
information and shall have no liability for th e co nsequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descripti ons, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for il lustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ra tings System of IEC 60134) may cause permane nt
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other co nditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may af fect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between inf ormation in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Not hing in this document may be interpret ed or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulatio ns. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
12.4 Trademarks
Notice: All refe renced brands, produc t names, service names and trademarks
are the property of their respective ow ners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specificat ion.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PBSS3540E
40 V, 500 mA PNP low VCEsat (BISS) transistor
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 11 December 2009
Document identifier: PBSS3 540E_2
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
9 Packing information . . . . . . . . . . . . . . . . . . . . . 8
10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Contact information. . . . . . . . . . . . . . . . . . . . . 10
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
