LTM8031
1
8031fb
Typical applicaTion
DescripTion
Ultralow Noise EMC 36V, 1A
DC/DC µModule Regulator
The LTM
®
8031 is an electromagnetic compatible (EMC)
36V, 1A DC/DC µModule
®
buck converter designed to
meet the radiated emissions requirements of EN55022.
Conducted emission requirements can be met by adding
standard filter components. Included in the package are the
switching controller, power switches, inductor, filters and
all support components. Operating over an input voltage
range of 3.6V to 36V, the LTM8031 supports an output
voltage range of 0.8V to 10V, and a switching frequency
range of 200kHz to 2.4MHz, each set by a single resistor.
Only the bulk input and output filter capacitors are needed
to finish the design. The low profile package (2.82mm)
enables utilization of unused space on the bottom of PC
boards for high density point of load regulation.
The LTM8031 is packaged in a thermally enhanced, compact
(9mm ×15mm) and low profile (2.82mm) overmolded land
grid array (LGA) package suitable for automated assembly
by standard surface mount equipment. The LTM8031 is
RoHS compliant.
Ultralow Noise 5V/1A DC/DC µModule Regulator
FeaTures
applicaTions
n Complete Step-Down Switch Mode Power Supply
n Wide Input Voltage Range: 3.6V to 36V
n 1A Output Current
n 0.8V to 10V Output Voltage
n Switching Frequency from 200kHz to 2.4MHz
n EN55022 Class B Compliant with Margin
n Current Mode Control
n (e4) RoHS Compliant Package with Gold Pad Finish
n Programmable Soft-Start
n Pin Compatible with the LTM8032
n Low Profile (9mm × 15mm × 2.82mm)
Surface Mount LGA Package
n Automotive Battery Regulation
n Power for Portable Products
n Distributed Supply Regulation
n Industrial Supplies
n Wall Transformer Regulation
LTM8031 EMI Performance
L, LT, LTC, LTM, µModule, Burst Mode, Linear Technology and the Linear logo are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
RT
SHARE
47.5k44.2k
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
VIN
FIN
F
10µF
VOUT
5V
1A
RUN/SS
VIN*
7VDC TO 36VDC
PGOOD
BIAS
LTM8031
AUX
OUT
SYNC GND
8031 TA01a
ADJ
FREQUENCY (MHz)
0
EMISSIONS LEVEL (dBµV/m)
50
70
800
8031 TA01b
30
EN55022
CLASS B
LIMIT
10
40
60
80
20
0
–10 200100 400300 600 700 900
500 1000
VIN = 36V
LTM8031
2
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VIN, FIN, RUN/SS Voltage ..........................................40V
ADJ, RT, SHARE Voltage .............................................5V
VOUT, AUX .................................................................10V
Current from AUX ................................................100mA
PGOOD, SYNC ..........................................................30V
BIAS .......................................................................... 25V
VIN + BIAS ................................................................. 56V
Maximum Junction Temperature (Note 2)............. 125°C
Solder Temperature (Note 3) ................................. 245°C
(Note 1)
GND
1
A
B
C
BANK 1
BANK 2
BANK 3
D
E
F
G
H
J
K
L
234
TOP VIEW
LGA PACKAGE
71-LEAD (9mm × 15mm × 2.82mm)
567
VOUT
VIN
RT
SHARE
ADJ
PGOOD
SYNCRUN/SS
FIN
BIAS AUX
TJMAX = 125°C, θJA = 20.7°C/W, θJC(BOTTOM) = 8.4°C/W,
θJC(TOP) = 25.6°C/W, θJBOARD = 13.8°C/W
θ VALUES DETERMINED PER JESD 51-9
WEIGHT = 1.2g
pin conFiguraTionabsoluTe MaxiMuM raTings
LEAD FREE FINISH TRAY PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTM8031EV#PBF LTM8031EV#PBF LTM8031V 71-Lead (9mm × 15mm × 2.82mm) LGA –40°C to 125°C
LTM8031IV#PBF LTM8031IV#PBF LTM8031V 71-Lead (9mm × 15mm × 2.82mm) LGA –40°C to 125°C
LTM8031MPV#PBF LTM8031MPV#PBF LTM8031V 71-Lead (9mm × 15mm × 2.82mm) LGA –55°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
orDer inForMaTion
LTM8031
3
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elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM8031E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the –40°C to 125°C
internal temperature range are assured by design, characterization and
correlation with statistical process controls. The LTM8031I is guaranteed
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, VRUN/SS = 10V, VBIAS = 3V, unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Input DC Voltage l3.6 36 V
VOUT Output DC Voltage 0.2A < IOUT ≤ 1A, RADJ Open
0.2A < IOUT ≤ 1A, RADJ = 21.6k
0.8
10
V
V
IOUT Continuous Output DC Current VIN = 24V 1 A
IQ(VIN) VIN Quiescent Current VRUN/SS = 0.2V
VBIAS = 3V, Not Switching
VBIAS = 0V, Not Switching
l
0.6
25
88
60
120
µA
µA
µA
IQ(BIAS) BIAS Quiescent Current VRUN/SS = 0.2V
VBIAS = 3V, Not Switching
VBIAS = 0V, Not Switching
l
0.03
60
1
120
5
µA
µA
µA
VOUT
VOUT
Line Regulation 10V ≤ VIN ≤ 36V, IOUT = 1A, VOUT = 3.3V 0.1 %
Load Regulation VIN = 24V, 0.2A ≤ IOUT ≤ 1A, VOUT = 3.3V 0.3 %
VOUT(AC_RMS) Output Ripple (RMS) VIN = 24V, IOUT = 1A, VOUT = 3.3V 6 mV
fSW Switching Frequency RT = 113k 325 kHz
VADJ Voltage at ADJ Pin l765 790 815 mV
VBIAS(MIN) Minimum BIAS Voltage for Proper Operation 1.9 2.8 V
IADJ Current Out of ADJ Pin VRUN/SS = 0V, VADJ = 0V, VOUT = 1V 4 µA
IRUN/SS RUN/SS Pin Current VRUN/SS = 2.5V 5 10 µA
VIH(RUN/SS) RUN/SS Input High Voltage 2.5 V
VIL(RUN/SS) RUN/SS Input Low Voltage 0.2 V
VPG(TH) ADJ Voltage Threshold for PGOOD to Switch 730 mV
IPGO PGOOD Leakage VPG = 30V 0.1 1 µA
IPGSINK PGOOD Sink Current VPG = 0.4V 200 800 µA
VSYNCIL SYNC Input Low Threshold fSYNC = 550kHz 0.5 V
VSYNCIH SYNC Input High Threshold fSYNC = 550kHz 0.7 V
ISYNC(BIAS) SYNC Pin Bias Current VSYNC = 0V, VBIAS = 0V 0.1 µA
VIN(RIPPLE) 550kHz Narrowband Conducted Emission
1MHz Narrowband Conducted Emission
3MHz Narrowband Conducted Emission
VIN = 24V, VOUT = 3.3V, IOUT = 1A, fSW = 550kHz,
5µH LISN
83
63
51
dBµV
dBµV
dBµV
to meet specifications over the full –40°C to 125°C internal operating
temperature range. The LTM8031MP is guaranteed to meet specifications
over the full –55°C to 125°C internal operating temperature range. Note
that the maximum internal temperature is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 3: See Linear Technology Application Note 100.
LTM8031
4
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Typical perForMance characTerisTics
Input Current vs Output Current,
3.3VOUT
Input Current vs Output Current,
5VOUT
Input Current vs Output Current,
8VOUT
Minimum VIN vs Output Current
2.5V VOUT
3.3VOUT Efficiency 5VOUT Efficiency 8VOUT Efficiency
TA = 25°C, unless otherwise noted.
Minimum VIN vs Output Current
3.3V VOUT
Minimum VIN vs Output Current
5V VOUT
OUTPUT CURRENT (mA)
0
40
EFFICIENCY (%)
50
60
70
80
90
100
200 400 600 800
8031 G01
1000
5VIN
12VIN
24VIN
36VIN
OUTPUT CURRENT (mA)
0
40
EFFICIENCY (%)
50
60
70
80
90
100
200 400 600 800
8031 G02
1000
12VIN
24VIN
36VIN
OUTPUT CURRENT (mA)
0
40
EFFICIENCY (%)
50
60
70
80
90
100
200 400 600 800
8031 G03
1000
12VIN
24VIN
36VIN
OUTPUT CURRENT (mA)
0
INPUT CURRENT (mA)
300
400
500
600 1000
8031 G04
200
100
0200 400 800
600
700
800
5VIN
12VIN
24VIN
36VIN
OUTPUT CURRENT (mA)
0
INPUT CURRENT (mA)
300
400
500
800
8031 G05
200
100
250
350
450
150
50
0200 400 600 1000
12VIN
24VIN
36VIN
OUTPUT CURRENT (mA)
0
INPUT CURRENT (mA)
300
400
500
600 1000
8031 G06
200
100
0200 400 800
600
700
800
12VIN
24VIN
36VIN
OUTPUT CURRENT (mA)
0
V
IN
(V)
4.0
4.2
4.4
600 1000
8031 G07
3.8
3.6
3.4 200 400 800
4.6
4.8
5.0
RUN/SS = VIN OR TOGGLED
RUNNING
OUTPUT CURRENT (mA)
0
V
IN
(V)
5.1
5.6
6.1
800
8031 G08
4.6
4.1
3.6 200 400 600 1000
RUN/SS TOGGLED
RUN/SS = VIN
RUNNING
OUTPUT CURRENT (mA)
0
V
IN
(V)
5.1
5.6
6.1
600 1000
8031 G09
4.6
4.1
3.6 200 400 800
6.6
7.1
7.6
RUN/SS = VIN
RUNNING OR RUN/SS TOGGLED
LTM8031
5
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Typical perForMance characTerisTics
Output Current vs Input Voltage
(Output Shorted)
Input Current vs Input Voltage
(Output Shorted)
Temperature Rise vs
Load Current, VOUT = 3.3V
Temperature Rise vs
Load Current, VOUT = 5V
Temperature Rise vs
Load Current, VOUT = 8V
Minimum VIN vs Output Current
8V VOUT
Minimum Input Running Voltage
vs Output Voltage, IOUT = 1A Bias Current vs Output Current
TA = 25°C, unless otherwise noted.
Temperature Rise vs
Load Current, VOUT = 10V
OUTPUT CURRENT (mA)
0
V
IN
(V)
7
8
9
600 1000
8031 G10
6
5
4200 400 800
10
11
12
RUN/SS = VIN
RUNNING OR RUN/SS TOGGLED
VOUT (V)
0
VIN (V)
6
8
10
610
8031 G11
4
2
02 4 8
12
14
16
OUTPUT CURRENT (mA)
0
25
30
35
800
8031 G12
20
15
200 400 600 1000
10
5
0
BIAS CURRENT (mA)
8VOUT
5VOUT
3.3VOUT
VIN (V)
0
OUTPUT CURRENT (A)
2.55
2.60
2.65
32
8031 G13
2.50
2.45
2.35 816 24
4 36
12 20 28
2.40
2.70
VIN (V)
0
0.8
1.0
30
8031 G14
0.6
0.4
10 20 40
0.2
0
1.2
INPUT CURRENT (A)
OUTPUT CURRENT (mA)
0
0
TEMPERATURE RISE (°C)
5
10
15
20
25
30
200 400 600 800
8031 G15
1000
36VIN
24VIN
12VIN
5VIN
OUTPUT CURRENT (mA)
1
0
TEMPERATURE RISE (°C)
5
10
15
20
25
30
200 400 600 800
8031 G16
1000
36VIN
24VIN
12VIN
OUTPUT CURRENT (mA)
1
0
TEMPERATURE RISE (°C)
5
10
15
20
25
30
200 400 600 800
8031 G17
1000
36VIN
24VIN
12VIN
OUTPUT CURRENT (mA)
1
0
TEMPERATURE RISE (°C)
5
10
15
20
25
30
200 400 600 800
8031 G18
1000
36VIN
24VIN
LTM8031
6
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Typical perForMance characTerisTics
Radiated Emissions Radiated Emissions
TA = 25°C, unless otherwise noted.
pin FuncTions
VIN (Bank 3): The VIN pin supplies current to the LTM8031’s
internal regulator and to the internal power switch. This
pin must be locally bypassed with an external, low ESR
capacitor of at least 1µF .
FIN (K3, L3): Filtered Input. This is the node after the input
EMI filter. Use this only if there is a need to modify the
behavior of the integrated EMI filter or if VIN rises or falls
rapidly; otherwise, leave these pins unconnected. See the
Applications Information section for more details.
GND (Bank 2): Tie these GND pins to a local ground plane
below the LTM8031 and the circuit components. Return
the feedback divider (RADJ) to this net.
VOUT (Bank 1): Power Output Pins. Apply the output filter
capacitor and the output load between these pins and
GND pins.
AUX (Pin H5): Low Current Voltage Source for BIAS. In
many designs, the BIAS pin is simply connected to VOUT
.
The AUX pin is internally connected to VOUT and is placed
adjacent to the BIAS pin to ease printed circuit board rout-
ing. Although this pin is internally connected to VOUT
, do
not connect this pin to the load. If this pin is not tied to
BIAS, leave it floating.
BIAS (Pin H4): The BIAS pin connects to the internal power
bus. Connect to a power source greater than 2.8V. If the
output is greater than 2.8V, connect this pin to AUX. If the
output voltage is less, connect this to a voltage source
between 2.8V and 25V. Also, make sure that BIAS + VIN
is less than 56V.
RUN/SS (Pin L5): Pull RUN/SS pin to less than 0.2V to
shut down the LTM8031. Tie to 2.5V or more for normal
operation. If the shutdown feature is not used, tie this pin
to the VIN pin. RUN/SS also provides a soft-start function;
see the Applications Information section.
RT (Pin G7): The RT pin is used to program the switching
frequency of the LTM8031 by connecting a resistor from
this pin to ground. The Applications Information section of
the data sheet includes a table to determine the resistance
value based on the desired switching frequency. Minimize
capacitance at this pin.
SHARE (Pin H7): Tie this to the SHARE pin of another
LTM8031 when paralleling the outputs.
FREQUENCY (MHz)
0
EMISSIONS LEVEL (dBµV/m)
50
70
90 VIN = 36V
VOUT = 10V AT 1A
800
8031 G19
30
10
40
60
80
20
0
–10 200100 400300 600 700 900
500 1000
EN55022
CLASS B
LIMIT
FREQUENCY (MHz)
0
EMISSIONS LEVEL (dBµV/m)
50
70
90 VIN = 36V
VOUT = 2.5V AT 1A
800
8031 G20
30
10
40
60
80
20
0
–10 200100 400300 600 700 900
500 1000
EN55022
CLASS B
LIMIT
LTM8031
7
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pin FuncTions
SYNC (Pin L6): This is the external clock synchronization
input. Ground this pin for low ripple Burst Mode
®
operation
at low output loads. Tie to a stable voltage source greater
than 0.7V to disable Burst Mode operation. Do not leave
this pin floating. Tie to a clock source for synchroniza-
tion. Clock edges should have rise and fall times faster
than 1µs. See Synchronization section in Applications
Information.
PGOOD (Pin K7): The PGOOD pin is the open-collector
output of an internal comparator. PGOOD remains low until
the ADJ pin is within 10% of the final regulation voltage.
The PGOOD output is valid when VIN is above 3.6V and
RUN/SS is high. If this function is not used, leave this
pin floating.
ADJ (Pin J7): The LTM8031 regulates its ADJ pin to 0.79V.
Connect the adjust resistor from this pin to ground. The
value of RADJ is given by the equation:
RADJ =196.71
VOUT 0.79
where RADJ is in kΩ.
block DiagraM
CURRENT
MODE
CONTROLLER
249k 10µF
VOUT
AUX
GND
4.7µH
BIAS
22pF
EMI FILTER
FIN
VIN
GND
SHARE
SYNC RT PGOOD ADJ
8031 BD
RUN/SS
LTM8031
8
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operaTion
applicaTions inForMaTion
The LTM8031 is a standalone nonisolated step-down
switching DC/DC power supply. It can deliver up to 1A of
DC output current with only bulk external input and output
capacitors. This module provides a precisely regulated
output voltage programmable via one external resistor
from 0.8VDC to 10VDC. The input voltage range is 3.6V
to 36V. Given that the LTM8031 is a step-down converter,
make sure that the input voltage is high enough to support
the desired output voltage and load current. A simplified
Block Diagram is given on the previous page.
The LTM8031 is designed with an input EMI filter and other
features to make its radiated emissions compliant with
several EMC specifications including EN55022 class B.
Compliance with conducted emissions requirements may
be obtained by adding a standard input filter.
The LTM8031 contains a current mode controller, power
switching element, power inductor, power Schottky diode
and a modest amount of input and output capacitance. The
LTM8031 is a fixed frequency PWM regulator. The switch-
ing frequency is set by simply connecting the appropriate
resistor value from the RT pin to GND.
An internal regulator provides power to the control circuitry.
The bias regulator can draw power from the VIN pin, but if
the BIAS pin is connected to an external voltage higher than
2.8V, bias power will be drawn from the external source
(typically the regulated output voltage). This improves
efficiency. The RUN/SS pin is used to place the LTM8031
in shutdown, disconnecting the output and reducing the
input current to less than 1µA.
To further optimize efficiency, the LTM8031 automatically
switches to Burst Mode operation in light load situations.
Between bursts, all circuitry associated with controlling the
output switch is shut down reducing the input supply cur-
rent to 50µA in a typical application. The oscillator reduces
the LTM8031’s operating frequency when the voltage at the
ADJ pin is low. This frequency foldback helps to control
the output current during start-up and overload.
The LTM8031 contains a power good comparator which
trips when the ADJ pin is at 90% of its regulated value.
The PGOOD output is an open-collector transistor that is
off when the output is in regulation, allowing an external
resistor to pull the PGOOD pin high. Power good is valid
when the LTM8031 is enabled and VIN is above 3.6V.
For most applications, the design process is straight
forward, summarized as follows:
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
2. Apply the recommended CIN, COUT, RADJ and RT
values.
3. Connect BIAS as indicated.
As the integrated input EMI filter may ring in response to an
application of a step input voltage, a bulk capacitance, series
resistance or some clamping mechanism may be required.
See the Hot-Plugging Safely section for details.
While these component combinations have been tested for
proper operation, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions.
Capacitor Selection Considerations
The CIN and COUT capacitor values in Table 1 are the
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable. X5R
and X7R types are stable over temperature and applied
voltage and give dependable service. Other types, includ-
ing Y5V and Z5U have very large temperature and voltage
coefficients of capacitance. In an application circuit they
LTM8031
9
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applicaTions inForMaTion
Table 1. Recommended Component Values and Configuration (See Typical Performance Characteristics for Load Conditions)
VIN VOUT CIN COUT RADJ BIAS fOPTIMAL RT(OPTIMAL) fMAX RT(MIN)
3.6V to 36V 0.82V 1µF 0805 50V 2 × 100µF 1206 6.3V 5.11M ≥2.8V, <25V 250kHz 150k 250kHz 150k
3.6V to 36V 1.20V 1µF 0805 50V 100µF//47µF 1206 6.3V 475k ≥2.8V, <25V 300kHz 124k 325kHz 113k
3.6V to 36V 1.80V 1µF 0805 50V 100µF 1206 191k ≥2.8V, <25V 420kHz 84.5k 450kHz 78.7k
3.6V to 36V 2.00V 1µF 0805 50V 100µF 1206 162k ≥2.8V, <25V 450kHz 78.7k 475kHz 73.2k
3.6V to 36V 2.50V 1µF 0805 50V 47µF 0805 6.3V 115k ≥2.8V, <25V 550kHz 61.9k 575kHz 59.0k
4.75V to 36V 3.30V 1µF 0805 50V 22µF 1206 6.3V 78.7k AUX 675kHz 48.7k 725kHz 44.2k
6.8V to 36V 5.00V 1µF 0805 50V 10µF 1206 6.3V 46.4k AUX 975kHz 29.4k 1000kHz 28.0k
10.5V to 36V 8.00V 1µF 0805 50V 4.7µF 1206 10V 26.7k AUX 1200kHz 23.7k 1600kHz 15.8k
13V to 36V 10.00V 1µF 0805 50V 4.7µF 0805 16V 21.0k AUX 1250kHz 22.6k 2050kHz 10.5k
3.6V to 15V 0.82V 1µF 0805 50V 2 × 100µF 1206 6.3V 5.11M VIN 500kHz 69.8k 600kHz 56.2k
3.6V to 15V 1.20V 1µF 0805 50V 100µF 1206 6.3V 475k VIN 600kHz 56.2k 750kHz 42.2k
3.6V to 15V 1.80V 1µF 0805 50V 100µF 1206 191k VIN 650kHz 51.1k 1000kHz 28.0k
3.6V to 15V 2.00V 1µF 0805 50V 100µF 1206 162k VIN 650kHz 51.1k 1100kHz 26.7k
3.6V to 15V 2.50V 1µF 0805 50V 47µF 0805 6.3V 115k VIN 700kHz 47.5k 1350kHz 20.5k
4.75V to 15V 3.30V 1µF 0805 50V 22µF 1206 6.3V 78.7k AUX 950kHz 32.4k 1650kHz 15.0k
6.8V to 15V 5.00V 1µF 0805 50V 10µF 1206 6.3V 46.4k AUX 1150kHz 25.5k 2400kHz 7.87k
10.5V to 15V 8.00V 1µF 0805 50V 4.7µF 1206 10V 26.7k AUX 1200kHz 23.7k 2400kHz 7.87k
9V to 24V 0.82V 1µF 0805 50V 2 × 100µF 1206 6.3V 5.11M ≥2.8V, <25V 350kHz 105k 375kHz 93.1k
9V to 24V 1.20V 1µF 0805 50V 100µF//47µF 1206 6.3V 475k ≥2.8V, <25V 450kHz 78.7k 475kHz 73.2k
9V to 24V 1.80V 1µF 0805 50V 100µF 1206 191k ≥2.8V, <25V 600kHz 56.2k 650kHz 51.1k
9V to 24V 2.00V 1µF 0805 50V 100µF 1206 162k ≥2.8V, <25V 650kHz 51.1k 700kHz 47.5k
9V to 24V 2.50V 1µF 0805 50V 47µF 0805 6.3V 115k ≥2.8V, <25V 700kHz 47.5k 850kHz 37.4k
9V to 24V 3.30V 1µF 0805 50V 22µF 1206 6.3V 78.7k AUX 950kHz 32.4k 1050kHz 28.0k
9V to 24V 5.00V 1µF 0805 50V 10µF 1206 6.3V 46.4k AUX 1150kHz 25.5k 1550kHz 16.5k
10.5V to 24V 8.00V 1µF 0805 50V 4.7µF 1206 10V 26.7k AUX 1200kHz 23.7k 2400kHz 7.87k
13V to 24V 10.00V 1µF 0805 50V 4.7µF 0805 16V 21.0k AUX 1250kHz 22.6k 2400kHz 7.87k
Note: An input bulk capacitor is required.
LTM8031
10
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applicaTions inForMaTion
may have only a small fraction of their nominal capaci-
tance resulting in much higher output voltage ripple than
expected. Ceramic capacitors are also piezoelectric. In
Burst Mode operation, the LTM8031’s switching frequency
depends on the load current, and can excite a ceramic
capacitor at audio frequencies, generating audible noise.
Since the LTM8031 operates at a lower current limit during
Burst Mode operation, the noise is typically very quiet to a
casual ear. If this audible noise is unacceptable, use a high
performance electrolytic capacitor at the output. The input
capacitor can be a parallel combination of a 1µF ceramic
capacitor and a low cost electrolytic capacitor.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8031. A
ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the LTM8031 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possi-
bly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
Electromagnetic Compliance
The LTM8031 is compliant with the radiated emissions
requirements of EN55022 class B. Graphs of the LTM8031’s
EMC performance are given in the Typical Performance
Characteristics section. Further data, operating conditions
and test setup are detailed in an EMI Test report available
from Linear Technology.
Frequency Selection
The LTM8031 uses a constant frequency PWM architecture
that can be programmed to switch from 200kHz to 2.4MHz
by using a resistor tied from the RT pin to ground. Table 2
provides a list of RT resistor values and their resultant
frequencies.
Operating Frequency Trade-Offs
It is recommended that the user apply the optimal RT
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8031 is flexible enough to accommodate a wide range
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or
fault conditions. A frequency that is too high can reduce
efficiency, generate excessive heat or even damage the
LTM8031 if the output is overloaded or short-circuited. A
frequency that is too low can result in a final design that
has too much output ripple or unnecessarily large output
capacitor. The maximum frequency (and attendant RT value)
at which the LTM8031 should be allowed to switch is given
in Table 1 in the fMAX column, while the recommended
frequency (and RT value) for optimal efficiency over the
given input condition is given in the fOPTIMAL column.
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
Table 2. Switching Frequency vs RT Value
SWITCHING FREQUENCY (MHz) RT VALUE (kΩ)
0.2 187
0.3 124
0.4 88.7
0.5 69.8
0.6 56.2
0.7 47.5
0.8 39.2
0.9 34
1.0 28.0
1.2 23.7
1.4 19.1
1.5 16.2
1.8 13.3
2 11.5
2.2 9.76
2.4 8.66
LTM8031
11
8031fb
applicaTions inForMaTion
BIAS Pin Considerations
The BIAS pin is used to provide drive power for the internal
power switching stage and operate internal circuitry. For
proper operation, it must be powered by at least 2.8V. If
the output voltage is programmed to be 2.8V or higher,
simply tie BIAS to AUX. If VOUT is less than 2.8V, BIAS
can be tied to VIN or some other voltage source. In all
cases, ensure that the maximum voltage at the BIAS pin
is both less than 25V and the sum of VIN and BIAS is less
than 56V. If BIAS power is applied from a remote or noisy
voltage source, it may be necessary to apply a decoupling
capacitor locally to the LTM8031.
Load Sharing
Two or more LTM8031s may be paralleled to produce higher
currents. This may, however, alter the EMI performance of
the LTM8031s. To do this, tie the VIN, ADJ, VOUT and SHARE
pins of all the paralleled LTM8031s together. To ensure that
paralleled modules start up together, the RUN/SS pins may
be tied together, as well. Synchronize the LTM8031s to an
external clock to eliminate beat frequencies, if required.
If the RUN/SS pins are not tied together, make sure that
the same valued soft-start capacitors are used for each
module. An example of two LTM8031 modules configured
for load sharing is given in the Typical Applications sec-
tion. For 2A applications also see the LTM8032, 2A EMC
DC/DC µModule regulator
Burst Mode Operation
To enhance efficiency at light loads, the LTM8031 auto-
matically switches to Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizing the input quiescent current. During Burst Mode
operation, the LTM8031 delivers single cycle bursts of
current to the output capacitor followed by sleep periods
where the output power is delivered to the load by the output
capacitor. In addition, VIN and BIAS quiescent currents are
reduced to typically 25µA and 60µA respectively during
the sleep time. As the load current decreases towards a
no-load condition, the percentage of time that the LTM8031
operates in sleep mode increases and the average input
current is greatly reduced, resulting in higher efficiency.
Burst Mode operation is enabled by tying SYNC to GND. To
disable Burst Mode operation, tie SYNC to a stable voltage
above 0.7V. Do not leave the SYNC pin floating.
Minimum Input Voltage
The LTM8031 is a step-down converter, so a minimum
amount of headroom is required to keep the output in regu-
lation. In addition, the input voltage required to turn on is
higher than that required to run, and depends upon whether
the RUN/SS is used. As shown in the Typical Performance
Characteristics section, it takes only about 3.6VIN for the
LTM8031 to run a 3.3V output at light load. If RUN/SS is
pulled up to VIN, it takes 5.7VIN to start. If the LTM8031
is enabled via the RUN/SS pin, the minimum voltage to
start at light loads is lower, about 4.4V. Similar curves for
2.5VOUT
, 5VOUT and 8VOUT operation are also provided in
the Typical Performance Characteristics section.
Soft-Start
The RUN/SS pin can be used to soft-start the LTM8031,
reducing the maximum input current during start-up. The
RUN/SS pin is driven through an external RC network to
create a voltage ramp at this pin. Figure 1 shows the start-
up and shutdown waveforms with the soft-start circuit. By
choosing an appropriate RC time constant, the peak start-up
current can be reduced to the current that is required to
regulate the output, with no overshoot. Choose the value
of the resistor so that it can supply at least 20µA when
the RUN/SS pin reaches 2.5V.
LTM8031
12
8031fb
Synchronization
The internal oscillator of the LTM8031 can be synchro-
nized by applying an external 250kHz to 2MHz clock to
the SYNC pin. Do not leave this pin floating. The resistor
tied from the RT pin to ground should be chosen such
that the LTM8031 oscillates 20% lower than the intended
synchronization frequency (see the Frequency Selection
section). The LTM8031 will not enter Burst Mode operation
while synchronized to an external clock, but will instead
skip pulses to maintain regulation.
Shorted Input Protection
Care needs to be taken in systems where the output will
be held high when the input to the LTM8031 is absent.
This may occur in battery charging applications or in
battery back-up systems where a battery or some other
supply is diode ORed with the LTM8031’s output. If the
VIN pin is allowed to float and the RUN/SS pin is held high
(either by a logic signal or because it is tied to VIN), then
the LTM8031’s internal circuitry will pull its quiescent
current through its internal power switch. This is fine if
your system can tolerate a few milliamps in this state. If
you ground the RUN/SS pin, the internal switch current
will drop to essentially zero. However, if the VIN pin is
grounded while the output is held high, then parasitic
diodes inside the LTM8031 can pull large currents from
the output through the VIN pin, potentially damaging the
applicaTions inForMaTion
Figure 2. The Input Diode Prevents a Shorted Input from
Discharging a Back-Up Battery Tied to the Output. It Also
Protects the Circuit from a Reversed Input. The LTM8031
Runs Only When the Input is Present
VOUT
VIN
RUN/SS
BIAS
RT
ADJ
LTM8031
8031 F02
VOUT
GND
VIN
AUX
SYNC
device. Figure 2 shows a circuit that will run only when
the input voltage is present and that protects against a
shorted or reversed input.
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8031. The LTM8031 is neverthe-
less a switching power supply and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 3
for a suggested layout.
Ensure that the grounding and heat sinking are acceptable.
A few rules to keep in mind are:
1. Place the RADJ and RT resistors as close as possible to
their respective pins.
2. Place the CIN capacitor as close as possible to the VIN
and GND connection of the LTM8031. If a capacitor
is connected to the FIN terminals, place it as close
as possible to the FIN terminals, such that its ground
connection is as close as possible to that of the CIN
capacitor.
3. Place the COUT capacitor as close as possible to the
VOUT and GND connection of the LTM8031.
8031 F01
IL
0.5A/DIV
VRUN/SS
2V/DIV
VOUT
2V/DIV
RUN/SS
GND
0.22µF
RUN
15k
2ms/DIV
Figure 1. To Soft-Start the LTM8031, Add a Resistor
and Capacitor to the RUN/SS Pin
LTM8031
13
8031fb
applicaTions inForMaTion
4. Place the CIN and COUT capacitors such that their
ground currents flow directly adjacent or underneath
the LTM8031.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8031.
6. Use vias to connect the GND copper area to the board’s
internal ground plane. Liberally distribute these GND vias
to provide both a good ground connection and thermal
path to the internal planes of the printed circuit board.
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8031. However, these capacitors
can cause problems if the LTM8031 is plugged into a live
or fast rising or falling supply (see Linear Technology
Application Note 88 for a complete discussion). The low
loss ceramic capacitor combined with stray inductance in
series with the power source forms an under-damped tank
circuit, and the voltage at the VIN pin of the LTM8031 can
ring to twice the nominal input voltage, possibly exceed-
ing the LTM8031’s rating and damaging the part. A similar
phenomenon can occur inside the LTM8031 module, at the
output of the integrated EMI filter, with the same potential
of damaging the part.
If the input supply is poorly controlled or the user will be
plugging the LTM8031 into an energized supply, the input
network should be designed to prevent this overshoot. Fig-
ure 4 shows the waveforms that result when an LTM8031
circuit is connected to a 24V supply through six feet of 24-
gauge twisted pair. The first plot (4a) is the response with
a 2.2µF ceramic capacitor at the input. The input voltage
Figure 3. Layout Showing Suggested External Components,
GND Plane and Thermal Vias
GND
COUT
CIN
8031 F03
VIN
FIN
RUN/SS
SYNC
PGOOD
RADJ
RT
AUX
BIAS
VOUT
GND
OPTIONAL
FIN
CAPACITOR
LTM8031
14
8031fb
applicaTions inForMaTion
rings as high as 35V and the input current peaks at 20A.
One method of damping the tank circuit is to add another
capacitor with a series resistor to the circuit, as shown
in Figure 4b. A 0.7Ω resistor is added in series with the
input to eliminate the voltage overshoot (it also reduces
the peak input current). A 0.1µF capacitor improves high
frequency filtering. For high input voltages its impact on
efficiency is minor, reducing efficiency less than one-half
percent for a 5V output at full load operating from 24V.
By far the most popular method of controlling overshoot
is shown in Figure 4c, where an aluminum electrolytic
capacitor has been connected to FIN. This capacitors high
equivalent series resistance damps the circuit and elimi-
nates the voltage overshoot. The extra capacitor improves
low frequency ripple filtering and can slightly improve the
efficiency of the circuit, though it is likely to be the largest
component in the circuit. Placing the electrolytic capacitor
at the FIN terminals can also improve the LTM8031’s EMI
filtering as well as guard against overshoots caused by
the Q of the integrated filter.
Thermal Considerations
The LTM8031 output current may need to be derated if it is
required to operate in a high ambient temperature or deliver
a large amount of continuous power. The amount of current
derating is dependent upon the input voltage, output power
and ambient temperature. The temperature rise curves
given in the Typical Performance Characteristics section
can be used as a guide. These curves were generated by a
LTM8031 mounted to a 35cm2 4-layer FR4 printed circuit
board. Boards of other sizes and layer count can exhibit
different thermal behavior, so it is incumbent upon the user
to verify proper operation over the intended system’s line,
load and environmental operating conditions.
The junction-to-air and junction-to-board thermal resis-
tances given in the Pin Configuration diagram may also be
used to estimate the LTM8031 internal temperature. These
thermal coefficients are determined per JESD 51-9 (JEDEC
standard, test boards for area array surface mount package
thermal measurements) through analysis and physical
correlation. Bear in mind that the actual thermal resistance
of the LTM8031 to the printed circuit board depends upon
the design of the circuit board. The die temperature of
the LTM8031 must be lower than the maximum rating of
125°C, so care should be taken in the layout of the circuit
to ensure good heat sinking of the LTM8031.
The bulk of the heat flow out of the LTM8031 is through the
bottom of the module and the LGA pads into the printed
circuit board. Consequently a poor printed circuit board
design can cause excessive heating, resulting in impaired
performance or reliability. Please refer to the PCB Layout
section for printed circuit board design suggestions.
Finally, be aware that at high ambient temperatures the
internal Schottky diode will have significant leakage current
increasing the quiescent current of the LTM8031.
LTM8031
15
8031fb
Typical applicaTions
Figure 4. A Well Chosen Input Network Prevents Input Voltage Overshoot and Ensures
Reliable Operation When the LTM8031 is Hot-Plugged to a Live Supply
+
LTM8031
4.7µF
VIN
20V/DIV
IIN
10A/DIV
20µs/DIV
VIN
CLOSING SWITCH
SIMULATES HOT PLUG
IIN
(4a)
(4b)
LOW
IMPEDANCE
ENERGIZED
24V SUPPLY
STRAY
INDUCTANCE
DUE TO 6 FEET
(2 METERS) OF
TWISTED PAIR
+
LTM8031
4.7µF0.1µF
0.7Ω VIN
20V/DIV
IIN
10A/DIV
20µs/DIV
DANGER
RINGING VIN MAY EXCEED
ABSOLUTE MAXIMUM RATING
(4c)
+
4.7µF
22µF
35V
AI.EI.
8031 F04
VIN
20V/DIV
IIN
10A/DIV
20µs/DIV
+
VIN
LTM8031
VIN
FIN
LTM8031
16
8031fb
Typical applicaTions
0.82V Step-Down Converter
1.8V Step-Down Converter
RT
SHARE
191k
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
56.2k
VIN
FIN
F 100µF
VOUT
1.8V
1A
RUN/SS
VIN*
9V TO 24V
PGOOD
BIAS
LTM8031
AUX
OUT
SYNC GND
8031 TA03
ADJ
RT
SHARE
5.11M
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
69.8k
VIN
FIN
F 200µF
VOUT
0.82V
1A
RUN/SS
VIN*
3.6V TO 15V
PGOOD
BIAS
LTM8031
AUX
OUT
SYNC GND
8031 TA02
ADJ
LTM8031
17
8031fb
Typical applicaTions
2.5V Step-Down Converter
5V Step-Down Converter
RT
SHARE
115k
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
61.9k
VIN
FIN
F 47µF
VOUT
2.5V
1A
RUN/SS
VIN*
3.6V TO 36V
3.3V
PGOOD
BIAS
LTM8031
AUX
OUT
SYNC GND
8031 TA04
ADJ
RT
SHARE
VIN
FIN
F
10µF
46.4k29.4k
VOUT
5V
1A
RUN/SS
VIN*
6.8V TO 36V
PGOOD
BIAS
LTM8031
AUX
OUT
SYNC GND
8031 TA05
ADJ
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
3.3V Step-Down Converter
RT
SHARE
VIN
FIN
F
22µF
78.7k48.7k
VOUT
3.3V
1A
RUN/SS
VIN*
4.75V TO 36V
PGOOD
BIAS
LTM8031
AUX
OUT
SYNC GND
8031 TA08
ADJ
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
LTM8031
18
8031fb
Typical applicaTions
package phoTograph
Two LTM8031s Operating in Parallel (Also See the LTM8032, 2A Pin Compatible)
RT
SHARE
VIN
FIN
F
13.7k23.7k
8031 TA07
10µF
VOUT
8V
1.9A
RUN/SS
VIN*
11.5V TO 36V
OPTIONAL SYNC TIE TO
GND IF NOT USED
PGOOD
BIAS
LTM8031
AUX
OUT
SYNC GND ADJ
RT
SHARE
23.7k
VIN
FIN
F
RUN/SS
PGOOD
BIAS
LTM8031
AUX
OUT
SYNC GND ADJ
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
LTM8031
19
8031fb
package DescripTion
LGA Package
71-Lead (15mm × 9mm × 2.82mm)
(Reference LTC DWG # 05-08-1823 Rev Ø)
9.00
BSC
PACKAGE TOP VIEW
LGA 71 0108 REV Ø
15.00
BSC
4
PAD 1
CORNER
3
PADS
SEE NOTES
X
Y
aaa Z
aaa Z
2.670 – 2.970
DETAIL A
PACKAGE SIDE VIEW
DETAIL A
SUBSTRATE
MOLD
CAP
0.27 – 0.37
2.40 – 2.60
bbb Z
Z
1.270
BSC
0.635 ±0.025 SQ. 71x
12.700
BSC
7.620
BSC
PAD 1
Ø (0.635)
PACKAGE IN TRAY LOADING ORIENTATION
2.540
2.540
1.270
5.080
5.080
6.350
6.350
3.810
3.810
0.000
1.270
3.810
3.810
2.540
2.540
1.270
1.270
0.000
SUGGESTED PCB LAYOUT
TOP VIEW
LTMXXXXXX
µModule
TRAY PIN 1
BEVEL
COMPONENT
PIN 1
PACKAGE BOTTOM VIEW
67 5 1234
L
K
J
H
G
F
E
D
C
B
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS
LAND DESIGNATION PER JESD MO-222, SPP-010 AND SPP-020
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. THE TOTAL NUMBER OF PADS: 71
4
3
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
DETAIL A
SYXeee
DETAIL A
SYMBOL
aaa
bbb
eee
TOLERANCE
0.15
0.10
0.05
1.27
BSC
LTM8031
20
8031fb
package DescripTion
PIN SIGNAL DESCRIPTION
A1 VOUT
A2 VOUT
A3 VOUT
A4 VOUT
A5 GND
A6 GND
A7 GND
B1 VOUT
B2 VOUT
B3 VOUT
B4 VOUT
B5 GND
B6 GND
B7 GND
C1 VOUT
C2 VOUT
C3 VOUT
C4 VOUT
C5 GND
C6 GND
C7 GND
D1 VOUT
D2 VOUT
D3 VOUT
D4 VOUT
D5 GND
D6 GND
D7 GND
E1 GND
E2 GND
E3 GND
E4 GND
E5 GND
E6 GND
E7 GND
PIN SIGNAL DESCRIPTION
F1 GND
F2 GND
F3 GND
F4 GND
F5 GND
F6 GND
F7 GND
G1 GND
G2 GND
G3 GND
G4 GND
G5 GND
G6 GND
G7 RT
H1 GND
H2 GND
H3 GND
H4 BIAS
H5 AUX
H6 GND
H7 SHARE
J5 GND
J6 GND
J7 ADJ
K1 VIN
K2 VIN
K3 FIN
K5 GND
K6 GND
K7 PGOOD
L1 VIN
L2 VIN
L3 FIN
L5 RUN/SS
L6 SYNC
L7 GND
Table 3. LTM8031 Pinout (Sorted by Pin Number)
LTM8031
21
8031fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 03/10 Addition to Features
Changes to Applications Information
1
11
B 04/12 Added MP-Grade part. Reflected throughout the data sheet 1-22
LTM8031
22
8031fb
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 2009
LT 0412 REV B • PRINTED IN USA
relaTeD parTs
PART NUMBER DESCRIPTION COMMENTS
LTM4606 Ultralow Noise 6A DC/DC µModule Regulator 4.5V ≤ VIN ≤ 28V, 0.6V ≤ VOUT ≤ 5V, 15mm × 15mm × 2.8mm LGA
LTM4612 Ultralow Noise High VOUT DC/DC µModule Regulator 5A, 5V ≤ VIN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, 15mm × 15mm × 2.8mm LGA
LTM8023 36V, 2A DC/DC µModule Regulator 3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, 9mm × 11.75mm × 2.8mm LGA
LTM8025 36V, 3A DC/DC µModule Regulator 3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 24V, 9mm × 15mm × 4.32mm LGA
LTM8032 36V, 2A EMC DC/DC µModule Regulator EN55022 Class B, 9mm × 15mm × 2.8mm LGA. Pin Compatible with the
LTM8031
8V Step-Down Converter
RT
SHARE
VIN
FIN
F
4.7µF
26.7k23.7k
VOUT
8V
1A
RUN/SS
VIN*
10.5V TO 36V
PGOOD
BIAS
LTM8031
AUX
OUT
SYNC GND
8031 TA06
ADJ
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
Typical applicaTion