AFL12005SXHB - International Rectifier

07/09/02

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ADVANCED ANALOG

HIGH RELIABILITY

HYBRID DC/DC CONVERTERS

AFL50XXS SERIES

The AFL Series of DC/DC converters feature high power

density with no derating over the full military tempera-

ture range. This series is offered as par t of a complete

family of converters providing single and dual output

voltages and operating from nominal +28, +50, +120 or

+270 volt inputs with output power ranging from 80 to

120 watts. For applications requiring higher output

power, individual converters can be operated in paral-

lel. The internal current sharing circuits assure equal

current distribution among the paralleled converters. This

series incorporates Advanced Analog’ s proprietary mag-

netic pulse feedback technology providing optimum

dynamic line and load regulation response. This feed-

back system samples the output voltage at the pulse

width modulator fixed clock frequency, nominally 550

KHz. Multiple converters can be synchronized to a sys-

tem clock in the 500 KHz to 700 KHz range or to the

synchronization output of one conver ter. Under voltage

lockout, primary and secondary referenced inhibit, soft-

start and load fault protection are provided on all mod-

els.

These converters are hermetically packaged in two en-

closure variations, utilizing copper core pins to mini-

mize resistive DC losses. Three lead styles are avail-

able, each fabricated with Advanced Analog’s rugged

ceramic lead-to-package seal assuring long term

hermeticity in the most harsh environments.

Description

n30 To 80 Volt Input Range

n3.3, 5, 8, 9 12, 15, 24 and 28 Volts Outputs

Available

nHigh Power Density - up to 84 W / in3

nUp To 120 Watt Output Powe r

nParallel Operation with Stress and Current

Sharing

nLow Profile (0.380") Seam Welded Package

nCeramic Feedthru Copper Core Pins

nHigh Efficiency - to 85%

nFull Military Temperature Range

nContinuous Short Circuit and Overload

Protection

nRemote Sensing Terminals

nPrimary and Secondary Referenced

Inhibit Functions

nLine Rejection > 40 dB - DC to 50KHz

nExternal Synchronization Port

nFault Tolerant Design

nDual Output Versions Available

nStandard Military Drawings Available

Features

AFL

50V Input, Single Output

Manufactured in a facility fully qualified to MIL-PRF-

38534, these converters are available in four screening

grades to satisfy a wide r ange of requirements. The CH

grade is fully compliant to the requirements of MIL-H-

38534 for class H. The HB grade is fully processed and

screened to the class H requirement, may not neces-

sarily meet all of the other MIL-PRF-38534 requirements,

e.g., element evaluation and Periodic Inspection (P.I.)

not required. Both grades are tested to meet the com-

plete group “A” test specification over the full military

temperature range without output power deration.

Two grades with more limited screening are also

available for use in less demanding applications.

Variations in electrical, mechanical and screen-

ing can be accommodated. Contact Advanced

Analog for special requirements.

PD - 94457A

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AFL50XXS Series

Specifications

Static Characteristics -55°C < TCASE < +125°C , 30V< VIN < 80V unless otherwise specified.

For Notes to Specifications, refer to page 4

ABSOLUT E MAXIMUM RATINGS

Input Voltage -0.5V to 10 0V

Solderin g T emper atur e 300° C for 10 seconds

Case Temperature Operating -55°C to +125°C

Storage -65°C to +135°C

Parameter Group A

Subgroups

Test Conditions

Min

Nom

Max

Unit

INPUT VOLTAGE Note 6 30 50 80 V

OUTPUT VOLTAGE

AFL5005S

AFL5008S

AFL5009S

AFL5012S

AFL5015S

AFL5028S

AFL5005S

AFL5008S

AFL5009S

AFL5012S

AFL5015S

AFL5028S

2, 3

VIN = 50 Volts, 100% Load

4.95

7.92

8.91

11.88

14.85

27.72

4.90

7.84

8.82

11.76

14.70

27.44

5.00

8.00

9.00

12.00

15.00

28.00

5.05

8.08

9.09

12.12

15.15

28.28

5.10

8.16

9.18

12.24

15.30

28.56

OUTPUT CURRENT

AFL5005S

AFL5008S

AFL5009S

AFL5012S

AFL5015S

AFL5028S

VIN = 30 , 50, 80 Volt s - Note 6

16.0

10.0

9.0

8.0

4.0

OUTPUT POWER

AFL5 005S

AFL5008S

AFL5009S

AFL5012S

AFL5015S

AFL5028S

Note 6

108

120

112

MAXIMUM CAPACITIVE LOAD Note 1 10,000

µfd

OUTPUT VOLTAGE

TEMPERATURE COEFFICIENT VIN = 50 Volts, 100% Load - Note 1, 6 -0.015 +0.015 %/°C

OUTPUT VOLTAGE REGULATION

AF L50 28S Line

All Others Line

Load

1, 2, 3

No Load, 50% Load, 100% Load

VIN = 30 , 50, 80 Vol t s

-70.0

-20.0

-1.0

+70.0

+20.0

+1.0

OUTPUT RIPPLE VOLTAGE

AFL5005S

AFL5008S

AFL5009S

AFL5012S

AFL5015S

AFL5028S

1, 2, 3

VIN = 30, 50, 80 Volts, 100% Load,

BW = 10MHz

100

mVpp

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AFL50XXS Series

Static Characteristics (Continued)

For Notes to Specifications, refer to page 4

Parameter Group A

Subgroups

Test Conditions

Min

Nom

Max

Unit

INPUT CURRENT

No Load

Inhibit 1

Inhibit 2

2, 3

1, 2, 3

VIN = 50 Vol ts

IOUT = 0

Pin 4 Shorted to Pin 2

Pin 12 Shorted to Pin 8

INPUT RIPPLE CURRENT

AFL5005S

AFL5008S

AFL5009S

AFL5012S

AFL5015S

AFL5028S

1, 2, 3

VIN = 50 Vol ts , 100% Load, BW = 10M Hz

mApp

CURRENT LIMIT POINT

As a percentage of full rat ed load

VOUT = 90% VNOM , VIN = 50 Volts

Note 5

115

105

125

115

140

LOAD F AULT POWER DISSIPATION

Overload or Short Circuit

1, 2, 3 VIN = 50 Volts

EFFICIENCY

AFL5005S

AFL5008S

AFL5009S

AFL5012S

AFL5015S

AFL5028S

1, 2, 3

VIN = 50 Volts, 100% Load

ENABLE INPUTS (Inhibit Function)

Converter Off

Sink Current

Converter On

Sink Current

1, 2, 3

Logical Low on Pin 4 or Pin 12

Note 1

Logical High on P i n 4 and Pin 12 - Note 9

Note 1

-0.5

2.0

0.8

100

µA

SWITCHING FREQUENCY 1, 2, 3 500 550 600 KHz

SYNCHRONIZATION INPUT

Frequency Range

Pulse Amplitude, Hi

Pulse Amplitude, Lo

Pulse Rise Time

Pu l se Du ty Cycle

1, 2, 3

Note 1

500

2.0

-0.5

700

0.8

100

KHz

nSec

ISOLATION 1 Input to Output or Any Pin to Case

(except Pin 3). Test @ 500VDC 100 MΩ

DEVICE WEIGHT Slight Variations with Case Style 85 gms

MTBF MIL-HDBK-217F, AIF @ TC = 40°C 300 KHrs

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AFL50XXS Series

Dynamic Characteristics -55°C < TCASE < +125°C, VIN=50V unless otherwise specified.

Parameter Grou p A

Subgroups

Test Conditions

Min

Nom

Max

Unit

LOAD TRANSIENT RESPONSE

AFL5005S Amplitude

Recovery

Amplitude

Recovery

AFL5008S Amplitude

Recovery

Amplitude

Recovery

AFL5009S Amplitude

Recovery

Amplitude

Recovery

AFL5012S Amplitude

Recovery

Amplitude

Recovery

AFL5015S Amplitude

Recovery

Amplitude

Recovery

AFL5028S Amplitude

Recovery

Amplitude

Recovery

4, 5, 6

Note 2, 8

Load Step 50% ⇔ 100%

Load Step 10% ⇔ 50%

Load Step 50% ⇔ 100%

Load Step 10% ⇔ 50%

Load Step 50% ⇔ 100%

Load Step 10% ⇔ 50%

Load Step 50% ⇔ 100%

Load Step 10% ⇔ 50%

Load Step 50% ⇔ 100%

Load Step 10% ⇔ 50%

Load Step 50% ⇔ 100%

Load Step 10% ⇔ 50%

-450

-500

-600

-750

-1200

450

200

450

300

500

200

500

300

600

200

600

300

750

200

750

300

750

200

750

300

1200

200

1200

300

µSec

LINE TRANSIENT RESPO NSE

Amplitude

Recovery

Note 1, 2, 3

VIN S tep = 30 ⇔ 80 Vol ts

-500

500

µSec

TURN-ON CHARACTERISTICS

Overshoot

Delay

4, 5, 6

VIN = 30, 50, 80 Volts. Note 4

Enable 1, 2 on. (Pins 4, 12 high or

open)

250

120

mSec

LOAD FAULT RECOV E RY Same as Turn On Characteristics.

LINE REJECT ION MI L-STD-461D, CS101, 30Hz to 50KHz

Note 1 40 50 dB

Notes to Specif icatio n s :

1. Parameters not 100% test ed but are guaranteed to the limits specified in the table .

2. Reco ver y time is measur ed f r om th e in itiation of the transient to where VOUT has return ed to within ±1% o f VOUT at 50% load.

3. Line transient transition time ≥ 100 µSec.

4. Tur n-on del ay is me asured with an input voltage rise time of bet we en 100 and 500 volts per millisecon d.

5. Curr ent lim it point is tha t con di tion of excess load caus ing out put voltage to dr op t o 90% of no m in al.

6. Parameter verif ie d as par t of anot her test.

7. All electrical tests ar e per f or m ed with the rem ot e sense leads connected to the ou tp ut lea ds at the lo ad.

8. Load t r ans ien t tr ansition time ≥ 10 µSec.

9. Enable inputs inter nally pulled high . Nom ina l open circuit voltag e ≈ 4.0VDC.

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AFL50XXS Series

AFL50XXS Circuit Description

Figure I. AFL Single Output Block Diagram

Figure II. Enable Input Equivalent Circuit

Circuit Operation and Application Information

Inhibiting Converter Output

As an alternative to application and removal of the DC volt-

age to the input, the user can control the converter output

by providing TTL compatible, positive logic signals to either

of two enable pins (pin 4 or 12). The distinction between

these two signal ports is that enable 1 (pin 4) is referenced

to the input return (pin 2) while enable 2 (pin 12) is refer-

enced to the output return (pin 8). Thus, the user has

access to an inhibit function on either side of the isolation

barrier. Each port is internally pulled “high” so that when not

used, an open connection on both enable pins permits nor-

mal converter operation. When their use is desired, a logi-

cal “low” on either port will shut the converter down.

DC Input

Enable 1

Sync Outp

Sync Inp

Case

2Input Retu

Input

Filter

Primary

Bias Su

Control

Output

Filter

Current

Sense

Error

Amp

& Ref

lifier

Sense

Amplifier

Output

Sense

hare

nable 2

Sense

utput Return

The AFL series of converters employ a forward switched

mode converter topology. (refer to Figure I.) Operation of

the device is initiated when a DC voltage whose magnitude

is within the specified input limits is applied between pins 1

and 2. If pin 4 is enabled (at a logical 1 or open) the primary

bias supply will begin generating a regulated housekeeping

voltage bringing the circuitry on the primary side of the

converter to life. A power MOSFET is used to chop the DC

input voltage into a high frequency square wave, applying

this chopped voltage to the power transformer at the nomi-

nal converter switching frequency. Maintaining a DC volt-

age within the specified operating range at the input as-

sures continuous generation of the primary bias voltage.

The switched voltage impressed on the secondary output

transformer winding is rectified and filtered to generate the

converter DC output voltage. An error amplifier on the sec-

ondary side compares the output voltage to a precision

reference and generates an error signal proportional to the

difference . This error signal is magnetically coupled through

the feedback transformer into the controller section of the

converter varying the pulse width of the square wave signal

driving the MOSFET, narrowing the width if the output volt-

age is too high and widening it if it is too low , thereb y regulat-

ing the output voltage.

Remote Sensing

Connection of the + and - sense leads at a remotely located

load permits compensation for excessive resistance be-

tween the converter output and the load when their physical

separation could cause undesirable voltage drop. This con-

nection allows regulation to the placard voltage at the point

of application. When the remote sensing feature is not used,

the sense lead should be connected to their respective

output terminals at the converter. Figure III. illustrates a

typical remotely sensed application.

Disable

100K

290K

180K

1N4148

2N3904

+5.6 V

Pin 4 or

Pin 12

Pin 2 or

Pin 8

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AFL50XXS Series

Figure III. Preferred Connection for Parallel Operation

Synchronization of Multiple Converters

Parallel Operation-Current and Stress Sharing

Internally, these ports differ slightly in their function. In use,

a low on Enable 1 completely shuts down all circuits in the

converter, while a low on Enable 2 shuts down the second-

ary side while altering the controller duty cycle to near zero.

Externally, the use of either port is transparent to the user

save for minor differences in idle current. (See specification

table).

When operating multiple converters, system requirements

often dictate operation of the converters at a common fre-

quency. To accommodate this requirement, the AFL series

converters provide both a synchronization input and out-

put.

The sync input port permits synchronization of an AFL co-

nverter to any compatible external frequency source oper-

ating between 500 and 700 KHz. This input signal should

be referenced to the input return and have a 10% to 90%

duty cycle. Compatibility requires transition times less th an

100 ns, maximum low level of +0.8 volts and a minimum high

level of +2.0 volts. The sync output of another converter

which has been designated as the master oscillator pro-

vides a convenient frequency source for this mode of op-

eration. When external synchronization is not required, the

sync in pin should be left open (unconnected )thereby per-

mitting the converter to operate at its’ own internally set

frequency.

The sync output signal is a continuous pulse train set at

550 ±50 KHz, with a duty cycle of 15 ±5%. This signal is

referenced to the input return and has been tailored to be

compatible with the AFL sync input port. Transition times

are less than 100 ns and the low level output impedance is

less than 50 ohms. This signal is active when the DC input

voltage is within the specified operating range and the con-

verter is not inhibited. This output has adequate drive re-

serve to synchronize at least five additional converters.

A typical connection is illustrated in Figure III.

Figure III. illustrates the preferred connection scheme for

operation of a set of AFL converters with outputs operating

in parallel. Use of this connection permits equal sharing

among the members of a set whose load current exceeds

the capacity of an individual AFL. An important feaure of the

AFL series operating in the parallel mode is that in addition

to sharing the current, the stress induced by temperature

will also be shared. Thus if one member of a paralleled set

is operating at a higher case temperature, the current it

provides to the load will be reduced as compensation for

the temperature induced stress on that device.

Optional

nchronization

Connection

Power

Input

(Other Converters)

Share Bus

AFL

- Sense

Enable 2

+ Vout

Return

+ Sense

Vin

Rtn

Case

Enable 1

nc Out

nc In

AFL

- Sense

Enable 2

+ Vout

Return

+ Sense

Vin

Rtn

Case

Enable 1

nc Out

nc In

AFL

- Sense

Enable 2

+ Vout

Return

+ Sense

Vin

Rtn

Case

Enable 1

nc Out

nc In

to Load

www.irf.com 7

AFL50XXS Series

A conservative aid to estimating the total heat sink surface

area (AHEAT SINK) required to set the maximum case temp-

erature rise (∆T) above ambient temperature is given by

the following expression:

A HEAT SINK ≈







−

−

∆

80 30

085

143

where

∆

Eff

OUT

==−











Case temperature rise above ambient

Device dissipation in Watts 11

∆T = 85 - 25 = 60°C

and the required heat sink area is

If the worst case full load efficiency for this device is 83%;

then the power dissipation at full load is given by

Because of the incorporation of many innovative techno-

logical concepts, the AFL series of converters is capable of

providing very high output power from a package of very

small volume. These magnitudes of power density can only

be obtained by combining high circuit efficiency with effec-

tive methods of heat removal from the die junctions. This

requirement has been effectively addressed inside the de-

vice; but when operating at maximum loads, a significant

amount of heat will be generated and this heat must be

conducted away from the case. To maintain the case tem-

perature at or below the specified maximum of 125°C, this

heat must be transferred by conduction to an appropriate

heat dissipater held in intimate contact with the converter

base-plate.

When operating in the shared mode, it is important that

symmetry of connection be maintained as an assurance of

optimum load sharing performance. Thus, converter out-

puts should be connected to the load with equal lengths of

wire of the same gauge and sense leads from each con-

verter should be connected to a common physical point,

preferably at the load along with the converter output and

return leads. All converters in a paralleled set must have

their share pins connected together. This arrangement is

diagrammatically illustrated in Figure III. showing the out-

puts and return pins connected at a star point which is

located close as possible to the load.

As a consequence of the topology utilized in the current

sharing circuit, the share pin may be used for other func-

tions. In applications requiring only a single converter, the

voltage appearing on the share pin may be used as a “cur-

rent monitor”. The share pin open circuit voltage is nomi-

nally +1.00v at no load and increases linearly with increas-

ing output current to +2.20v at full load.

1Sil-Pad is a registered Trade Mark of Bergquist, Minneapolis, MN

Thermal Considerations

Since the effectiveness of this heat transfer is dependent

on the intimacy of the baseplate/heatsink interface, it is

strongly recommended that a high thermal conductivity heat

transferring medium is inserted between the baseplate and

heatsink. The material most frequently utilized at the fac-

tory during all testing and burn-in processes is sold under

the trade name of Sil-P ad 4001. This particular product is

an insulator but electrically conductive versions are also

available. Use of these materials assures maximum sur-

face contact with the heat dissipater thereby compensating

for any minor surface variations. While other available types

of heat conductive materials and thermal compounds pro-

vide similar effectiveness, these alternatives are often less

convenient and can be somewhat messy to use.

As an example, it is desired to maintain the case tempera-

ture of an AFL5015S at ≤ +85°C while operating in an open

area whose ambient temperature is held at a constant +25°C;

then

Thus, a total heat sink surface area (including fins, if any) of

71 in2 in this example, would limit case rise to 60°C above

ambient. A flat aluminum plate, 0.25" thick and of approxi-

mate dimension 4" by 9" (36 in2 per side) would suffice for

this application in a still air environment. Note that to meet

the criteria in this example, both sides of the plate require

unrestricted exposure to the ambient air.

()

=• −









=• =

120 1

83 1 120 0205 246

...W

A = 60

80 24.6 in

HEAT SINK 0.85

•









−=

−143 2

30 71

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AFL50XXS Series

Input Filter

Undervoltage Lockout

The AFL50XXS series converters incorporate a LC input

filter whose elements dominate the input load impedance

characteristic at turn-on. The input circuit is as shown in

Figure IV.

Figure IV. Input Filter Circuit

Output Voltage Adjust

In addition to permitting close voltage regulation of remotely

located loads, it is possible to utilize the converter sense

pins to incrementally increase the output voltage over a

limited range. The adjustments made possible by this method

are intended as a means to “trim” the output to a voltage

setting for some particular application, but are not intended

to create an adjustable output converter. These output

voltage setting variations are obtained by connecting an

appropriate resistor value between the +sense and -sense

pins while connecting the -sense pin to the output return pin

as shown in Figure V. below. The range of adjustment and

corresponding range of resistance values can be deter-

mined by use of the following equation.

R = 100 - -.025

adj NOM

OUT NOM

•









Where

NOM = device nominal output voltage, and

OUT = desired output voltage

Figure V. Connection for VOUT Adjustment

Finding a resistor value for a particular output voltage, is

simply a matter of substituting the desired output voltage

and the nominal device voltage into the equation and solv-

ing for the corresponding resistor value.

Note: Radj must be set ≥ 500Ω

Attempts to adjust the output voltage to a value greater than

120% of nominal should be avoided because of the poten-

tial of exceeding internal component stress ratings and

subsequent operation to failure. Under no circumstance

should the external setting resistor be made less than 500W .

By remaining within this specified range of values, com-

pletely safe operation fully within normal component derat-

ing limits is assured.

Enable 2

+ Sense

- Sense

Return

+ V

out To Load

ADJ

AFL50xxS

Examination of the equation relating output voltage and re-

sistor value reveals a special benefit of the circuit topology

utilized for remote sensing of output voltage in the AFL50XXS

series of converters. It is apparent that as the resistance

increases, the output voltage approaches the nominal set

value of the device. In fact the calculated limiting value of

output voltage as the adjusting resistor becomes very large

is ≈ 25mV above nominal device voltage.

The consequence is that if the +sense connection is unin-

tentionally broken, an AFL50XXS has a fail-safe output volt-

age of Vout + 25mV, where the 25mV is independent of the

nominal output voltage. It can be further demonstrated that

in the event of both the + and - sense connections being

broken, the output will be limited to Vout + 440mV. This 440

mV is also essentially constant independent of the nominal

output voltage.

0.75µH

Pin 1

Pin 2

2.7µfd

A minimum voltage is required at the input of the converter

to initiate operation. This v oltage is set to 26.5 ± 1.5 v olts. To

preclude the possibility of noise or other variations at the

input falsely initiating and halting converter operation, a hys-

teresis of approximately 2 volts is incorporated in this cir-

cuit. Thus if the input voltage droops to 24.5 ± 1.5 volts, the

converter will shut down and remain inoperative until the

input voltage returns to ≈ 25 volts.

www.irf.com 9

AFL50XXS Series

General Application Information Table 1. Nominal Resistance of Cu Wire

The AFL50XXS series of converters are capable of pro-

viding large transient currents to user loads on demand.

Because the nominal input voltage range in this series is

relatively low, the resulting input current demands will be

correspondingly large. It is important therefore, that the line

impedance be kept very low to prevent steady state and

transient input currents from degrading the supply voltage

between the voltage source and the converter input. In

applications requiring high static currents and large tran-

sients, it is recommended that the input leads be made of

adequate size to minimize resistive losses, and that a good

quality capacitor of approximately100µfd be connected di-

rectly across the input terminals to assure an adequately

low impedance at the input terminals. Table I relates nomi-

nal resistance values and selected wire sizes.

Wire Size, AWG Resistance per ft

24 Ga 25.7 mΩ

22 Ga 16.2 mΩ

20 Ga 10.1 mΩ

18 Ga 6.4 mΩ

16 Ga 4.0 mΩ

14 Ga 2.5 mΩ

12 Ga 1.6 mΩ

Incorporation of a 100 µfd capacitor at the input terminals

is recommended as compensation for the dynamic ef-

fects of the parasitic resistance of the input cable reacting

with the complex impedance of the converter input, and to

provide an energy reservoir for transient input current

requirements.

Figure VI. Problems of Parasitic Resistance in input Leads

Vin

Rtn

Case

Enable 1

Sync Out

Sync In

Rtn

source

System Ground

Rtn

100

µfd

(See text)

10 www.irf.com

AFL50XXS Series

AFL50XXS Case Outlines

Case X

Case W

Pin Variation of Case Y

1.260 1.500

2.500

2.760

3.000

ø 0.128

0.250

1.000

Ref 0.200 T

Non-cum

0.050

0.220

ø 0.040

0.238 max

0.380

Max

2.975 max

712

0.050

0.220

0.250

1.000

ø 0.040

0.525

0.380

Max

2.800

0.42

Case Y Case Z

Pin Variation of Case Y

1.500 1.750

2.500

0.25 t

1.150

0.050

0.220

712

1.750 0.375

2.00

0.250

1.000

Ref 0.200 T

Non-cum

ø 0.040

0.300

ø 0.140

0.238 max

0.380

Max

2.975 max

0.050

0.220

0.250

1.000

Ref

ø 0.040

0.525

0.380

Max

2.800

0.36

BERYLLIA WARNING: These conv erters are hermetically sealed; ho wev er they contain BeO substrates and should not be ground or subjected to an y other

operations including exposure to acids, which may produce Beryllium dust or fumes containing Beryllium

Tolerances, unless ot herwi se spec i f i ed: .XX = ±0.010

.XXX = ±0.005

www.irf.com 11

AFL50XXS Series

Pin No. Designation

1 Positive Input

2 Input Return

3 Case

4 Enable 1

5 Sync Output

6 Sync Input

7 Positive Output

8 Output Return

9 Return Sense

10 Positive Sense

11 Share

12 Enable 2

AFL50XXS Pin Designation Part Numbering

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331

ADVANCED ANALOG: 2270 Martin Av., Santa Clara, California 95050, Tel: (408) 727-0500

Visit us at www.irf.com for sales contact information.

Data and specifications subject to change without notice. 07/02

Available Screening Levels and Process V ariations for AFL50XXS Series.

* per Commercial Standards

AFL 50 05 S X / CH

Mode

Input

28= 28 V, 50= 50 V

120=120 V, 270= 270 V

Output

3R3= 3.3 V, 05= 5 V

08= 8 V, 09= 9 V

12= 12 V, 15= 15 V

24= 24 V, 28= 28 V

Output

S = Single

D = Dual

Case

W, X, Y, Z

Screenin

–

, ES

HB, CH

Requirement MIL-STD-883

Method No

Suffix ES

Suffix HB

Suffix CH

Suffix

Temperature Range -20°C to +85°C -55°C to +125°C -55°C to +125°C -55°C to +125°C

Element Evaluation MIL-PRF-38534

Internal Visual 2017 ¬ Yes Yes Yes

Te mperature Cy cle 1010 Cond B Cond C Cond C

Constant Acceler atio n 2001, 500g Cond A Cond A

Burn-in 1015 48hrs @ 85°C 48hrs @ 125°C 160hrs @ 125°C 160hrs @ 125°C

Final Electrical (Group A) MIL-PR F-38534 25°C 25°C -55, +25, +125°C -55, +25, +125°C

Seal, Fine & Gross 1014 ¬ Cond A, C Cond A, C Cond A, C

External Visual 2009 ¬ Yes Yes Yes