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©2015 Fairchild Semiconductor Corporation 1www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
June 2015
FSBB10CH120DF Motion SPM® 3 Series
FSBB10CH120DF
Motion SPM® 3 Series
Features
• UL Certified No. E209204 (UL1557)
• 1200 V - 10 A 3-Phase IGBT Inverter with Integral
Gate Drivers and Protection
• Low-Loss, Short-Circuit Rated IGBTs
• Very Low Thermal Resistance Using Al2O3 DBC
Substrate
• Dedicated Vs Pins Simplify PCB Layout
• Separate Open-Emitter Pins from Low-Side IGBTs for
Three-Phase Current Sensing
• Single-Grounded Power Supply
• LVIC Temperature-Sensing Built-In for Temperature
Monitoring
• Isolation Rating: 2500 Vrms / 1 min.
Applications
• Motion Control - Industrial Motor (AC 400V Class)
Related Resources
•AN-9095 - Motion SPM® 3 Seri es User’s Guide
• AN-9086 - SPM® 3 Package Mounting Guidance
General Description
FSBB10CH120DF is an advanced Motion SPM® 3
module providing a fully-featured, high-performance
inverter output stage for AC Induction, BLDC, and
PMSM motors. These modules integrate optimized gate
drive of the built-in IGBTs to minimize EMI and losses,
while also providing multiple on-module protection
features including under-voltage lockouts, over-current
shutdown, thermal monitoring of drive IC, and fault
reporting. The built-in, high-speed HVIC requires only a
single supply voltage and translates the incoming logic-
level gate inputs to the high-voltage, high-current drive
signals required to properly drive the module's internal
IGBTs. Separate negative IGBT terminals are available
for each phase to support the widest variety of control
algorithms.
Figure 1. 3D Package Drawing
(Click to Activate 3D Content)
Package Mark ing and Ordering Information
Device Device Marking Package Packing Type Quantity
FSBB10CH120DF FSBB10CH120DF SPMMC-027 Rail 10
©2015 Fairchild Semiconductor Corporation 2www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Integrated Power Functions
• 1200 V - 10 A IGBT inverter for three-phase DC / AC power conversion (Please refer to Figure 3)
Integrated Drive, Protection and System Control Functions
• For inverter high-side IGBTs: gate drive circuit, high-voltage isolated high-speed level shifting
control circuit Under-Voltage Lock-Out Protection (UVLO)
Note: Available bootstrap circuit example is given in Figures 5 and 15.
• For inverter low-side IGBTs: gate drive circuit, Short-Circuit Protection (SCP)
control supply circuit Under-Voltage Lock-Out Protection (UVLO)
• Fault signaling: corresponding to UVLO (low-side supply) and SC faults
• Input interface: active-HIGH interface, works with 3.3 / 5 V logic, Schmitt-trigger input
Pin Configuration
Figure 2. Top View
©2015 Fairchild Semiconductor Corporation 3www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Pin Descriptions
Pin Number Pin Name Pin Description
1V
CC(L) Low-Side Common Bias Voltage for IC and IGBTs Driving
2 COM Common Supply Ground
3IN
(UL) Signal Input for Low-Side U Phase
4IN
(VL) Signal Input for Low-Side V Phase
5IN
(WL) Signal Input for Low-Side W Phase
6V
FO Fault Output
7V
TS Output for LVIC Temperature Sensing Voltage Output
8C
SC Capacitor (Low-Pass Filter) for Short-Circuit Current Detection Input
9IN
(UH) Signal Input for High-Side U Phase
10 VCC(UH) High-Side Bias Voltage for U Phase IC
11 VB(U) High-Side Bias Voltage for U Phase IGBT Driving
12 VS(U) High-Side Bias Voltage Ground for U Phase IGBT Driving
13 IN(VH) Signal Input for High-Side V Phase
14 VCC(VH) High-Side Bias Voltage for V Phase IC
15 VB(V) High-Side Bias Voltage for V Phase IGBT Driving
16 VS(V) High-Side Bias Voltage Ground for V Phase IGBT Driving
17 IN(WH) Signal Input for High-Side W Phase
18 VCC(WH) High-Side Bias Voltage for W Phase IC
19 VB(W) High-Side Bias Voltage for W Phase IGBT Driving
20 VS(W) High-Side Bias Voltage Ground for W Phase IGBT Driving
21 NUNegative DC-Link Input for U Phase
22 NVNegative DC-Link Input for V Phase
23 NWNegative DC-Link Input for W Phase
24 U Output for U Phase
25 V Output for V Phase
26 W Output for W Phase
27 P Positive DC-Link Input
©2015 Fairchild Semiconductor Corporation 4www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Internal Equivalent Circuit and Input/Output Pins
Figure 3. Internal Block Diagram
Notes:
1. Inverter low-side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection functions.
2. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals.
3. Inverter high-side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT.
COM
VCC
IN
IN
IN
VFO
VTS
CSC
OUT
OUT
OUT
NU(21)
NV(22)
NW(23)
U (24)
V (25)
W ( 26)
P (27)
(20) VS(W)
(19) VB(W)
(16) VS(V)
(15) VB(V)
(8) CSC
(7) VTS
(6) VFO
(5) IN(WL )
(4) IN(V L)
(3) IN(UL )
(2) COM
(1) VCC(L)
VCC
VB
OUT
COM VSIN
VB
VS
OUT
IN
COM
VCC
VCC
VB
OUT
COM VSIN
(18) VCC (WH)
(17) IN(WH )
(14) VCC (VH)
(1 3) I N(VH)
(12) V
S(U)
(11) VB(U)
(10) VCC (UH)
(9) IN (UH)
©2015 Fairchild Semiconductor Corporation 5www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Absolute Maximum Ratings (TJ = 25°C, Unless Otherwise Specified)
Inverter Part
Control Part
Total System
Thermal Resistance
Note:
4. These values had been made an acquisition by the calculation consid ered to design factor.
5. For the meas urement point of cas e temperature (TC), please refer to Figure 2.
Symbol Parameter Conditions Rating Unit
VPN Supply Voltage Applied between P - NU, NV, NW900 V
VPN(Surge) Supply Voltage (Surge) Applied between P - NU, NV, NW1000 V
VCES Collector - Emitter Voltage 1200 V
± ICEach IGBT Collector Current TC = 25°C, TJ 150°C (Note 4) 10 A
± ICP Each IGBT Collector Current (Peak) TC = 25°C, TJ 150°C, Under 1 ms Pulse
Width (Note 4) 20 A
PCCollector Dissipation TC = 25°C per One Chip (Note 4) 69 W
TJOperating Junction Temperature -40 ~ 150 °C
Symbol Parameter Conditions Rating Unit
VCC Control Supply Voltage Applied between VCC(H), VCC(L) - COM 20 V
VBS High-Side Control Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V),
VB(W) - VS(W)
20 V
VIN Input Signal Voltage Applied between IN(UH), IN(VH), IN(WH),
IN(UL), IN(VL), IN(WL) - COM -0.3 ~ VCC+0.3 V
VFO Fault Output Supply Voltage Applied between VFO - COM -0.3 ~ VCC+0.3 V
IFO Fault Output Current Sink Current at VFO pin 2 mA
VSC Current Sensing Input Voltage Applied between CSC - COM -0.3 ~ VCC+0.3 V
Symbol Parameter Conditions Rating Unit
VPN(PROT) Self Protection Supply Voltage Limit
(Short Circuit Protection Capability) VCC = VBS = 13.5 ~ 16.5 V, TJ = 150°C,
Non-repetitive, < 2 µs800 V
TCModule Case Operation Temperature See Figure 2 -40 ~ 125 °C
TSTG Storage Temperature -40 ~ 125 °C
VISO Isolation Voltage 60 Hz, Sinusoidal, AC 1 minute, Connectio n
Pins to Heat Sink Plate 2500 Vrms
Symbol Parameter Conditions Min. Typ. Max. Unit
Rth(j-c)Q Junction to Case Thermal Resistance
(Note 5) Inverter IGBT part (per 1 / 6 module) - - 1.80 °C / W
Rth(j-c)F Inverter FWD part (per 1 / 6 module) - - 2.75 °C / W
©2015 Fairchild Semiconductor Corporation 6www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Electrical Characteristics (TJ = 25°C, Unless Otherwise Specified)
Inverter Part
Note:
6. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally.
For the detailed information, please see Figure 4.
Figure 4. Switching Time Definition
Symbol Parameter Conditions Min. Typ. Max. Unit
VCE(SAT) Collector - Emitter Saturation
Voltage VCC = VBS = 15 V
VIN = 5 V IC = 10 A, TJ = 25°C - 2.20 2.80 V
VFFWDi Forward Voltage VIN = 0 V IF = 10 A, TJ = 25°C - 2.20 2.80 V
HS tON Switching Times VPN = 600 V, VCC = 15 V, IC = 10 A
TJ = 25°C
VIN = 0 V 5 V, Inductive Load
See Figure 5
(Note 6)
0.45 0.85 1.35 s
tC(ON) -0.250.60s
tOFF -0.951.50s
tC(OFF) -0.100.45s
trr -0.25- s
LS tON VPN = 600 V, VCC = 15 V, IC = 10 A
TJ = 25°C
VIN = 0 V 5 V, Inductive Load
See Figure 5
(Note 6)
0.35 0.75 1.25 s
tC(ON) -0.200.55s
tOFF -0.951.50s
tC(OFF) -0.100.45s
trr -0.20- s
ICES Collector - Emitter Leakage
Current VCE = VCES --5mA
VCE IC
VIN
tON tC(ON)
VIN(ON)
10% IC
10% VCE
90% IC
100% IC
trr
100% IC
VCE
IC
VIN
tOFF tC(OFF)
VIN(OFF) 10% VCE 10% IC
(a ) tu rn -o n (b ) turn -off
©2015 Fairchild Semiconductor Corporation 7www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Figure 5. Example Circuit for Switchin g Test
Figure 6. Switching Loss Charac teristics
Figure 7. Temperature Profile of VTS (Typical)
One-Leg Diagram of SPM 3
P
NU,V,W
VCC
IN
COM
VB
OUT
VS
VCC
IN
COM
OUT
CSC
VTS
VFO
IC
VPN
U,V,W
Inductor
HS Switching
LS Switching
V600V
V
V
+15V
+5V
4.7kΩ
CBS
HS Switching
LS Switching
VIN
0V
5V VCC
DBS
RBS
©2015 Fairchild Semiconductor Corporation 8www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Control Part
Note:
7. Short-circuit current protection is functioning only at the low - sides.
8. TLVIC is the temperature of LVIC itself. VTS is only fo r sensing temperature of LVIC and can not shutdown IGBTs automatically.
Symbol Parameter Conditions Min. Typ. Max. Unit
IQCCH Quiescent VCC Supply
Current
VCC(UH,VH,WH) = 15 V,
IN(UH,VH,WH) = 0 VVCC(UH) - COM,
VCC(VH) - COM,
VCC(WH) - COM
- - 0.15 mA
IQCCL VCC(L) = 15 V,
IN(UL,VL, WL) = 0 VVCC(L) - COM - - 5.00 mA
IPCCH
Operating VCC Supply
Current
VCC(UH,VH,WH) = 15 V,
fPWM = 20 kHz,
duty = 50%, applied to one
PWM signal input for High-
Side
VCC(UH) - COM,
VCC(VH) - COM,
VCC(WH) - COM
- - 0.30 mA
IPCCL VCC(L) = 15V,
fPWM = 20 kHz,
duty = 50%, applied to one
PWM signal input for Low-
Side
VCC(L) - COM - - 8.50 mA
IQBS Quiescent VBS Supply
Current VBS = 15 V,
IN(UH, VH, WH) = 0 V VB(U) - VS(U),
VB(V) - VS(V),
VB(W) - VS(W)
- - 0.30 mA
IPBS Operating VBS Supply
Current VCC = VBS = 15 V,
fPWM = 20 kHz,
duty = 50%, applied to one
PWM signal input for High-
Side
VB(U) - VS(U),
VB(V) - VS(V),
VB(W) - VS(W)
- - 4.50 mA
VFOH Fault Output Voltage VCC = 15 V, VSC = 0 V,
VFO Circuit: 4.7 k to 5 V Pull-up 4.5 - - V
VFOL VCC = 15 V, VSC = 1 V,
VFO Circuit: 4.7 k to 5 V Pull-up --0.5V
VSC(ref) Short Circuit Trip Level VCC = 15 V (Note 7) CSC - COM 0.43 0.50 0.57 V
UVCCD Supply Circuit Under-
Voltage Protection Detection Level 10.3 - 12.8 V
UVCCR Reset Level 10.8 - 13.3 V
UVBSD Detection Level 9.5 - 12.0 V
UVBSR Reset Level 10.0 - 12.5 V
tFOD Fault-Out Pulse Width 50 - - s
VTS LVIC Temperature
Sensing Voltage
Output
VCC(L) = 15 V, TLVIC = 25°C (Note 8)
See Figure 7 880 980 1080 mV
VIN(ON) ON Threshold
Voltage Applied between IN(UH, VH, WH) - COM,
IN(UL, VL, WL) - COM --2.6V
VIN(OFF) OFF Threshold
Voltage 0.8 - - V
©2015 Fairchild Semiconductor Corporation 9www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Recommended Operating Conditions
Note:
9. This product might not make response if input pulse width is less than the recommanded value.
Figure 8. Allowable Maximum Output Current
Note:
10. This allowable output current value is the reference data for the safe operation of this product. This may be different from the actual application and operating condition.
Symbol Parameter Conditions Value Unit
Min. Typ. Max.
VPN Supply Voltage Applied between P - NU, NV, NW300 600 800 V
VCC Control Supply Voltage Applied between VCC(UH, VH, WH) - COM, VCC(L) -
COM 13.5 15.0 16.5 V
VBS High-Side Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) -
VS(W)
13.0 15.0 18.5 V
dVCC / d t,
dVBS / dt Control Supply
Variation -1 - 1 V / s
tdead Blanking Time for
Preventing Arm - Short For Each Input Signal 2.0 - - s
fPWM PWM Input Signal -40C TC 125°C, -40C TJ 150°C - - 20 kHz
VSEN Voltage for Current
Sensing Applied between NU, NV, NW - COM
(Including Surge Voltage) -5 5 V
PWIN(ON) Minimun Input Pulse
Width IC 20 A, Wiring Inductance between NU, V, W and
DC Link N < 10nH (Note 9) 1.5 - - s
PWIN(OFF) 1.5 - -
TJJunction Temperature -40 - 150 C
©2015 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Mechanical Characteristics and Ratings
Figure 9. Flatness Measurement Position
Figure 10. Mounting Screws Tor que Order
Note:
11. Do not make over torque when mounting screws. Much mounting torque may cause DBC cracks, as well as bolts and Al heat - sink destruction.
12. Avoi d one s ide tig htening stress. Fig ure 10 sh ows th e recomm ende d torqu e order for mou nting scr ews. Un even mou nting can cause t he ceramic substrate of the Mo tion SPM
3 product to be damaged. The Pre - Screwing torque is set to 20 ~ 30% of maximum torque rating.
Parameter Conditions Limits Unit
Min. Typ. Max.
Device Flatness See Figure 9 0 - +150 m
Mounting Torque Mounting Screw: M3
See Figure 10
Recommended 0.7 N • m 0.6 0.7 0.8 N • m
Recommended 7.1 kg • cm 6.2 7.1 8.1 kg • cm
Terminal Pulling Strength Load 19.6 N 10 - - s
Terminal Bend ing Strength Load 9.8 N, 90 deg. bend 2 - - times
Weight -15-g
( + )
( + )
( + )
( + )
1
2Pre - Scr ewing : 1 2
Final Screwing : 2 1
©2015 Fairchild Semiconductor Corporation 11 www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Time Charts of SPMs Protective Function
Figure 11. Under-Voltage Protection (Low-Side)
a1 : Control supply voltage rises: After the voltage rises UVCCR, the circuits start to operate when next input is applied.
a2 : Normal operation: IGBT ON and carrying current.
a3 : Under voltage detection (UVCCD).
a4 : IGBT OFF in spite of control input condition.
a5 : Fault output operation starts fixed pulse width or until control supply voltage is recovered up to UVCCR.
a6 : Under voltage reset (UVCCR).
a7 : Normal operation: IGBT ON and carrying current by triggering next signal from “LOW” to “HIGH”.
Figure 12. Under-Voltage Protection (High-Side)
b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied.
b2 : Normal operation: IGBT ON and carrying current.
b3 : Under voltage detection (UVBSD).
b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.
b5 : Under voltage reset (UVBSR).
b6 : Normal operation: IGBT ON and carrying current by triggering next signal from “LOW” to “HIGH”.
Input Signal
Out put Cu rrent
Fault Outpu t Signal
Control
Supply Voltage
RESET
UVCCR
Protection
Circuit State SET RESET
UVCCD
a1 a3
a2 a4
a6
a5
a7
Input Signal
Out p ut Current
Fault Outpu t Signal
Control
Supply Voltage
RESET
UVBSR
Protection
Circuit State SET RESET
UVBSD
b1 b3
b2 b4 b6
b5
High -level (no fault output)
©2015 Fairchild Semiconductor Corporation 12 www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Figure 13. Short-Circuit Current Protection (Low-Side Operation only)
(with the external sense resistance and RC filter connection)
c1 : Normal operation: IGBT ON and carrying current.
c2 : Short circuit current detection (SC trigger).
c3 : All low-side IGBT’s gate are hard interrupted.
c4 : All low-side IGBTs turn OFF.
c5 : Fault output operation starts with a fixed pulse width.
c6 : Input “HIGH”: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON.
c7 : Fault output operation finishes, but IGBT don’t turn on until triggering next signal from “LOW” to “HIGH”.
c8 : Normal operation: IGBT ON and carrying current.
Input/Output Interface Circuit
Figure 14. Recommended CPU I/O Interface Circuit
Note:
13. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s
printed circuit bo ard. The input sign al sectio n of the Mo tion SPM 3 produc t integra tes 5 k(typ.) pull - down resistor . Therefore, when using an external filtering resistor , please
pay attention to the signal voltage drop at input terminal.
Lower arms
control input
Output Current
Sensing Voltage
of sense resistor
Fault Output Signal
S C Reference Voltage
RC Filter circuit
t ime c onstant
delay
S C current t ri p level
Protection
Cir cuit state SET RESET
c6 c7
c3
c2
c1 c8
c4
c5
Internal IGBT
G ate-Emi tter Voltage I nternal del ay
at protect ion circui t
MCU
COM
+ 5V (M CU or Control power)
,,
IN(UL) IN(VL) IN(WL)
,,
IN(UH) IN(VH) IN(WH)
VFO
4. 7 kΩSPM
©2015 Fairchild Semiconductor Corporation 13 www.fairchildsemi.com
FSBB10CH120DF Rev. 1.1
FSBB10CH120DF Motion SPM® 3 Series
Figure 15. Typical Application Circuit
Note:
14. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2 - 3 cm)
15. VFO output is open-drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 2 mA. Please
refer to Figure 14.
16. Input signal is active-HIGH type. There is a 5 k resistor inside the IC to pull-down each input signal line to GND. RC coupling circuits should be adopted for the prevention
of input signal oscillation. R1C1 time constant should be selected in the range 50 ~ 150 ns. (Recommended R1 = 100 Ω, C1 = 1 nF)
17. Each wirin g pattern inductance of A p oi n t sho ul d be m in imi ze d ( R eco m me nd l ess t han 1 0nH ) . A dd it ionally, it is recommended to use th e sh un t resisto r R 4 o f su rface mounted
(SMD) type to reduce wiring inductance. To prevent malfunction, wiring of E point should be connected to the terminal of the shunt resistor R4 as close as possible.
18. To prevent errors of the protection function, the wiring of B, C, and D point should be as short as possible.
19. In the short - circuit protection circuit, please select the R6C6 time constant in the range 1.5 ~ 2 s. R6 should be selected min. 10 times larger resistance than sense resistor
R5. And, It is recommended to do enough evaluaiton on the real system because short-circuit protection time may vary wiring pattern layout and value of the R6C6 time con-
stant.
20. Each capacitor should be mounted as close to the pins of th e Motion SPM 3 product as possible.
21. To prevent surge destruction, the wiring between the smoothing capacitor C7 and the P & GND pins should be as short as possible. The use of a high frequency non - induc-
tive capacitor of around 0.1 ~ 0.22 F between the P & GND pins is recommended.
22. Relays are used at almost every systems of electrical equipments at industrial application. In these cases, there should be sufficient distance between the CPU and the
relays.
23. The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals
(Recommanded zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15Ω).
24. C2 of around 7 times larger than bootstrap capacitor C3 is recommended.
25. Please choose the electrolytic capacitor with good temperature characteristic in C3. Also, choose 0.1 ~ 0.2 F R - category ceramic capacitors with good temperature and
frequency characteristics in C4.
Fault
C3C4
C2C4
5V line
R3
C1
R1
M
VDC
C7
Gating UH
Gating VH
Gating WH
Gating WL
Gating VL
Gating UL
C1
M
C
U
R5
R5
R5
R4
R4
R4
C5C5
C5
W-Phase Current
V -P hase C urrent
U -P hase C urrent
R6
COM
VCC
IN
IN
IN
VFO
VTS
CSC
OUT
OUT
OUT
NU(21)
NV(22)
NW(23)
U (24)
V (2 5)
W (2 6)
P (2 7)
(20) VS(W)
(19) VB(W)
(16) VS(V)
(15) VB(V)
(8) CSC
(7) VTS
(6) VFO
(5) IN(WL )
(4) IN(VL)
(3) IN(UL )
(2) COM
(1) VCC( L)
VCC
VB
OUT
COM
VS
IN
(18) VCC(WH)
(17) IN(WH)
(14) VCC(VH)
(13) IN(VH)
(12) VS(U)
(11) VB(U)
(10) VCC(UH)
(9) IN(UH)
I nput S i gnal f or
S hort-Ci rcui t P rotecti on
C6
R1
R1
R1
R1
R1
R1
C1C1C1
A
BD
C
E
VCC
VB
OUT
COM
VS
IN
VCC
VB
OUT
COM
VS
IN
C3C4
C3C4
15V line
C4
C4
C4
R2
R2
R2
C1C1
C1
D1
D1
D1
D2
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